mips-protos.h (mips_gp_save_slot): Remove.
* config/mips/mips-protos.h (mips_gp_save_slot): Remove. (mips_restore_gp): Declare. * config/mips/mips.c (mips_add_offset): Add a scratch register argument. Reimplement in rtl only, reusing MIPS16 logic from mips_output_mi_thunk. (mips_legitimize_address, mips_legitimize_const_move): Adjust calls to mips_add_offset. (mips_gp_save_slot): Delete. (mips_restore_gp): New function. (mips_set_return_address, mips_output_mi_thunk): Use mips_add_offset. * config/mips/mips.md (exception_receiver): Turn into a define_insn_and_split. Use mips_restore_gp to do the split. (call_internal, call_value_internal, call_value_multiple_internal): Use mips_restore_gp to restore $gp. From-SVN: r85404
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
b828123e23
commit
b73ce23b1d
4 changed files with 75 additions and 67 deletions
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@ -1,3 +1,20 @@
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2004-08-01 Richard Sandiford <rsandifo@redhat.com>
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* config/mips/mips-protos.h (mips_gp_save_slot): Remove.
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(mips_restore_gp): Declare.
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* config/mips/mips.c (mips_add_offset): Add a scratch register
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argument. Reimplement in rtl only, reusing MIPS16 logic from
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mips_output_mi_thunk.
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(mips_legitimize_address, mips_legitimize_const_move): Adjust calls
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to mips_add_offset.
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(mips_gp_save_slot): Delete.
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(mips_restore_gp): New function.
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(mips_set_return_address, mips_output_mi_thunk): Use mips_add_offset.
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* config/mips/mips.md (exception_receiver): Turn into a
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define_insn_and_split. Use mips_restore_gp to do the split.
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(call_internal, call_value_internal, call_value_multiple_internal): Use
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mips_restore_gp to restore $gp.
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2004-07-31 Andrew Pinski <apinski@apple.com>
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PR other/16842
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@ -121,7 +121,7 @@ extern rtx mips_subword (rtx, int);
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extern bool mips_split_64bit_move_p (rtx, rtx);
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extern void mips_split_64bit_move (rtx, rtx);
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extern const char *mips_output_move (rtx, rtx);
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extern rtx mips_gp_save_slot (void);
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extern void mips_restore_gp (void);
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#ifdef RTX_CODE
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extern bool mips_emit_scc (enum rtx_code, rtx);
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extern void gen_conditional_branch (rtx *, enum rtx_code);
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@ -164,7 +164,7 @@ static bool mips16_unextended_reference_p (enum machine_mode mode, rtx, rtx);
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static rtx mips_force_temporary (rtx, rtx);
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static rtx mips_split_symbol (rtx, rtx);
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static rtx mips_unspec_offset_high (rtx, rtx, rtx, enum mips_symbol_type);
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static rtx mips_add_offset (rtx, HOST_WIDE_INT);
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static rtx mips_add_offset (rtx, rtx, HOST_WIDE_INT);
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static unsigned int mips_build_shift (struct mips_integer_op *, HOST_WIDE_INT);
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static unsigned int mips_build_lower (struct mips_integer_op *,
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unsigned HOST_WIDE_INT);
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@ -1742,18 +1742,33 @@ mips_unspec_offset_high (rtx temp, rtx base, rtx addr,
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}
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/* Return a legitimate address for REG + OFFSET. This function will
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create a temporary register if OFFSET is not a SMALL_OPERAND. */
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/* Return a legitimate address for REG + OFFSET. TEMP is as for
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mips_force_temporary; it is only needed when OFFSET is not a
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SMALL_OPERAND. */
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static rtx
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mips_add_offset (rtx reg, HOST_WIDE_INT offset)
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mips_add_offset (rtx temp, rtx reg, HOST_WIDE_INT offset)
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{
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if (!SMALL_OPERAND (offset))
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reg = expand_simple_binop (GET_MODE (reg), PLUS,
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GEN_INT (CONST_HIGH_PART (offset)),
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reg, NULL, 0, OPTAB_WIDEN);
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return plus_constant (reg, CONST_LOW_PART (offset));
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{
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rtx high;
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if (TARGET_MIPS16)
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{
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/* Load the full offset into a register so that we can use
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an unextended instruction for the address itself. */
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high = GEN_INT (offset);
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offset = 0;
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}
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else
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{
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/* Leave OFFSET as a 16-bit offset and put the excess in HIGH. */
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high = GEN_INT (CONST_HIGH_PART (offset));
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offset = CONST_LOW_PART (offset);
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}
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high = mips_force_temporary (temp, high);
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reg = mips_force_temporary (temp, gen_rtx_PLUS (Pmode, high, reg));
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}
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return plus_constant (reg, offset);
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}
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@ -1784,7 +1799,7 @@ mips_legitimize_address (rtx *xloc, enum machine_mode mode)
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reg = XEXP (*xloc, 0);
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if (!mips_valid_base_register_p (reg, mode, 0))
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reg = copy_to_mode_reg (Pmode, reg);
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*xloc = mips_add_offset (reg, INTVAL (XEXP (*xloc, 1)));
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*xloc = mips_add_offset (0, reg, INTVAL (XEXP (*xloc, 1)));
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return true;
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}
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@ -1962,7 +1977,7 @@ mips_legitimize_const_move (enum machine_mode mode, rtx dest, rtx src)
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&& (!no_new_pseudos || SMALL_OPERAND (offset)))
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{
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base = mips_force_temporary (dest, base);
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emit_move_insn (dest, mips_add_offset (base, offset));
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emit_move_insn (dest, mips_add_offset (0, base, offset));
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return;
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}
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@ -2666,25 +2681,28 @@ mips_output_move (rtx dest, rtx src)
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abort ();
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}
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/* Return an rtx for the gp save slot. Valid only when using o32 or
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/* Restore $gp from its save slot. Valid only when using o32 or
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o64 abicalls. */
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rtx
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mips_gp_save_slot (void)
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void
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mips_restore_gp (void)
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{
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rtx loc;
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rtx address, slot;
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if (!TARGET_ABICALLS || TARGET_NEWABI)
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if (!TARGET_ABICALLS || !TARGET_OLDABI)
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abort ();
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if (frame_pointer_needed)
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loc = hard_frame_pointer_rtx;
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else
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loc = stack_pointer_rtx;
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loc = plus_constant (loc, current_function_outgoing_args_size);
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loc = gen_rtx_MEM (Pmode, loc);
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RTX_UNCHANGING_P (loc) = 1;
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return loc;
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address = mips_add_offset (pic_offset_table_rtx,
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frame_pointer_needed
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? hard_frame_pointer_rtx
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: stack_pointer_rtx,
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current_function_outgoing_args_size);
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slot = gen_rtx_MEM (Pmode, address);
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RTX_UNCHANGING_P (slot) = 1;
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emit_move_insn (pic_offset_table_rtx, slot);
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if (!TARGET_EXPLICIT_RELOCS)
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emit_insn (gen_blockage ());
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}
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/* Emit an instruction of the form (set TARGET (CODE OP0 OP1)). */
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@ -3101,26 +3119,15 @@ mips_emit_fcc_reload (rtx dest, rtx src, rtx scratch)
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void
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mips_set_return_address (rtx address, rtx scratch)
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{
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HOST_WIDE_INT gp_offset;
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rtx slot_address;
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compute_frame_size (get_frame_size ());
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if (((cfun->machine->frame.mask >> 31) & 1) == 0)
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abort ();
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gp_offset = cfun->machine->frame.gp_sp_offset;
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slot_address = mips_add_offset (scratch, stack_pointer_rtx,
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cfun->machine->frame.gp_sp_offset);
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/* Reduce SP + GP_OFSET to a legitimate address and put it in SCRATCH. */
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if (gp_offset < 32768)
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scratch = plus_constant (stack_pointer_rtx, gp_offset);
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else
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{
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emit_move_insn (scratch, GEN_INT (gp_offset));
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if (Pmode == DImode)
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emit_insn (gen_adddi3 (scratch, scratch, stack_pointer_rtx));
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else
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emit_insn (gen_addsi3 (scratch, scratch, stack_pointer_rtx));
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}
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emit_move_insn (gen_rtx_MEM (GET_MODE (address), scratch), address);
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emit_move_insn (gen_rtx_MEM (GET_MODE (address), slot_address), address);
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}
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/* Emit straight-line code to move LENGTH bytes from SRC to DEST.
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@ -6773,25 +6780,7 @@ mips_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
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emit_move_insn (temp1, gen_rtx_MEM (Pmode, this));
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/* Set ADDR to a legitimate address for *THIS + VCALL_OFFSET. */
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if (SMALL_OPERAND (vcall_offset))
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addr = gen_rtx_PLUS (Pmode, temp1, GEN_INT (vcall_offset));
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else if (TARGET_MIPS16)
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{
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/* Load the full offset into a register so that we can use
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an unextended instruction for the load itself. */
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emit_move_insn (temp2, GEN_INT (vcall_offset));
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emit_insn (gen_add3_insn (temp1, temp1, temp2));
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addr = temp1;
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}
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else
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{
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/* Load the high part of the offset into a register and
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leave the low part for the address. */
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emit_move_insn (temp2, GEN_INT (CONST_HIGH_PART (vcall_offset)));
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emit_insn (gen_add3_insn (temp1, temp1, temp2));
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addr = gen_rtx_PLUS (Pmode, temp1,
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GEN_INT (CONST_LOW_PART (vcall_offset)));
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}
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addr = mips_add_offset (temp2, temp1, vcall_offset);
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/* Load the offset and add it to THIS. */
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emit_move_insn (temp1, gen_rtx_MEM (Pmode, addr));
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@ -6860,17 +6860,19 @@ dsrl\t%3,%3,1\n\
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DONE;
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})
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(define_insn "exception_receiver"
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(define_insn_and_split "exception_receiver"
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[(set (reg:SI 28)
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(unspec_volatile:SI [(const_int 0)] UNSPEC_EH_RECEIVER))]
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"TARGET_ABICALLS && TARGET_OLDABI"
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"#"
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"&& reload_completed"
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[(const_int 0)]
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{
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operands[0] = pic_offset_table_rtx;
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operands[1] = mips_gp_save_slot ();
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return mips_output_move (operands[0], operands[1]);
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mips_restore_gp ();
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DONE;
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}
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[(set_attr "type" "load")
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(set_attr "length" "8")])
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(set_attr "length" "12")])
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;;
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;; ....................
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@ -7041,7 +7043,7 @@ dsrl\t%3,%3,1\n\
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{
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emit_call_insn (gen_call_split (operands[0], operands[1]));
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if (!find_reg_note (operands[2], REG_NORETURN, 0))
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emit_move_insn (pic_offset_table_rtx, mips_gp_save_slot ());
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mips_restore_gp ();
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DONE;
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}
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[(set_attr "jal" "indirect,direct")
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@ -7082,7 +7084,7 @@ dsrl\t%3,%3,1\n\
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emit_call_insn (gen_call_value_split (operands[0], operands[1],
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operands[2]));
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if (!find_reg_note (operands[3], REG_NORETURN, 0))
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emit_move_insn (pic_offset_table_rtx, mips_gp_save_slot ());
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mips_restore_gp ();
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DONE;
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}
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[(set_attr "jal" "indirect,direct")
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@ -7115,7 +7117,7 @@ dsrl\t%3,%3,1\n\
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emit_call_insn (gen_call_value_multiple_split (operands[0], operands[1],
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operands[2], operands[3]));
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if (!find_reg_note (operands[4], REG_NORETURN, 0))
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emit_move_insn (pic_offset_table_rtx, mips_gp_save_slot ());
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mips_restore_gp ();
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DONE;
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}
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[(set_attr "jal" "indirect,direct")
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