i386: Add peephole2 patterns to improve add with carry or subtract with borrow with memory destination [PR79173]
This patch adds various peephole2s which help to recognize add with carry or subtract with borrow with memory destination. 2023-06-14 Jakub Jelinek <jakub@redhat.com> PR middle-end/79173 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry, addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory destination in these patterns.
This commit is contained in:
Jakub Jelinek
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4e31e63ea7
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b6ca11407d
1 changed files with 289 additions and 0 deletions
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@ -7733,6 +7733,25 @@
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 0) (match_dup 1)))])
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(define_peephole2
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[(set (match_operand:SWI 0 "general_reg_operand")
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(match_operand:SWI 1 "memory_operand"))
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(parallel [(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 0)
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(match_operand:SWI 2 "memory_operand")))
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(set (match_dup 0)
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(minus:SWI (match_dup 0) (match_dup 2)))])
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(set (match_dup 1) (match_dup 0))]
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"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
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&& peep2_reg_dead_p (3, operands[0])
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&& !reg_overlap_mentioned_p (operands[0], operands[1])
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&& !reg_overlap_mentioned_p (operands[0], operands[2])"
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[(set (match_dup 0) (match_dup 2))
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(parallel [(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 1) (match_dup 0)))
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(set (match_dup 1)
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(minus:SWI (match_dup 1) (match_dup 0)))])])
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;; decl %eax; cmpl $-1, %eax; jne .Lxx; can be optimized into
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;; subl $1, %eax; jnc .Lxx;
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(define_peephole2
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@ -7818,6 +7837,59 @@
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(set_attr "pent_pair" "pu")
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(set_attr "mode" "<MODE>")])
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(define_peephole2
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[(set (match_operand:SWI 0 "general_reg_operand")
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(match_operand:SWI 1 "memory_operand"))
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(parallel [(set (match_dup 0)
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(plus:SWI
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(plus:SWI
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(match_operator:SWI 4 "ix86_carry_flag_operator"
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[(match_operand 3 "flags_reg_operand")
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(const_int 0)])
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(match_dup 0))
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(match_operand:SWI 2 "memory_operand")))
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(clobber (reg:CC FLAGS_REG))])
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(set (match_dup 1) (match_dup 0))]
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"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
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&& peep2_reg_dead_p (3, operands[0])
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&& !reg_overlap_mentioned_p (operands[0], operands[1])
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&& !reg_overlap_mentioned_p (operands[0], operands[2])"
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[(set (match_dup 0) (match_dup 2))
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(parallel [(set (match_dup 1)
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(plus:SWI (plus:SWI (match_op_dup 4
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[(match_dup 3) (const_int 0)])
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(match_dup 1))
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(match_dup 0)))
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(clobber (reg:CC FLAGS_REG))])])
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(define_peephole2
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[(set (match_operand:SWI 0 "general_reg_operand")
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(match_operand:SWI 1 "memory_operand"))
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(parallel [(set (match_dup 0)
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(plus:SWI
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(plus:SWI
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(match_operator:SWI 4 "ix86_carry_flag_operator"
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[(match_operand 3 "flags_reg_operand")
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(const_int 0)])
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(match_dup 0))
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(match_operand:SWI 2 "memory_operand")))
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(clobber (reg:CC FLAGS_REG))])
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(set (match_operand:SWI 5 "general_reg_operand") (match_dup 0))
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(set (match_dup 1) (match_dup 5))]
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"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
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&& peep2_reg_dead_p (3, operands[0])
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&& peep2_reg_dead_p (4, operands[5])
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&& !reg_overlap_mentioned_p (operands[0], operands[1])
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&& !reg_overlap_mentioned_p (operands[0], operands[2])
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&& !reg_overlap_mentioned_p (operands[5], operands[1])"
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[(set (match_dup 0) (match_dup 2))
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(parallel [(set (match_dup 1)
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(plus:SWI (plus:SWI (match_op_dup 4
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[(match_dup 3) (const_int 0)])
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(match_dup 1))
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(match_dup 0)))
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(clobber (reg:CC FLAGS_REG))])])
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(define_insn "*add<mode>3_carry_0"
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[(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
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(plus:SWI
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@ -7918,6 +7990,149 @@
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(set_attr "pent_pair" "pu")
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(set_attr "mode" "<MODE>")])
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(define_peephole2
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[(parallel [(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(zero_extend:<DWI>
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(plus:SWI48
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(plus:SWI48
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(match_operator:SWI48 4 "ix86_carry_flag_operator"
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[(match_operand 2 "flags_reg_operand")
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(const_int 0)])
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(match_operand:SWI48 0 "general_reg_operand"))
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(match_operand:SWI48 1 "memory_operand")))
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(plus:<DWI>
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(zero_extend:<DWI> (match_dup 1))
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(match_operator:<DWI> 3 "ix86_carry_flag_operator"
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[(match_dup 2) (const_int 0)]))))
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(set (match_dup 0)
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(plus:SWI48 (plus:SWI48 (match_op_dup 4
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[(match_dup 2) (const_int 0)])
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(match_dup 0))
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(match_dup 1)))])
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(set (match_dup 1) (match_dup 0))]
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"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
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&& peep2_reg_dead_p (2, operands[0])
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&& !reg_overlap_mentioned_p (operands[0], operands[1])"
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[(parallel [(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(zero_extend:<DWI>
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(plus:SWI48
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(plus:SWI48
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(match_op_dup 4
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[(match_dup 2) (const_int 0)])
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(match_dup 1))
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(match_dup 0)))
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(plus:<DWI>
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(zero_extend:<DWI> (match_dup 0))
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(match_op_dup 3
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[(match_dup 2) (const_int 0)]))))
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(set (match_dup 1)
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(plus:SWI48 (plus:SWI48 (match_op_dup 4
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[(match_dup 2) (const_int 0)])
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(match_dup 1))
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(match_dup 0)))])])
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(define_peephole2
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[(set (match_operand:SWI48 0 "general_reg_operand")
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(match_operand:SWI48 1 "memory_operand"))
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(parallel [(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(zero_extend:<DWI>
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(plus:SWI48
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(plus:SWI48
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(match_operator:SWI48 5 "ix86_carry_flag_operator"
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[(match_operand 3 "flags_reg_operand")
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(const_int 0)])
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(match_dup 0))
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(match_operand:SWI48 2 "memory_operand")))
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(plus:<DWI>
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(zero_extend:<DWI> (match_dup 2))
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(match_operator:<DWI> 4 "ix86_carry_flag_operator"
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[(match_dup 3) (const_int 0)]))))
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(set (match_dup 0)
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(plus:SWI48 (plus:SWI48 (match_op_dup 5
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[(match_dup 3) (const_int 0)])
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(match_dup 0))
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(match_dup 2)))])
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(set (match_dup 1) (match_dup 0))]
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"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
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&& peep2_reg_dead_p (3, operands[0])
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&& !reg_overlap_mentioned_p (operands[0], operands[1])
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&& !reg_overlap_mentioned_p (operands[0], operands[2])"
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[(set (match_dup 0) (match_dup 2))
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(parallel [(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(zero_extend:<DWI>
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(plus:SWI48
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(plus:SWI48
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(match_op_dup 5
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[(match_dup 3) (const_int 0)])
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(match_dup 1))
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(match_dup 0)))
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(plus:<DWI>
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(zero_extend:<DWI> (match_dup 0))
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(match_op_dup 4
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[(match_dup 3) (const_int 0)]))))
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(set (match_dup 1)
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(plus:SWI48 (plus:SWI48 (match_op_dup 5
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[(match_dup 3) (const_int 0)])
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(match_dup 1))
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(match_dup 0)))])])
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(define_peephole2
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[(parallel [(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(zero_extend:<DWI>
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(plus:SWI48
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(plus:SWI48
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(match_operator:SWI48 4 "ix86_carry_flag_operator"
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[(match_operand 2 "flags_reg_operand")
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(const_int 0)])
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(match_operand:SWI48 0 "general_reg_operand"))
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(match_operand:SWI48 1 "memory_operand")))
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(plus:<DWI>
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(zero_extend:<DWI> (match_dup 1))
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(match_operator:<DWI> 3 "ix86_carry_flag_operator"
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[(match_dup 2) (const_int 0)]))))
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(set (match_dup 0)
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(plus:SWI48 (plus:SWI48 (match_op_dup 4
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[(match_dup 2) (const_int 0)])
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(match_dup 0))
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(match_dup 1)))])
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(set (match_operand:QI 5 "general_reg_operand")
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(ltu:QI (reg:CCC FLAGS_REG) (const_int 0)))
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(set (match_operand:SWI48 6 "general_reg_operand")
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(zero_extend:SWI48 (match_dup 5)))
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(set (match_dup 1) (match_dup 0))]
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"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
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&& peep2_reg_dead_p (4, operands[0])
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&& !reg_overlap_mentioned_p (operands[0], operands[1])
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&& !reg_overlap_mentioned_p (operands[0], operands[5])
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&& !reg_overlap_mentioned_p (operands[5], operands[1])
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&& !reg_overlap_mentioned_p (operands[0], operands[6])
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&& !reg_overlap_mentioned_p (operands[6], operands[1])"
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[(parallel [(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(zero_extend:<DWI>
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(plus:SWI48
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(plus:SWI48
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(match_op_dup 4
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[(match_dup 2) (const_int 0)])
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(match_dup 1))
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(match_dup 0)))
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(plus:<DWI>
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(zero_extend:<DWI> (match_dup 0))
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(match_op_dup 3
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[(match_dup 2) (const_int 0)]))))
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(set (match_dup 1)
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(plus:SWI48 (plus:SWI48 (match_op_dup 4
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[(match_dup 2) (const_int 0)])
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(match_dup 1))
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(match_dup 0)))])
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(set (match_dup 5) (ltu:QI (reg:CCC FLAGS_REG) (const_int 0)))
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(set (match_dup 6) (zero_extend:SWI48 (match_dup 5)))])
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(define_expand "addcarry<mode>_0"
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[(parallel
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[(set (reg:CCC FLAGS_REG)
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@ -7988,6 +8203,59 @@
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(set_attr "pent_pair" "pu")
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(set_attr "mode" "<MODE>")])
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(define_peephole2
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[(set (match_operand:SWI 0 "general_reg_operand")
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(match_operand:SWI 1 "memory_operand"))
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(parallel [(set (match_dup 0)
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(minus:SWI
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(minus:SWI
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(match_dup 0)
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(match_operator:SWI 4 "ix86_carry_flag_operator"
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[(match_operand 3 "flags_reg_operand")
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(const_int 0)]))
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(match_operand:SWI 2 "memory_operand")))
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(clobber (reg:CC FLAGS_REG))])
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(set (match_dup 1) (match_dup 0))]
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"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
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&& peep2_reg_dead_p (3, operands[0])
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&& !reg_overlap_mentioned_p (operands[0], operands[1])
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&& !reg_overlap_mentioned_p (operands[0], operands[2])"
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[(set (match_dup 0) (match_dup 2))
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(parallel [(set (match_dup 1)
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(minus:SWI (minus:SWI (match_dup 1)
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(match_op_dup 4
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[(match_dup 3) (const_int 0)]))
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(match_dup 0)))
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(clobber (reg:CC FLAGS_REG))])])
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(define_peephole2
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[(set (match_operand:SWI 0 "general_reg_operand")
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(match_operand:SWI 1 "memory_operand"))
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(parallel [(set (match_dup 0)
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(minus:SWI
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(minus:SWI
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(match_dup 0)
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(match_operator:SWI 4 "ix86_carry_flag_operator"
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[(match_operand 3 "flags_reg_operand")
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(const_int 0)]))
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(match_operand:SWI 2 "memory_operand")))
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(clobber (reg:CC FLAGS_REG))])
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(set (match_operand:SWI 5 "general_reg_operand") (match_dup 0))
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(set (match_dup 1) (match_dup 5))]
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"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
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&& peep2_reg_dead_p (3, operands[0])
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&& peep2_reg_dead_p (4, operands[5])
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&& !reg_overlap_mentioned_p (operands[0], operands[1])
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&& !reg_overlap_mentioned_p (operands[0], operands[2])
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&& !reg_overlap_mentioned_p (operands[5], operands[1])"
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[(set (match_dup 0) (match_dup 2))
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(parallel [(set (match_dup 1)
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(minus:SWI (minus:SWI (match_dup 1)
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(match_op_dup 4
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[(match_dup 3) (const_int 0)]))
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(match_dup 0)))
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(clobber (reg:CC FLAGS_REG))])])
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(define_insn "*sub<mode>3_carry_0"
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[(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
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(minus:SWI
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@ -8241,6 +8509,27 @@
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(match_dup 1)))
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(set (match_dup 1) (plus:SWI (match_dup 1) (match_dup 0)))])])
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(define_peephole2
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[(set (match_operand:SWI 0 "general_reg_operand")
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(match_operand:SWI 1 "memory_operand"))
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(parallel [(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(plus:SWI (match_dup 0)
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(match_operand:SWI 2 "memory_operand"))
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(match_dup 0)))
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(set (match_dup 0) (plus:SWI (match_dup 0) (match_dup 2)))])
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(set (match_dup 1) (match_dup 0))]
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"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
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&& peep2_reg_dead_p (3, operands[0])
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&& !reg_overlap_mentioned_p (operands[0], operands[1])
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&& !reg_overlap_mentioned_p (operands[0], operands[2])"
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[(set (match_dup 0) (match_dup 2))
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(parallel [(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(plus:SWI (match_dup 1) (match_dup 0))
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(match_dup 1)))
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(set (match_dup 1) (plus:SWI (match_dup 1) (match_dup 0)))])])
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(define_insn "*addsi3_zext_cc_overflow_1"
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[(set (reg:CCC FLAGS_REG)
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(compare:CCC
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