AVR: Use avr_byte instead of simplify_gen_subreg (QImode, ...
There are many places where asm output functions have to look at the constituent bytes and words of the operands. The function of choice was simplify_gen_subreg (mode, ...) which can be replaced by the more handy avr_byte (rtx, byte_num). gcc/ * config/avr/avr.cc: Use functions like avr_byte, avr_word, avr_[u]int8/16 if convenient. (avr_uint16): New function.
This commit is contained in:
Georg-Johann Lay
parent
4ee692337c
commit
b55f5e344c
1 changed files with 47 additions and 62 deletions
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@ -308,6 +308,15 @@ avr_int16 (rtx x, int n)
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return (int16_t) trunc_int_for_mode (INTVAL (avr_word (x, n)), HImode);
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}
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/* Return the sub-word of compile-time constant X that starts
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at byte N as an uint16_t. */
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static uint16_t
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avr_uint16 (rtx x, int n)
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{
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return (uint16_t) avr_int16 (x, n);
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}
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/* Constraint helper function. XVAL is a CONST_INT or a CONST_DOUBLE.
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Return true if the least significant N_BYTES bytes of XVAL all have a
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@ -317,15 +326,9 @@ avr_int16 (rtx x, int n)
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bool
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avr_popcount_each_byte (rtx xval, int n_bytes, int pop_mask)
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{
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machine_mode mode = GET_MODE (xval);
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if (VOIDmode == mode)
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mode = SImode;
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for (int i = 0; i < n_bytes; i++)
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{
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rtx xval8 = simplify_gen_subreg (QImode, xval, mode, i);
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unsigned int val8 = UINTVAL (xval8) & GET_MODE_MASK (QImode);
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unsigned int val8 = avr_uint8 (xval, i);
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if ((pop_mask & (1 << popcount_hwi (val8))) == 0)
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return false;
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@ -342,15 +345,9 @@ avr_popcount_each_byte (rtx xval, int n_bytes, int pop_mask)
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bool
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avr_xor_noclobber_dconst (rtx xval, int n_bytes)
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{
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machine_mode mode = GET_MODE (xval);
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if (VOIDmode == mode)
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mode = SImode;
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for (int i = 0; i < n_bytes; ++i)
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{
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rtx xval8 = simplify_gen_subreg (QImode, xval, mode, i);
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unsigned int val8 = UINTVAL (xval8) & GET_MODE_MASK (QImode);
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unsigned int val8 = avr_uint8 (xval, i);
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if (val8 != 0 && val8 != 0xff && val8 != 0x80)
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return false;
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@ -3414,7 +3411,7 @@ avr_out_lpm_no_lpmx (rtx_insn *insn, rtx *xop, int *plen)
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for (int i = 0; i < n_bytes; ++i)
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{
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rtx reg = simplify_gen_subreg (QImode, dest, GET_MODE (dest), i);
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rtx reg = avr_byte (dest, i);
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if (i > 0)
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avr_asm_len ("adiw %2,1", xop, plen, 1);
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@ -3676,9 +3673,9 @@ output_reload_in_const (rtx *op, rtx clobber_reg, int *len, bool clear_p)
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but has some subregs that are in LD_REGS. Use the MSB (REG:QI 17). */
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if (REGNO (dest) < REG_16
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&& REGNO (dest) + GET_MODE_SIZE (mode) > REG_16)
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&& END_REGNO (dest) > REG_16)
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{
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clobber_reg = all_regs_rtx[REGNO (dest) + n_bytes - 1];
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clobber_reg = all_regs_rtx[END_REGNO (dest) - 1];
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}
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/* We might need a clobber reg but don't have one. Look at the value to
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@ -3708,7 +3705,7 @@ output_reload_in_const (rtx *op, rtx clobber_reg, int *len, bool clear_p)
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/* Crop the n-th destination byte. */
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xdest[n] = simplify_gen_subreg (QImode, dest, mode, n);
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xdest[n] = avr_byte (dest, n);
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int ldreg_p = test_hard_reg_class (LD_REGS, xdest[n]);
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if (!CONST_INT_P (src)
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@ -3734,7 +3731,7 @@ output_reload_in_const (rtx *op, rtx clobber_reg, int *len, bool clear_p)
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/* Crop the n-th source byte. */
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xval = simplify_gen_subreg (QImode, src, mode, n);
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xval = avr_byte (src, n);
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ival[n] = INTVAL (xval);
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/* Look if we can reuse the low word by means of MOVW. */
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@ -3743,12 +3740,12 @@ output_reload_in_const (rtx *op, rtx clobber_reg, int *len, bool clear_p)
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&& n_bytes >= 4
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&& AVR_HAVE_MOVW)
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{
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rtx lo16 = simplify_gen_subreg (HImode, src, mode, 0);
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rtx hi16 = simplify_gen_subreg (HImode, src, mode, 2);
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int lo16 = avr_int16 (src, 0);
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int hi16 = avr_int16 (src, 2);
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if (INTVAL (lo16) == INTVAL (hi16))
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if (lo16 == hi16)
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{
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if (INTVAL (lo16) != 0 || !clear_p)
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if (lo16 != 0 || ! clear_p)
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avr_asm_len ("movw %C0,%A0", &op[0], len, 1);
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break;
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@ -6275,7 +6272,7 @@ avr_out_cmp_ext (rtx xop[], enum rtx_code code, int *plen)
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{
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// Sign-extend the high-byte of zreg to tmp_reg.
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int zmsb = GET_MODE_SIZE (zmode) - 1;
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rtx xzmsb = simplify_gen_subreg (QImode, zreg, zmode, zmsb);
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rtx xzmsb = avr_byte (zreg, zmsb);
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avr_asm_len ("mov __tmp_reg__,%0" CR_TAB
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"rol __tmp_reg__" CR_TAB
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@ -6298,10 +6295,8 @@ avr_out_cmp_ext (rtx xop[], enum rtx_code code, int *plen)
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for (int b = 1; b < n_bytes; ++b)
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{
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rtx regs[2];
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regs[1 - z] = simplify_gen_subreg (QImode, reg, mode, b);
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regs[z] = (b < GET_MODE_SIZE (zmode)
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? simplify_gen_subreg (QImode, zreg, zmode, b)
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: zex);
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regs[1 - z] = avr_byte (reg, b);
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regs[z] = b < GET_MODE_SIZE (zmode) ? avr_byte (zreg, b) : zex;
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avr_asm_len ("cpc %0,%1", regs, plen, 1);
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}
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@ -8038,8 +8033,8 @@ avr_out_plus_1 (rtx insn, rtx *xop, int *plen, enum rtx_code code,
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for (int i = 0; i < n_bytes; i++)
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{
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/* We operate byte-wise on the destination. */
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op[0] = simplify_gen_subreg (QImode, xop[0], mode, i);
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op[1] = simplify_gen_subreg (QImode, xop[2], mode, i);
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op[0] = avr_byte (xop[0], i);
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op[1] = avr_byte (xop[2], i);
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if (i == 0)
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avr_asm_len (code == PLUS ? "add %0,%1" : "sub %0,%1",
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@ -8075,8 +8070,7 @@ avr_out_plus_1 (rtx insn, rtx *xop, int *plen, enum rtx_code code,
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if (SS_PLUS == code_sat && MINUS == code
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&& sign < 0
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&& 0x80 == (INTVAL (simplify_gen_subreg (QImode, xval, imode, n_bytes-1))
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& GET_MODE_MASK (QImode)))
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&& 0x80 == avr_uint8 (xval, n_bytes - 1))
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{
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/* We compute x + 0x80 by means of SUB instructions. We negated the
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constant subtrahend above and are left with x - (-128) so that we
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@ -8085,7 +8079,7 @@ avr_out_plus_1 (rtx insn, rtx *xop, int *plen, enum rtx_code code,
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where this must be done is when NEG overflowed in case [2s] because
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the V computation needs the right sign of the subtrahend. */
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rtx msb = simplify_gen_subreg (QImode, xop[0], mode, n_bytes - 1);
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rtx msb = avr_byte (xop[0], n_bytes - 1);
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avr_asm_len ("subi %0,128" CR_TAB
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"brmi 0f", &msb, plen, 2);
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@ -8097,8 +8091,8 @@ avr_out_plus_1 (rtx insn, rtx *xop, int *plen, enum rtx_code code,
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for (int i = 0; i < n_bytes; i++)
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{
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/* We operate byte-wise on the destination. */
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rtx reg8 = simplify_gen_subreg (QImode, xop[0], mode, i);
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rtx xval8 = simplify_gen_subreg (QImode, xval, imode, i);
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rtx reg8 = avr_byte (xop[0], i);
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rtx xval8 = avr_byte (xval, i);
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/* 8-bit value to operate with this byte. */
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unsigned int val8 = UINTVAL (xval8) & GET_MODE_MASK (QImode);
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@ -8116,8 +8110,7 @@ avr_out_plus_1 (rtx insn, rtx *xop, int *plen, enum rtx_code code,
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&& i + 2 <= n_bytes
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&& avr_adiw_reg_p (reg8))
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{
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rtx xval16 = simplify_gen_subreg (HImode, xval, imode, i);
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unsigned int val16 = UINTVAL (xval16) & GET_MODE_MASK (HImode);
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unsigned int val16 = avr_uint16 (xval, i);
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/* Registers R24, X, Y, Z can use ADIW/SBIW with constants < 64
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i.e. operate word-wise. */
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@ -8272,10 +8265,8 @@ avr_out_plus_1 (rtx insn, rtx *xop, int *plen, enum rtx_code code,
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The cases a - b actually perform a - (-(-b)) if B is CONST.
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*/
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op[0] = simplify_gen_subreg (QImode, xop[0], mode, n_bytes-1);
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op[1] = n_bytes > 1
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? simplify_gen_subreg (QImode, xop[0], mode, n_bytes-2)
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: NULL_RTX;
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op[0] = avr_byte (xop[0], n_bytes - 1);
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op[1] = n_bytes > 1 ? avr_byte (xop[0], n_bytes - 2) : NULL_RTX;
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bool need_copy = true;
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int len_call = 1 + AVR_HAVE_JMP_CALL;
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@ -8308,7 +8299,7 @@ avr_out_plus_1 (rtx insn, rtx *xop, int *plen, enum rtx_code code,
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{
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/* [1s,reg] */
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op[2] = simplify_gen_subreg (QImode, xop[2], mode, n_bytes-1);
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op[2] = avr_byte (xop[2], n_bytes - 1);
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if (n_bytes == 1)
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avr_asm_len ("ldi %0,0x80" CR_TAB
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@ -8324,7 +8315,7 @@ avr_out_plus_1 (rtx insn, rtx *xop, int *plen, enum rtx_code code,
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{
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/* [3s,reg] */
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op[2] = simplify_gen_subreg (QImode, xop[2], mode, n_bytes-1);
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op[2] = avr_byte (xop[2], n_bytes - 1);
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if (n_bytes == 1)
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avr_asm_len ("ldi %0,0x7f" CR_TAB
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@ -8565,8 +8556,7 @@ avr_out_plus (rtx insn, rtx *xop, int *plen, bool out_label)
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/* Saturation will need the sign of the original operand. */
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rtx xmsb = simplify_gen_subreg (QImode, op[2], imode, n_bytes-1);
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int sign = INTVAL (xmsb) < 0 ? -1 : 1;
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int sign = avr_int8 (op[2], n_bytes - 1) < 0 ? -1 : 1;
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/* If we subtract and the subtrahend is a constant, then negate it
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so that avr_out_plus_1 can be used. */
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@ -8678,13 +8668,13 @@ avr_out_plus_set_ZN (rtx *xop, int *plen)
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// SBIW'ed in one go.
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for (int i = 0; i < n_bytes; ++i)
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{
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op[0] = simplify_gen_subreg (QImode, xreg, mode, i);
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op[0] = avr_byte (xreg, i);
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if (i == 0
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&& n_bytes >= 2
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&& avr_adiw_reg_p (op[0]))
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{
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op[1] = simplify_gen_subreg (HImode, xval, mode, 0);
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op[1] = avr_word (xval, 0);
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if (IN_RANGE (INTVAL (op[1]), 0, 63))
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{
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// SBIW can handle the lower 16 bits.
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@ -8696,7 +8686,7 @@ avr_out_plus_set_ZN (rtx *xop, int *plen)
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}
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}
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op[1] = simplify_gen_subreg (QImode, xval, mode, i);
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op[1] = avr_byte (xval, i);
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if (test_hard_reg_class (LD_REGS, op[0]))
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{
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@ -8911,11 +8901,10 @@ avr_out_bitop (rtx insn, rtx *xop, int *plen)
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for (int i = 0; i < n_bytes; i++)
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{
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/* We operate byte-wise on the destination. */
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rtx reg8 = simplify_gen_subreg (QImode, xop[0], mode, i);
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rtx xval8 = simplify_gen_subreg (QImode, xop[2], mode, i);
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rtx reg8 = avr_byte (xop[0], i);
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/* 8-bit value to operate with this byte. */
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unsigned int val8 = UINTVAL (xval8) & GET_MODE_MASK (QImode);
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unsigned int val8 = avr_uint8 (xop[2], i);
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/* Number of bits set in the current byte of the constant. */
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int pop8 = popcount_hwi (val8);
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@ -9281,11 +9270,9 @@ avr_out_insv (rtx_insn *insn, rtx xop[], int *plen)
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rtx op[4] =
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{
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// Output
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simplify_gen_subreg (QImode, xop[0], mode, obit / 8),
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GEN_INT (obit & 7),
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avr_byte (xop[0], obit / 8), GEN_INT (obit & 7),
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// Input
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simplify_gen_subreg (QImode, xop[1], mode, ibit / 8),
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GEN_INT (ibit & 7)
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avr_byte (xop[1], ibit / 8), GEN_INT (ibit & 7)
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};
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obit &= 7;
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ibit &= 7;
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@ -9372,7 +9359,7 @@ avr_out_insv (rtx_insn *insn, rtx xop[], int *plen)
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{
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for (int b = 0; b < n_bytes; ++b)
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{
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rtx byte = simplify_gen_subreg (QImode, xop[0], mode, b);
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rtx byte = avr_byte (xop[0], b);
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if (REGNO (byte) != REGNO (op[0]))
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avr_asm_len ("clr %0", &byte, plen, 1);
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}
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@ -9392,7 +9379,7 @@ avr_out_insv (rtx_insn *insn, rtx xop[], int *plen)
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else
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for (int b = 0; b < n_bytes; ++b)
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{
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rtx byte = simplify_gen_subreg (QImode, xop[0], mode, b);
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rtx byte = avr_byte (xop[0], b);
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avr_asm_len ("clr %0", &byte, plen, 1);
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}
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@ -9416,7 +9403,7 @@ avr_out_extr (rtx_insn *insn, rtx xop[], int *plen)
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if (GET_MODE (src) != QImode)
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{
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src = xop[1] = simplify_gen_subreg (QImode, src, GET_MODE (src), bit / 8);
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src = xop[1] = avr_byte (src, bit / 8);
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bit %= 8;
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xop[2] = GEN_INT (bit);
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}
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@ -10423,10 +10410,7 @@ avr_assemble_integer (rtx x, unsigned int size, int aligned_p)
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/* varasm fails to handle big fixed modes that don't fit in hwi. */
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for (unsigned n = 0; n < size; n++)
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{
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rtx xn = simplify_gen_subreg (QImode, x, GET_MODE (x), n);
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default_assemble_integer (xn, 1, aligned_p);
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}
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default_assemble_integer (avr_byte (x, n), 1, aligned_p);
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return true;
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}
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@ -11508,6 +11492,7 @@ avr_asm_select_section (tree decl, int reloc, unsigned HOST_WIDE_INT align)
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return sect;
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}
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/* Implement `TARGET_ASM_FILE_START'. */
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/* Outputs some text at the start of each assembler file. */
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