From b4979ab94ef2891d0e10f782b5cb72892de11550 Mon Sep 17 00:00:00 2001 From: Andrey Belevantsev Date: Tue, 19 Feb 2013 17:50:50 +0400 Subject: [PATCH] re PR middle-end/55889 (ICE: in move_op_ascend, at sel-sched.c:6153 with -fschedule-insns -fselective-scheduling) 2012-02-19 Andrey Belevantsev PR middle-end/55889 * sel-sched.c: Include ira.h. (implicit_clobber_conflict_p): New function. (moveup_expr): Use it. * Makefile.in (sel-sched.o): Depend on ira.h. From-SVN: r196137 --- gcc/ChangeLog | 9 +++++++ gcc/Makefile.in | 2 +- gcc/sel-sched.c | 67 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 77 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7a1657c323c..0dbcd007234 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2012-02-19 Andrey Belevantsev + + PR middle-end/55889 + + * sel-sched.c: Include ira.h. + (implicit_clobber_conflict_p): New function. + (moveup_expr): Use it. + * Makefile.in (sel-sched.o): Depend on ira.h. + 2013-02-19 Richard Biener PR tree-optimization/56384 diff --git a/gcc/Makefile.in b/gcc/Makefile.in index f3bb1683bb5..557ab08fbfa 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -3338,7 +3338,7 @@ sel-sched.o : sel-sched.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ $(FUNCTION_H) $(INSN_ATTR_H) $(RECOG_H) $(EXCEPT_H) $(PARAMS_H) \ $(TM_P_H) output.h $(TARGET_H) $(TREE_PASS_H) \ $(SCHED_INT_H) $(GGC_H) $(TREE_H) langhooks.h rtlhooks-def.h \ - $(SEL_SCHED_IR_H) $(SEL_SCHED_DUMP_H) sel-sched.h $(DBGCNT_H) $(EMIT_RTL_H) + $(SEL_SCHED_IR_H) $(SEL_SCHED_DUMP_H) sel-sched.h $(DBGCNT_H) $(EMIT_RTL_H) ira.h sel-sched-dump.o : sel-sched-dump.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ $(RTL_H) $(REGS_H) hard-reg-set.h $(FLAGS_H) insn-config.h \ $(FUNCTION_H) $(INSN_ATTR_H) $(DIAGNOSTIC_CORE_H) $(RECOG_H) $(EXCEPT_H) $(PARAMS_H) \ diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c index 6f60d7063a3..11bf2e62c31 100644 --- a/gcc/sel-sched.c +++ b/gcc/sel-sched.c @@ -41,6 +41,7 @@ along with GCC; see the file COPYING3. If not see #include "langhooks.h" #include "rtlhooks-def.h" #include "emit-rtl.h" +#include "ira.h" #ifdef INSN_SCHEDULING #include "sel-sched-ir.h" @@ -2101,6 +2102,61 @@ moving_insn_creates_bookkeeping_block_p (insn_t insn, return TRUE; } +/* Return true when the conflict with newly created implicit clobbers + between EXPR and THROUGH_INSN is found because of renaming. */ +static bool +implicit_clobber_conflict_p (insn_t through_insn, expr_t expr) +{ + HARD_REG_SET temp; + rtx insn, reg, rhs, pat; + hard_reg_set_iterator hrsi; + unsigned regno; + bool valid; + + /* Make a new pseudo register. */ + reg = gen_reg_rtx (GET_MODE (EXPR_LHS (expr))); + max_regno = max_reg_num (); + maybe_extend_reg_info_p (); + + /* Validate a change and bail out early. */ + insn = EXPR_INSN_RTX (expr); + validate_change (insn, &SET_DEST (PATTERN (insn)), reg, true); + valid = verify_changes (0); + cancel_changes (0); + if (!valid) + { + if (sched_verbose >= 6) + sel_print ("implicit clobbers failed validation, "); + return true; + } + + /* Make a new insn with it. */ + rhs = copy_rtx (VINSN_RHS (EXPR_VINSN (expr))); + pat = gen_rtx_SET (VOIDmode, reg, rhs); + start_sequence (); + insn = emit_insn (pat); + end_sequence (); + + /* Calculate implicit clobbers. */ + extract_insn (insn); + preprocess_constraints (); + ira_implicitly_set_insn_hard_regs (&temp); + AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs); + + /* If any implicit clobber registers intersect with regular ones in + through_insn, we have a dependency and thus bail out. */ + EXECUTE_IF_SET_IN_HARD_REG_SET (temp, 0, regno, hrsi) + { + vinsn_t vi = INSN_VINSN (through_insn); + if (bitmap_bit_p (VINSN_REG_SETS (vi), regno) + || bitmap_bit_p (VINSN_REG_CLOBBERS (vi), regno) + || bitmap_bit_p (VINSN_REG_USES (vi), regno)) + return true; + } + + return false; +} + /* Modifies EXPR so it can be moved through the THROUGH_INSN, performing necessary transformations. Record the type of transformation made in PTRANS_TYPE, when it is not NULL. When INSIDE_INSN_GROUP, @@ -2233,6 +2289,17 @@ moveup_expr (expr_t expr, insn_t through_insn, bool inside_insn_group, if (!enable_schedule_as_rhs_p || !EXPR_SEPARABLE_P (expr)) return MOVEUP_EXPR_NULL; + /* When renaming a hard register to a pseudo before reload, extra + dependencies can occur from the implicit clobbers of the insn. + Filter out such cases here. */ + if (!reload_completed && REG_P (EXPR_LHS (expr)) + && HARD_REGISTER_P (EXPR_LHS (expr)) + && implicit_clobber_conflict_p (through_insn, expr)) + { + if (sched_verbose >= 6) + sel_print ("implicit clobbers conflict detected, "); + return MOVEUP_EXPR_NULL; + } EXPR_TARGET_AVAILABLE (expr) = false; was_target_conflict = true; as_rhs = true;