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h8300.md: Move movsf patterns into one section of the file.

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* config/h8300/h8300.md: Move movsf patterns into one section
	of the file.

From-SVN: r78033
This commit is contained in:
Kazu Hirata 2004-02-18 15:51:07 +00:00 • committed by Kazu Hirata
parent aa335b7641
commit b0c8a821ff
2 changed files with 83 additions and 78 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2004-02-18 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md: Move movsf patterns into one section
of the file.
2004-02-18 Kazu Hirata <kazu@cs.umass.edu>
* cfgloop.h, cfgloopanal.c, cpplex.c, except.h, loop-init.c,

156
gcc/config/h8300/h8300.md
View file

@ -276,28 +276,6 @@
}
}")
(define_expand "movsf"
[(set (match_operand:SF 0 "general_operand_dst" "")
(match_operand:SF 1 "general_operand_src" ""))]
""
"
{
if (TARGET_H8300)
{
if (h8300_expand_movsi (operands))
DONE;
}
else
{
/* One of the ops has to be in a register. */
if (!register_operand (operand1, SFmode)
&& !register_operand (operand0, SFmode))
{
operands[1] = copy_to_mode_reg (SFmode, operand1);
}
}
}")
(define_insn "*movsi_h8300"
[(set (match_operand:SI 0 "general_operand_dst" "=r,r,r,o,<,r")
(match_operand:SI 1 "general_operand_src" "I,r,io,r,r,>"))]
@ -369,62 +347,6 @@
[(set (attr "length")
(symbol_ref "compute_mov_length (operands)"))])
(define_insn "*movsf_h8300"
[(set (match_operand:SF 0 "general_operand_dst" "=r,r,r,o,<,r")
(match_operand:SF 1 "general_operand_src" "G,r,io,r,r,>"))]
"TARGET_H8300
&& (register_operand (operands[0], SFmode)
|| register_operand (operands[1], SFmode))"
"*
{
/* Copy of the movsi stuff. */
unsigned int rn = -1;
switch (which_alternative)
{
case 0:
return \"sub.w %e0,%e0\;sub.w %f0,%f0\";
case 1:
if (REGNO (operands[0]) < REGNO (operands[1]))
return \"mov.w %e1,%e0\;mov.w %f1,%f0\";
else
return \"mov.w %f1,%f0\;mov.w %e1,%e0\";
case 2:
/* Make sure we don't trample the register we index with. */
if (GET_CODE (operands[1]) == MEM)
{
rtx inside = XEXP (operands[1], 0);
if (REG_P (inside))
{
rn = REGNO (inside);
}
else if (GET_CODE (inside) == PLUS)
{
rtx lhs = XEXP (inside, 0);
rtx rhs = XEXP (inside, 1);
if (REG_P (lhs)) rn = REGNO (lhs);
if (REG_P (rhs)) rn = REGNO (rhs);
}
}
if (rn == REGNO (operands[0]))
/* Move the second word first. */
return \"mov.w %f1,%f0\;mov.w %e1,%e0\";
else
/* Move the first word first. */
return \"mov.w %e1,%e0\;mov.w %f1,%f0\";
case 3:
return \"mov.w %e1,%e0\;mov.w %f1,%f0\";
case 4:
return \"mov.w %f1,%T0\;mov.w %e1,%T0\";
case 5:
return \"mov.w %T1,%e0\;mov.w %T1,%f0\";
default:
abort ();
}
}"
[(set (attr "length")
(symbol_ref "compute_mov_length (operands)"))])
(define_insn "*movsi_h8300hs"
[(set (match_operand:SI 0 "general_operand_dst" "=r,r,r,<,r,r,m,*a,*a,r")
(match_operand:SI 1 "general_operand_src" "I,r,i,r,>,m,r,I,r,*a"))]
@ -501,6 +423,84 @@
(symbol_ref "compute_mov_length (operands)"))
(set_attr "cc" "set_zn,set_znv,clobber,set_znv,set_znv,set_znv,set_znv,none_0hit,none_0hit,set_znv")])
(define_expand "movsf"
[(set (match_operand:SF 0 "general_operand_dst" "")
(match_operand:SF 1 "general_operand_src" ""))]
""
"
{
if (TARGET_H8300)
{
if (h8300_expand_movsi (operands))
DONE;
}
else
{
/* One of the ops has to be in a register. */
if (!register_operand (operand1, SFmode)
&& !register_operand (operand0, SFmode))
{
operands[1] = copy_to_mode_reg (SFmode, operand1);
}
}
}")
(define_insn "*movsf_h8300"
[(set (match_operand:SF 0 "general_operand_dst" "=r,r,r,o,<,r")
(match_operand:SF 1 "general_operand_src" "G,r,io,r,r,>"))]
"TARGET_H8300
&& (register_operand (operands[0], SFmode)
|| register_operand (operands[1], SFmode))"
"*
{
/* Copy of the movsi stuff. */
unsigned int rn = -1;
switch (which_alternative)
{
case 0:
return \"sub.w %e0,%e0\;sub.w %f0,%f0\";
case 1:
if (REGNO (operands[0]) < REGNO (operands[1]))
return \"mov.w %e1,%e0\;mov.w %f1,%f0\";
else
return \"mov.w %f1,%f0\;mov.w %e1,%e0\";
case 2:
/* Make sure we don't trample the register we index with. */
if (GET_CODE (operands[1]) == MEM)
{
rtx inside = XEXP (operands[1], 0);
if (REG_P (inside))
{
rn = REGNO (inside);
}
else if (GET_CODE (inside) == PLUS)
{
rtx lhs = XEXP (inside, 0);
rtx rhs = XEXP (inside, 1);
if (REG_P (lhs)) rn = REGNO (lhs);
if (REG_P (rhs)) rn = REGNO (rhs);
}
}
if (rn == REGNO (operands[0]))
/* Move the second word first. */
return \"mov.w %f1,%f0\;mov.w %e1,%e0\";
else
/* Move the first word first. */
return \"mov.w %e1,%e0\;mov.w %f1,%f0\";
case 3:
return \"mov.w %e1,%e0\;mov.w %f1,%f0\";
case 4:
return \"mov.w %f1,%T0\;mov.w %e1,%T0\";
case 5:
return \"mov.w %T1,%e0\;mov.w %T1,%f0\";
default:
abort ();
}
}"
[(set (attr "length")
(symbol_ref "compute_mov_length (operands)"))])
(define_insn "*movsf_h8300hs"
[(set (match_operand:SF 0 "general_operand_dst" "=r,r,r,m,<,r")
(match_operand:SF 1 "general_operand_src" "G,r,im,r,r,>"))]