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alpha.md (extxl+1,+2): New patterns to work around combine lossage.

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* alpha.md (extxl+1,+2): New patterns to work around
        combine lossage.

From-SVN: r21651
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Richard Henderson 1998-08-09 18:23:59 -07:00 • committed by Richard Henderson
parent 4ef30178c0
commit b08b85c4a0
2 changed files with 28 additions and 0 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
Mon Aug 10 01:21:01 1998 Richard Henderson <rth@cygnus.com>
* alpha.md (extxl+1,+2): New patterns to work around
combine lossage.
Sat Aug 8 19:20:22 1998 Gary Thomas (gdt@linuxppc.org)
* rs6000.c (rs6000_allocate_stack_space) Fix typo which

23
gcc/config/alpha/alpha.md
View file

@ -1495,6 +1495,29 @@
"ext%M2l %r1,%3,%0"
[(set_attr "type" "shift")])
;; Combine has some strange notion of preserving existing undefined behaviour
;; in shifts larger than a word size. So capture these patterns that it
;; should have turned into zero_extracts.
(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=r")
(and (lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
(ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI")
(const_int 3)))
(match_operand:DI 3 "mode_mask_operand" "n")))]
""
"ext%U3l %1,%2,%0"
[(set_attr "type" "shift")])
(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=r")
(lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
(ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI")
(const_int 3))))]
""
"extql %1,%2,%0"
[(set_attr "type" "shift")])
(define_insn "extqh"
[(set (match_operand:DI 0 "register_operand" "=r")
(ashift:DI