i386: Use generic division to generate INVALID and DIVZERO exceptions
Introduce math_force_eval to evaluate generic division to generate INVALID and DIVZERO exceptions. libgcc/ChangeLog: * config/i386/sfp-exceptions.c (__math_force_eval): New define. (__sfp_handle_exceptions): Use __math_force_eval to evaluete generic division to generate INVALID and DIVZERO exceptions. libatomic/ChangeLog: * config/x86/fenv.c (__math_force_eval): New define. (__atomic_feraiseexcept): Use __math_force_eval to evaluete generic division to generate INVALID and DIVZERO exceptions. libgfortran/ChangeLog: * config/fpu-387.h (__math_force_eval): New define. (local_feraiseexcept): Use __math_force_eval to evaluete generic division to generate INVALID and DIVZERO exceptions.
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6 changed files with 41 additions and 36 deletions
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@ -1,3 +1,9 @@
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2020-05-01 Uroš Bizjak <ubizjak@gmail.com>
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* config/x86/fenv.c (__math_force_eval): New define.
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(__atomic_feraiseexcept): Use __math_force_eval to evaluete
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generic division to generate INVALID and DIVZERO exceptions.
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2020-04-19 Uroš Bizjak <ubizjak@gmail.com>
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* config/x86/fenv.c (__atomic_feraiseexcept) [__SSE_MATH__]:
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@ -47,6 +47,12 @@ struct fenv
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unsigned short int __unused5;
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};
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#ifdef __SSE_MATH__
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# define __math_force_eval(x) asm volatile ("" : : "x" (x));
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#else
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# define __math_force_eval(x) asm volatile ("" : : "f" (x));
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#endif
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/* Raise the supported floating-point exceptions from EXCEPTS. Other
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bits in EXCEPTS are ignored. */
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@ -56,12 +62,7 @@ __atomic_feraiseexcept (int excepts)
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if (excepts & FE_INVALID)
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{
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float f = 0.0f;
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#ifdef __SSE_MATH__
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asm volatile ("%vdivss\t{%0, %d0|%d0, %0}" : "+x" (f));
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#else
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asm volatile ("fdiv\t{%y0, %0|%0, %y0}" : "+t" (f));
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/* No need for fwait, exception is triggered by emitted fstp. */
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#endif
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__math_force_eval (f / f);
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}
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if (excepts & FE_DENORM)
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{
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@ -74,12 +75,7 @@ __atomic_feraiseexcept (int excepts)
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if (excepts & FE_DIVBYZERO)
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{
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float f = 1.0f, g = 0.0f;
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#ifdef __SSE_MATH__
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asm volatile ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g));
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#else
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asm volatile ("fdivs\t%1" : "+t" (f) : "m" (g));
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/* No need for fwait, exception is triggered by emitted fstp. */
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#endif
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__math_force_eval (f / g);
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}
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if (excepts & FE_OVERFLOW)
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{
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@ -1,3 +1,9 @@
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2020-05-01 Uroš Bizjak <ubizjak@gmail.com>
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* config/i386/sfp-exceptions.c (__math_force_eval): New define.
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(__sfp_handle_exceptions): Use __math_force_eval to evaluete
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generic division to generate INVALID and DIVZERO exceptions.
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2020-04-27 Sebastian Huber <sebastian.huber@embedded-brains.de>
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* config/rs6000/crtresfpr.S: Use .machine ppc.
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@ -41,18 +41,19 @@ struct fenv
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unsigned short int __unused5;
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};
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#ifdef __SSE_MATH__
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# define __math_force_eval(x) asm volatile ("" : : "x" (x));
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#else
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# define __math_force_eval(x) asm volatile ("" : : "f" (x));
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#endif
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void
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__sfp_handle_exceptions (int _fex)
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{
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if (_fex & FP_EX_INVALID)
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{
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float f = 0.0f;
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#ifdef __SSE_MATH__
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asm volatile ("%vdivss\t{%0, %d0|%d0, %0}" : "+x" (f));
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#else
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asm volatile ("fdiv\t{%y0, %0|%0, %y0}" : "+t" (f));
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/* No need for fwait, exception is triggered by emitted fstp. */
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#endif
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__math_force_eval (f / f);
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}
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if (_fex & FP_EX_DENORM)
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{
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if (_fex & FP_EX_DIVZERO)
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{
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float f = 1.0f, g = 0.0f;
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#ifdef __SSE_MATH__
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asm volatile ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g));
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#else
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asm volatile ("fdivs\t%1" : "+t" (f) : "m" (g));
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/* No need for fwait, exception is triggered by emitted fstp. */
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#endif
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__math_force_eval (f / g);
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}
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if (_fex & FP_EX_OVERFLOW)
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{
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@ -1,3 +1,9 @@
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2020-05-01 Uroš Bizjak <ubizjak@gmail.com>
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* config/fpu-387.h (__math_force_eval): New define.
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(local_feraiseexcept): Use __math_force_eval to evaluete
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generic division to generate INVALID and DIVZERO exceptions.
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2020-04-22 Fritz Reese <foreese@gcc.gnu.org>
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* intrinsics/trigd.c, intrinsics/trigd_lib.inc, intrinsics/trigd.inc:
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@ -91,6 +91,11 @@ my_fenv_t;
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_Static_assert (sizeof(my_fenv_t) <= (size_t) GFC_FPE_STATE_BUFFER_SIZE,
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"GFC_FPE_STATE_BUFFER_SIZE is too small");
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#ifdef __SSE_MATH__
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# define __math_force_eval(x) __asm__ __volatile__ ("" : : "x" (x));
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#else
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# define __math_force_eval(x) __asm__ __volatile__ ("" : : "f" (x));
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#endif
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/* Raise the supported floating-point exceptions from EXCEPTS. Other
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bits in EXCEPTS are ignored. Code originally borrowed from
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if (excepts & _FPU_MASK_IM)
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{
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float f = 0.0f;
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#ifdef __SSE_MATH__
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__asm__ __volatile__ ("%vdivss\t{%0, %d0|%d0, %0}" : "+x" (f));
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#else
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__asm__ __volatile__ ("fdiv\t{%y0, %0|%0, %y0}" : "+t" (f));
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/* No need for fwait, exception is triggered by emitted fstp. */
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#endif
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__math_force_eval (f / f);
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}
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if (excepts & _FPU_MASK_DM)
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{
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if (excepts & _FPU_MASK_ZM)
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{
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float f = 1.0f, g = 0.0f;
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#ifdef __SSE_MATH__
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__asm__ __volatile__ ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g));
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#else
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__asm__ __volatile__ ("fdivs\t%1" : "+t" (f) : "m" (g));
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/* No need for fwait, exception is triggered by emitted fstp. */
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#endif
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__math_force_eval (f / g);
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}
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if (excepts & _FPU_MASK_OM)
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{
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