procyberian/gcc
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

re PR target/65979 ([SH] Wrong code is generated with stage1 compiler)

Browse source 
PR target/65979
* config/sh/sh.md (tstsi_t peephole2): Use gen_rtx_SET and take into
  account the case that operands[1] and operands[2] are the same register.

From-SVN: r223721
This commit is contained in:
Oleg Endo 2015-05-26 22:32:11 +00:00 • committed by Kaz Kojima
parent 89d5c50bd1
commit afa5920a97
2 changed files with 14 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
gcc/ChangeLog
View file

@ -1,3 +1,10 @@
2015-05-26 Oleg Endo <olegendo@gcc.gnu.org>
PR target/65979
* config/sh/sh.md (tstsi_t peephole2): Use gen_rtx_SET and
take into account the case that operands[1] and operands[2]
are the same register.
2015-05-26 Michael Matz <matz@suse.de>
PR middle-end/66251

9
gcc/config/sh/sh.md
View file

@ -14722,7 +14722,11 @@ label:
|| REGNO (operands[2]) == REGNO (operands[5]))"
[(const_int 0)]
{
sh_check_add_incdec_notes (emit_move_insn (operands[2], operands[3]));
if (REGNO (operands[1]) == REGNO (operands[2]))
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]));
sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2],
operands[3])));
emit_insn (gen_tstsi_t (operands[2],
gen_rtx_REG (SImode, (REGNO (operands[1])))));
})
@ -14749,7 +14753,8 @@ label:
|| REGNO (operands[2]) == REGNO (operands[5]))"
[(const_int 0)]
{
sh_check_add_incdec_notes (emit_move_insn (operands[2], operands[3]));
sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2],
operands[3])));
emit_insn (gen_tstsi_t (operands[2],
gen_rtx_REG (SImode, (REGNO (operands[1])))));
})