i386.md (frndintxf2): Rename to ...
* config/i386/i386.md (frndintxf2): Rename to ... (rintxf2): ... this. Remove expander having same name. (rintsf2, rintdf2): Implement using SSEMODEF macro. (roundsf2, rounddf2): Ditto. (lrint<mode>di2, lrint<mode>si2): Implement using SSEMODEI24 macro. (lround<mode>di2, lround<mode>si2): Ditto. From-SVN: r122815
This commit is contained in:
parent
f9aa54d3c5
commit
acaaf0c621
2 changed files with 59 additions and 114 deletions
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@ -1,3 +1,12 @@
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2007-03-11 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (frndintxf2): Rename to ...
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(rintxf2): ... this. Remove expander having same name.
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(rintsf2, rintdf2): Implement using SSEMODEF macro.
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(roundsf2, rounddf2): Ditto.
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(lrint<mode>di2, lrint<mode>si2): Implement using SSEMODEI24 macro.
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(lround<mode>di2, lround<mode>si2): Ditto.
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2007-03-11 Steven Bosscher <steven@gcc.gnu.org>
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* lower-subreg.c: Include except.h.
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@ -41,9 +50,9 @@
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* config/i386/i386.md (UNSPEC_C2_FLAG): New constant.
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(fpremxf4_i387, fprem1xf4_i387): Use UNSPEC_C2_FLAG.
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(fmodxf3, fmod<mode>3, remainderxf3, remainder<mode>3):
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Add LABEL_NUSES to emmitted label.
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Add LABEL_NUSES to emitted label.
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* config/i386/i386.c (ix86_emit_fp_unordered_jump): Add
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branch probability value to emmitted jump insn.
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branch probability value to emitted jump insn.
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* reg-stack.c (subst_stack_regs_pat)[UNSPEC]: Handle UNSPEC_C2_FLAG.
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Do not check life information and do not re-arrange input operands
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for UNSPEC_FSCALE_EXP, UNSPEC_FPREM_U and UNSPEC_FPREM1_U.
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@ -160,10 +169,10 @@
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2007-03-09 Aldy Hernandez <aldyh@redhat.com>
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PR tree-optimization/30375
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* tree-ssa-dse.c (dse_possible_dead_store_p): Do not eliminate if
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LHS of statements is not the same.
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* testsuite/gcc.dg/tree-ssa/ssa-dse-10.c: New.
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PR tree-optimization/30375
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* tree-ssa-dse.c (dse_possible_dead_store_p): Do not eliminate if
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LHS of statements is not the same.
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* testsuite/gcc.dg/tree-ssa/ssa-dse-10.c: New.
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2007-03-09 Chao-ying Fu <fu@mips.com>
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@ -618,10 +627,11 @@
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x86_sse_unaligned_move_optimal, x86_sse_typeless_stores,
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x86_sse_load0_by_pxor, x86_use_ffreep, x86_use_incdec,
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x86_inter_unit_moves, x86_ext_80387_constants, x86_four_jump_limit,
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x86_schedule, x86_use_bt, x86_pad_returns): Merge into ...
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x86_schedule, x86_use_bt, x86_pad_returns,
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x86_use_xchgb): Merge into ...
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(ix86_tune_features): ... here. New array.
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(x86_cmove, x86_use_xchgb, x86_cmpxchg, x86_cmpxchg8b,
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x86_xadd, x86_bswap): Merge into ...
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(x86_cmove, x86_cmpxchg, x86_cmpxchg8b, x86_xadd,
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x86_bswap): Merge into ...
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(ix86_arch_features): ... here. New array.
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(x86_3dnow_a): Remove.
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(x86_accumulate_outgoing_args): Make static.
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@ -875,7 +885,7 @@
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2007-03-05 Mike Stump <mrs@apple.com>
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* c-common.c (targetcm): Add.
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* c-common.c (targetcm): Add.
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* c-opts.c (c_common_handle_option): Handle language specific
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target options.
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* opts.c (handle_option): Verify language for target options, if
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@ -17318,27 +17318,28 @@
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})
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(define_insn "frndintxf2"
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(define_insn "rintxf2"
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[(set (match_operand:XF 0 "register_operand" "=f")
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(unspec:XF [(match_operand:XF 1 "register_operand" "0")]
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UNSPEC_FRNDINT))]
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UNSPEC_FRNDINT))]
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"TARGET_USE_FANCY_MATH_387
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&& flag_unsafe_math_optimizations"
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"frndint"
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[(set_attr "type" "fpspc")
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(set_attr "mode" "XF")])
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(define_expand "rintdf2"
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[(use (match_operand:DF 0 "register_operand" ""))
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(use (match_operand:DF 1 "register_operand" ""))]
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(define_expand "rint<mode>2"
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[(use (match_operand:SSEMODEF 0 "register_operand" ""))
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(use (match_operand:SSEMODEF 1 "register_operand" ""))]
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"(TARGET_USE_FANCY_MATH_387
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&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
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&& (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
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|| TARGET_MIX_SSE_I387)
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&& flag_unsafe_math_optimizations)
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|| (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
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|| (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
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&& !flag_trapping_math
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&& !optimize_size)"
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{
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if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
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if (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
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&& !flag_trapping_math
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&& !optimize_size)
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ix86_expand_rint (operand0, operand1);
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@ -17347,70 +17348,22 @@
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rtx op0 = gen_reg_rtx (XFmode);
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rtx op1 = gen_reg_rtx (XFmode);
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emit_insn (gen_extenddfxf2 (op1, operands[1]));
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emit_insn (gen_frndintxf2 (op0, op1));
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emit_insn (gen_extend<mode>xf2 (op1, operands[1]));
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emit_insn (gen_rintxf2 (op0, op1));
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emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0));
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emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
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}
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DONE;
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})
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(define_expand "rintsf2"
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[(use (match_operand:SF 0 "register_operand" ""))
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(use (match_operand:SF 1 "register_operand" ""))]
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"(TARGET_USE_FANCY_MATH_387
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&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)
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&& flag_unsafe_math_optimizations)
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|| (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
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&& !flag_trapping_math
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&& !optimize_size)"
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{
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if (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
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&& !flag_trapping_math
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&& !optimize_size)
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ix86_expand_rint (operand0, operand1);
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else
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{
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rtx op0 = gen_reg_rtx (XFmode);
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rtx op1 = gen_reg_rtx (XFmode);
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emit_insn (gen_extendsfxf2 (op1, operands[1]));
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emit_insn (gen_frndintxf2 (op0, op1));
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emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0));
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}
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DONE;
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})
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(define_expand "rintxf2"
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[(use (match_operand:XF 0 "register_operand" ""))
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(use (match_operand:XF 1 "register_operand" ""))]
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"TARGET_USE_FANCY_MATH_387
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&& flag_unsafe_math_optimizations && !optimize_size"
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{
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emit_insn (gen_frndintxf2 (operands[0], operands[1]));
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DONE;
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})
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(define_expand "roundsf2"
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[(match_operand:SF 0 "register_operand" "")
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(match_operand:SF 1 "nonimmediate_operand" "")]
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"SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
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(define_expand "round<mode>2"
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[(match_operand:SSEMODEF 0 "register_operand" "")
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(match_operand:SSEMODEF 1 "nonimmediate_operand" "")]
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"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
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&& !flag_trapping_math && !flag_rounding_math
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&& !optimize_size"
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{
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ix86_expand_round (operand0, operand1);
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DONE;
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})
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(define_expand "rounddf2"
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[(match_operand:DF 0 "register_operand" "")
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(match_operand:DF 1 "nonimmediate_operand" "")]
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"SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
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&& !flag_trapping_math && !flag_rounding_math
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&& !optimize_size"
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{
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if (TARGET_64BIT)
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if ((<MODE>mode != DFmode) || TARGET_64BIT)
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ix86_expand_round (operand0, operand1);
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else
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ix86_expand_rounddf_32 (operand0, operand1);
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(define_insn_and_split "*fistdi2_1"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r")
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(unspec:DI [(match_operand:XF 1 "register_operand" "f,f")]
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UNSPEC_FIST))]
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UNSPEC_FIST))]
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"TARGET_USE_FANCY_MATH_387
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&& !(reload_completed || reload_in_progress)"
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"#"
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@ -17443,7 +17396,7 @@
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(define_insn "fistdi2"
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[(set (match_operand:DI 0 "memory_operand" "=m")
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(unspec:DI [(match_operand:XF 1 "register_operand" "f")]
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UNSPEC_FIST))
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UNSPEC_FIST))
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(clobber (match_scratch:XF 2 "=&1f"))]
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"TARGET_USE_FANCY_MATH_387"
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"* return output_fix_trunc (insn, operands, 0);"
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@ -17453,7 +17406,7 @@
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(define_insn "fistdi2_with_temp"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r")
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(unspec:DI [(match_operand:XF 1 "register_operand" "f,f")]
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UNSPEC_FIST))
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UNSPEC_FIST))
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(clobber (match_operand:DI 2 "memory_operand" "=m,m"))
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(clobber (match_scratch:XF 3 "=&1f,&1f"))]
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"TARGET_USE_FANCY_MATH_387"
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@ -17464,7 +17417,7 @@
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(define_split
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[(set (match_operand:DI 0 "register_operand" "")
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(unspec:DI [(match_operand:XF 1 "register_operand" "")]
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UNSPEC_FIST))
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UNSPEC_FIST))
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(clobber (match_operand:DI 2 "memory_operand" ""))
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(clobber (match_scratch 3 ""))]
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"reload_completed"
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@ -17476,7 +17429,7 @@
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(define_split
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[(set (match_operand:DI 0 "memory_operand" "")
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(unspec:DI [(match_operand:XF 1 "register_operand" "")]
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UNSPEC_FIST))
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UNSPEC_FIST))
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(clobber (match_operand:DI 2 "memory_operand" ""))
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(clobber (match_scratch 3 ""))]
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"reload_completed"
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@ -17487,7 +17440,7 @@
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(define_insn_and_split "*fist<mode>2_1"
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[(set (match_operand:X87MODEI12 0 "register_operand" "=r")
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(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")]
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UNSPEC_FIST))]
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UNSPEC_FIST))]
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"TARGET_USE_FANCY_MATH_387
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&& !(reload_completed || reload_in_progress)"
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"#"
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@ -17505,7 +17458,7 @@
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(define_insn "fist<mode>2"
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[(set (match_operand:X87MODEI12 0 "memory_operand" "=m")
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(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")]
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UNSPEC_FIST))]
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UNSPEC_FIST))]
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"TARGET_USE_FANCY_MATH_387"
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"* return output_fix_trunc (insn, operands, 0);"
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[(set_attr "type" "fpspc")
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@ -17514,7 +17467,7 @@
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(define_insn "fist<mode>2_with_temp"
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[(set (match_operand:X87MODEI12 0 "register_operand" "=r")
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(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")]
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UNSPEC_FIST))
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UNSPEC_FIST))
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(clobber (match_operand:X87MODEI12 2 "memory_operand" "=m"))]
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"TARGET_USE_FANCY_MATH_387"
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"#"
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@ -17524,60 +17477,42 @@
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(define_split
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[(set (match_operand:X87MODEI12 0 "register_operand" "")
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(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")]
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UNSPEC_FIST))
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UNSPEC_FIST))
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(clobber (match_operand:X87MODEI12 2 "memory_operand" ""))]
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"reload_completed"
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[(set (match_dup 2) (unspec:X87MODEI12 [(match_dup 1)]
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UNSPEC_FIST))
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[(set (match_dup 2) (unspec:X87MODEI12 [(match_dup 1)] UNSPEC_FIST))
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(set (match_dup 0) (match_dup 2))]
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"")
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(define_split
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[(set (match_operand:X87MODEI12 0 "memory_operand" "")
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(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")]
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UNSPEC_FIST))
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UNSPEC_FIST))
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(clobber (match_operand:X87MODEI12 2 "memory_operand" ""))]
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"reload_completed"
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[(set (match_dup 0) (unspec:X87MODEI12 [(match_dup 1)]
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UNSPEC_FIST))]
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[(set (match_dup 0) (unspec:X87MODEI12 [(match_dup 1)] UNSPEC_FIST))]
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"")
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(define_expand "lrintxf<mode>2"
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[(set (match_operand:X87MODEI 0 "nonimmediate_operand" "")
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(unspec:X87MODEI [(match_operand:XF 1 "register_operand" "")]
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UNSPEC_FIST))]
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UNSPEC_FIST))]
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"TARGET_USE_FANCY_MATH_387"
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"")
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(define_expand "lrint<mode>di2"
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[(set (match_operand:DI 0 "nonimmediate_operand" "")
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(unspec:DI [(match_operand:SSEMODEF 1 "register_operand" "")]
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UNSPEC_FIX_NOTRUNC))]
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"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT"
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(define_expand "lrint<SSEMODEF:mode><SSEMODEI24:mode>2"
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[(set (match_operand:SSEMODEI24 0 "nonimmediate_operand" "")
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(unspec:SSEMODEI24 [(match_operand:SSEMODEF 1 "register_operand" "")]
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UNSPEC_FIX_NOTRUNC))]
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"SSE_FLOAT_MODE_P (<SSEMODEF:MODE>mode) && TARGET_SSE_MATH
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&& ((<SSEMODEI24:MODE>mode != DImode) || TARGET_64BIT)"
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"")
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(define_expand "lrint<mode>si2"
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[(set (match_operand:SI 0 "nonimmediate_operand" "")
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(unspec:SI [(match_operand:SSEMODEF 1 "register_operand" "")]
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UNSPEC_FIX_NOTRUNC))]
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"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
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"")
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(define_expand "lround<mode>di2"
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[(match_operand:DI 0 "nonimmediate_operand" "")
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(match_operand:SSEMODEF 1 "register_operand" "")]
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"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT
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&& !flag_trapping_math && !flag_rounding_math
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&& !optimize_size"
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{
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ix86_expand_lround (operand0, operand1);
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DONE;
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})
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(define_expand "lround<mode>si2"
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[(match_operand:SI 0 "nonimmediate_operand" "")
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(define_expand "lround<SSEMODEF:mode><SSEMODEI24:mode>2"
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[(match_operand:SSEMODEI24 0 "nonimmediate_operand" "")
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(match_operand:SSEMODEF 1 "register_operand" "")]
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"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
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&& ((<SSEMODEI24:MODE>mode != DImode) || TARGET_64BIT)
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&& !flag_trapping_math && !flag_rounding_math
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&& !optimize_size"
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{
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Loading…
Add table
Reference in a new issue