diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8583f98fb48..baa42b2a104 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2006-01-25 Kaz Kojima + + * config/sh/predicates.md (sh_register_operand): Accept CONST_DOUBLE. + 2006-01-24 David Daney PR java/25816 diff --git a/gcc/config/sh/predicates.md b/gcc/config/sh/predicates.md index 7a55b8b4809..26e9548c220 100644 --- a/gcc/config/sh/predicates.md +++ b/gcc/config/sh/predicates.md @@ -614,7 +614,7 @@ ;; the constant zero like a general register. (define_predicate "sh_register_operand" - (match_code "reg,subreg,const_int") + (match_code "reg,subreg,const_int,const_double") { if (op == CONST0_RTX (mode) && TARGET_SHMEDIA) return 1; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0ca67f09730..159df246fef 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2006-01-25 Kaz Kojima + + * gcc.dg/tree-ssa/gen-vect-33.c: New. + 2006-01-24 Jerry DeLisle PR fortran/25835 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-33.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-33.c new file mode 100644 index 00000000000..8cd12da3d8c --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-33.c @@ -0,0 +1,14 @@ +/* Compiler generates 64-bit stores of zero for this on some targets. + Check there is no problem for such case. */ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize" } */ + +void +foo (float *dest, int xcount, int ycount) +{ + int x, y; + + for (y = 0; y < ycount; y++) + for (x = 0; x < xcount; x++) + dest[x + y] = (float) 0; +}