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RISC-V: Fix asm check failure for truncated after SAT_SUB

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It seems that the asm check is incorrect for truncated after SAT_SUB,
we should take the vx check for vssubu instead of vv check.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-1.c:
	Update vssubu check from vv to vx.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-2.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-3.c:
	Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
This commit is contained in:
Pan Li 2024-07-03 13:17:16 +08:00
parent 2be2145f4f
commit ab3e3d2f05
3 changed files with 3 additions and 3 deletions
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2
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-1.c
View file

@ -11,7 +11,7 @@
** vsetvli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*e16,\s*m1,\s*ta,\s*ma
** ...
** vle16\.v\s+v[0-9]+,\s*0\([atx][0-9]+\)
** vssubu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
** vssubu\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[atx][0-9]+
** vsetvli\s+zero,\s*zero,\s*e8,\s*mf2,\s*ta,\s*ma
** vncvt\.x\.x\.w\s+v[0-9]+,\s*v[0-9]+
** ...

2
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-2.c
View file

@ -11,7 +11,7 @@
** vsetvli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*e32,\s*m1,\s*ta,\s*ma
** ...
** vle32\.v\s+v[0-9]+,\s*0\([atx][0-9]+\)
** vssubu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
** vssubu\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[atx][0-9]+
** vsetvli\s+zero,\s*zero,\s*e16,\s*mf2,\s*ta,\s*ma
** vncvt\.x\.x\.w\s+v[0-9]+,\s*v[0-9]+
** ...

2
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-3.c
View file

@ -11,7 +11,7 @@
** vsetvli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*e64,\s*m1,\s*ta,\s*ma
** ...
** vle64\.v\s+v[0-9]+,\s*0\([atx][0-9]+\)
** vssubu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
** vssubu\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[atx][0-9]+
** vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*ta,\s*ma
** vncvt\.x\.x\.w\s+v[0-9]+,\s*v[0-9]+
** ...