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i386.md (sqrt?f2): Change to expander.

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* i386.md (sqrt?f2): Change to expander.
	(sqrt?f2_1, sqrt?f2_sse_only, sqrt?f2_i387): New.

From-SVN: r39645
This commit is contained in:
Jan Hubicka 2001-02-13 22:04:57 +01:00 • committed by Jan Hubicka
parent d9c695fff1
commit a8083431ba
2 changed files with 72 additions and 4 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
Tue Feb 13 22:03:07 CET 2001 Jan Hubicka <jh@suse.cz>
* i386.md (sqrt?f2): Change to expander.
(sqrt?f2_1, sqrt?f2_sse_only, sqrt?f2_i387): New.
Tue Feb 13 15:42:05 2001 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
* rtlanal.c (find_reg_equal_equiv_note): New function.

71
gcc/config/i386/i386.md
View file

@ -10766,20 +10766,83 @@
;; FPU special functions.
(define_insn "sqrtsf2"
(define_expand "sqrtsf2"
[(set (match_operand:SF 0 "register_operand" "")
(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "")))]
"(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE2"
"
{
if (!TARGET_SSE)
operands[1] = force_reg (SFmode, operands[1]);
}")
(define_insn "sqrtsf2_1"
[(set (match_operand:SF 0 "register_operand" "=f#Y,Y#f")
(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "0#Y,Ym#f")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_SSE && TARGET_MIX_SSE_I387)"
"@
fsqrt
sqrtss\\t{%1, %0|%0, %1}"
[(set_attr "type" "fpspc,sse")
(set_attr "mode" "SF,SF")
(set_attr "athlon_decode" "direct,*")])
(define_insn "sqrtsf2_1_sse_only"
[(set (match_operand:SF 0 "register_operand" "=Y")
(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "Ym")))]
"TARGET_SSE && (!TARGET_80387 || !TARGET_MIX_SSE_I387)"
"sqrtss\\t{%1, %0|%0, %1}"
[(set_attr "type" "sse")
(set_attr "mode" "SF")
(set_attr "athlon_decode" "*")])
(define_insn "sqrtsf2_i387"
[(set (match_operand:SF 0 "register_operand" "=f")
(sqrt:SF (match_operand:SF 1 "register_operand" "0")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (!TARGET_SSE && !TARGET_MIX_SSE_I387)"
"fsqrt"
[(set_attr "type" "fpspc")
(set_attr "mode" "SF")
(set_attr "athlon_decode" "direct")])
(define_insn "sqrtdf2"
(define_expand "sqrtdf2"
[(set (match_operand:DF 0 "register_operand" "")
(sqrt:DF (match_operand:DF 1 "nonimmediate_operand" "")))]
"(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE2"
"
{
if (!TARGET_SSE2)
operands[1] = force_reg (SFmode, operands[1]);
}")
(define_insn "sqrtdf2_1"
[(set (match_operand:DF 0 "register_operand" "=f#Y,Y#f")
(sqrt:DF (match_operand:DF 1 "nonimmediate_operand" "0#Y,Ym#f")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_SSE2 && TARGET_MIX_SSE_I387)"
"@
fsqrt
sqrtsd\\t{%1, %0|%0, %1}"
[(set_attr "type" "fpspc,sse")
(set_attr "mode" "DF,DF")
(set_attr "athlon_decode" "direct,*")])
(define_insn "sqrtdf2_1_sse_only"
[(set (match_operand:DF 0 "register_operand" "=Y")
(sqrt:DF (match_operand:DF 1 "nonimmediate_operand" "Ym")))]
"TARGET_SSE2 && (!TARGET_80387 || !TARGET_MIX_SSE_I387)"
"sqrtsd\\t{%1, %0|%0, %1}"
[(set_attr "type" "sse")
(set_attr "mode" "DF")
(set_attr "athlon_decode" "*")])
(define_insn "sqrtdf2_i387"
[(set (match_operand:DF 0 "register_operand" "=f")
(sqrt:DF (match_operand:DF 1 "register_operand" "0")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
&& (!TARGET_SSE2 && !TARGET_MIX_SSE_I387)"
"fsqrt"
[(set_attr "type" "fpspc")
(set_attr "mode" "DF")