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sync.md (*atomic_fetch_add_cmp<mode>): Use incdec_operand predicate to return INC or DEC insn mnemonic.

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* config/i386/sync.md (*atomic_fetch_add_cmp<mode>): Use
	incdec_operand predicate to return INC or DEC insn mnemonic.
	Add %K operand modifier.
	(atomic_add<mode>): Use incdec_operand predicate to
	return INC or DEC insn mnemonic.
	(atomic_dec<mode>): Ditto.

From-SVN: r190132
This commit is contained in:
Uros Bizjak 2012-08-03 19:40:34 +02:00
parent d97577ed2c
commit a6de48da4d
2 changed files with 43 additions and 25 deletions
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24
gcc/ChangeLog
View file

@ -1,3 +1,12 @@
2012-08-03 Uros Bizjak <ubizjak@gmail.com>
* config/i386/sync.md (*atomic_fetch_add_cmp<mode>): Use
incdec_operand predicate to return INC or DEC insn mnemonic.
Add %K operand modifier.
(atomic_add<mode>): Use incdec_operand predicate to
return INC or DEC insn mnemonic.
(atomic_dec<mode>): Ditto.
2012-08-03 Michael Matz <matz@suse.de>
PR tree-optimization/54146
@ -42,8 +51,8 @@
(slsr_process_add): Likewise.
* tree-inline.c (remap_ssa_name): Do not set the type of the
new SSA_NAME.
* tree-ssa-structalias.c (get_constraint_for_ssa_var): Clarify
assert. Check for default def first.
* tree-ssa-structalias.c (get_constraint_for_ssa_var): Clarify assert.
Check for default def first.
2012-08-04 Steven Bosscher <steven@gcc.gnu.org>
@ -79,8 +88,8 @@
* reg-stack.c (subst_stack_regs_pat): Ditto.
* reload.c (find_reloads, find_equiv_reg): Ditto.
* rtlanal.c (replace_rtx): Remove test.
* rtlanal.c (constant_pool_constant_p, split_double): Encapsulate test for
CONST_DOUBLE in macro.
* rtlanal.c (constant_pool_constant_p, split_double): Encapsulate
test for CONST_DOUBLE in macro.
* simplify-rtx.c (mode_signbit_p, avoid_constant_pool_reference)
(simplify_unary_operation_1, simplify_const_unary_operation)
(simplify_binary_operation_1, simplify_const_binary_operation)
@ -88,8 +97,7 @@
(simplify_const_relational_operations)
(implify_subreg): Ditto.
* varasm.c (output_constant_pool_2): Ditto.
* rtl.h (CONST_DOUBLE_AS_INT_P, CONST_DOUBLE_AS_FLOAT_P): New
macros.
* rtl.h (CONST_DOUBLE_AS_INT_P, CONST_DOUBLE_AS_FLOAT_P): New macros.
* rtl.def (CONST_DOUBLE): Updated comments.
2012-08-02 Richard Sandiford <rdsandiford@googlemail.com>
@ -319,7 +327,8 @@
(tree_function_versioning): Likewise.
* tree-pass.h (PROP_referenced_vars): Remove.
(pass_referenced_vars): Likewise.
* tree-profile.c (gimple_gen_edge_profiler): Do not add referenced vars.
* tree-profile.c (gimple_gen_edge_profiler): Do not add
referenced vars.
(gimple_gen_interval_profiler): Likewise.
(gimple_gen_pow2_profiler): Likewise.
(gimple_gen_one_value_profiler): Likewise.
@ -445,7 +454,6 @@
2012-08-01 Catherine Moore <clm@codesourcery.com>
Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/mips/mips-cpus.def (34kn): New.
* config/mips/mips.h (MIPS_ARCH_FLOAT_SPEC): Add 34kn.
(BASE_DRIVER_SELF_SPECS): Do not imply -mdsp for the 34kn.

44
gcc/config/i386/sync.md
View file

@ -495,29 +495,33 @@
(define_insn "*atomic_fetch_add_cmp<mode>"
[(set (reg:CCZ FLAGS_REG)
(compare:CCZ (unspec_volatile:SWI
[(match_operand:SWI 0 "memory_operand" "+m")
(match_operand:SI 3 "const_int_operand")]
UNSPECV_XCHG)
(match_operand:SWI 2 "const_int_operand" "i")))
(compare:CCZ
(unspec_volatile:SWI
[(match_operand:SWI 0 "memory_operand" "+m")
(match_operand:SI 3 "const_int_operand")] ;; model
UNSPECV_XCHG)
(match_operand:SWI 2 "const_int_operand" "i")))
(set (match_dup 0)
(plus:SWI (match_dup 0)
(match_operand:SWI 1 "const_int_operand" "i")))]
"(unsigned HOST_WIDE_INT) INTVAL (operands[1])
== -(unsigned HOST_WIDE_INT) INTVAL (operands[2])"
{
if (TARGET_USE_INCDEC)
if (incdec_operand (operands[1], <MODE>mode))
{
if (operands[1] == const1_rtx)
return "lock{%;} inc{<imodesuffix>}\t%0";
if (operands[1] == constm1_rtx)
return "lock{%;} dec{<imodesuffix>}\t%0";
return "lock{%;} %K3inc{<imodesuffix>}\t%0";
else
{
gcc_assert (operands[1] == constm1_rtx);
return "lock{%;} %K3dec{<imodesuffix>}\t%0";
}
}
if (x86_maybe_negate_const_int (&operands[1], <MODE>mode))
return "lock{%;} sub{<imodesuffix>}\t{%1, %0|%0, %1}";
return "lock{%;} %K3sub{<imodesuffix>}\t{%1, %0|%0, %1}";
return "lock{%;} add{<imodesuffix>}\t{%1, %0|%0, %1}";
return "lock{%;} %K3add{<imodesuffix>}\t{%1, %0|%0, %1}";
})
;; Recall that xchg implicitly sets LOCK#, so adding it again wastes space.
@ -543,12 +547,15 @@
(clobber (reg:CC FLAGS_REG))]
""
{
if (TARGET_USE_INCDEC)
if (incdec_operand (operands[1], <MODE>mode))
{
if (operands[1] == const1_rtx)
return "lock{%;} %K2inc{<imodesuffix>}\t%0";
if (operands[1] == constm1_rtx)
return "lock{%;} %K2dec{<imodesuffix>}\t%0";
else
{
gcc_assert (operands[1] == constm1_rtx);
return "lock{%;} %K2dec{<imodesuffix>}\t%0";
}
}
if (x86_maybe_negate_const_int (&operands[1], <MODE>mode))
@ -567,12 +574,15 @@
(clobber (reg:CC FLAGS_REG))]
""
{
if (TARGET_USE_INCDEC)
if (incdec_operand (operands[1], <MODE>mode))
{
if (operands[1] == const1_rtx)
return "lock{%;} %K2dec{<imodesuffix>}\t%0";
if (operands[1] == constm1_rtx)
return "lock{%;} %K2inc{<imodesuffix>}\t%0";
else
{
gcc_assert (operands[1] == constm1_rtx);
return "lock{%;} %K2inc{<imodesuffix>}\t%0";
}
}
if (x86_maybe_negate_const_int (&operands[1], <MODE>mode))