config.gcc: Remove obsolete ports and configurations.

gcc/
	* config.gcc: Remove obsolete ports and configurations.
	* config/linux-aout.h, config/netware.h,
	config/t-linux-gnulibc1, config/d30v/abi,
	config/d30v/d30v-protos.h, config/d30v/d30v.c,
	config/d30v/d30v.h, config/d30v/d30v.md,
	config/d30v/libgcc1.asm, config/d30v/t-d30v,
	config/dsp16xx/dsp16xx-modes.def,
	config/dsp16xx/dsp16xx-protos.h, config/dsp16xx/dsp16xx.c,
	config/dsp16xx/dsp16xx.h, config/dsp16xx/dsp16xx.md,
	config/i370/README, config/i370/i370-c.c,
	config/i370/i370-protos.h, config/i370/i370.c,
	config/i370/i370.h, config/i370/i370.md, config/i370/linux.h,
	config/i370/mvs.h, config/i370/oe.h, config/i370/t-i370,
	config/i386/freebsd-aout.h, config/i386/linux-aout.h,
	config/i386/moss.h, config/i386/netware.h,
	config/i386/svr3.ifile, config/i386/svr3dbx.h,
	config/i386/svr3gas.h, config/i386/svr3z.ifile,
	config/i386/t-udk, config/i386/udk.h, config/i386/vsta.h,
	config/i960/i960-c.c, config/i960/i960-coff.h,
	config/i960/i960-modes.def, config/i960/i960-protos.h,
	config/i960/i960.c, config/i960/i960.h, config/i960/i960.md,
	config/i960/rtems.h, config/i960/t-960bare,
	config/m68k/hp310.h, config/m68k/hp320.h,
	config/m68k/hp320base.h, config/m68k/m68kv4.h,
	config/m68k/netbsd.h, config/m68k/sgs.h, config/m68k/t-hp320:
	Remove.
	* doc/extend.texi, doc/install.texi, doc/invoke.texi,
	doc/md.texi: Remove mentions of obsolete ports.

	testsuite/
	* gcc.dg/20020312-2.c, gcc.dg/builtin-inf-1.c,
	gcc.dg/sibcall-3.c, gcc.dg/sibcall-4.c, gcc.dg/cpp/assert4.c:
	Remove mentions of obsolete ports.

From-SVN: r77216
This commit is contained in:
Kazu Hirata 2004-02-04 05:13:43 +00:00 committed by Kazu Hirata
parent c3bf16ff7d
commit a4a4b1d364
64 changed files with 45 additions and 35830 deletions

View file

@ -1,3 +1,34 @@
2004-02-04 Kazu Hirata <kazu@cs.umass.edu>
* config.gcc: Remove obsolete ports and configurations.
* config/linux-aout.h, config/netware.h,
config/t-linux-gnulibc1, config/d30v/abi,
config/d30v/d30v-protos.h, config/d30v/d30v.c,
config/d30v/d30v.h, config/d30v/d30v.md,
config/d30v/libgcc1.asm, config/d30v/t-d30v,
config/dsp16xx/dsp16xx-modes.def,
config/dsp16xx/dsp16xx-protos.h, config/dsp16xx/dsp16xx.c,
config/dsp16xx/dsp16xx.h, config/dsp16xx/dsp16xx.md,
config/i370/README, config/i370/i370-c.c,
config/i370/i370-protos.h, config/i370/i370.c,
config/i370/i370.h, config/i370/i370.md, config/i370/linux.h,
config/i370/mvs.h, config/i370/oe.h, config/i370/t-i370,
config/i386/freebsd-aout.h, config/i386/linux-aout.h,
config/i386/moss.h, config/i386/netware.h,
config/i386/svr3.ifile, config/i386/svr3dbx.h,
config/i386/svr3gas.h, config/i386/svr3z.ifile,
config/i386/t-udk, config/i386/udk.h, config/i386/vsta.h,
config/i960/i960-c.c, config/i960/i960-coff.h,
config/i960/i960-modes.def, config/i960/i960-protos.h,
config/i960/i960.c, config/i960/i960.h, config/i960/i960.md,
config/i960/rtems.h, config/i960/t-960bare,
config/m68k/hp310.h, config/m68k/hp320.h,
config/m68k/hp320base.h, config/m68k/m68kv4.h,
config/m68k/netbsd.h, config/m68k/sgs.h, config/m68k/t-hp320:
Remove.
* doc/extend.texi, doc/install.texi, doc/invoke.texi,
doc/md.texi: Remove mentions of obsolete ports.
2004-02-04 Jan Hubicka <jh@suse.cz>
* alias.c (find_base_term, get_addr): Do not dereference NULL

View file

@ -58,7 +58,7 @@
# tm_file="${tm_file} dbxelf.h elfos.h svr4.h ${cpu_type.h}/elf.h"
# Note that the preferred order is:
# - specific target header "${cpu_type}/${cpu_type.h}"
# - generic headers like dbxelf.h elfos.h, netware.h, etc.
# - generic headers like dbxelf.h elfos.h, etc.
# - specializing target headers like ${cpu_type.h}/elf.h
# This helps to keep OS specific stuff out of the CPU
# defining header ${cpu_type}/${cpu_type.h}.
@ -182,23 +182,7 @@ md_file=
# Obsolete configurations.
case ${target} in
d30v-* | \
dsp16xx-* | \
i370-* | \
i960-* | \
i?86-moss-msdos | i?86-*-moss* | \
i?86-ncr-sysv4* | \
i?86-*-netware | \
i?86-*-freebsd2* | i?86-*-freebsd*aout* | \
i?86-*-linux*aout* | \
i?86-*-linux*libc1* | \
i?86-*-interix | \
i?86-*-mach* | \
i?86-*-udk* | \
i?86-*-sysv[123]* | \
i386-*-vsta | \
m68k-hp-hpux* | m68000-hp-hpux* | \
m68k-*-sysv4*)
dummy*)
if test "x$enable_obsolete" != xyes; then
echo "*** Configuration ${target} is obsolete." >&2
echo "*** Specify --enable-obsolete to build it anyway." >&2
@ -726,12 +710,6 @@ cris-*-linux*)
tm_file="dbxelf.h elfos.h svr4.h ${tm_file} linux.h cris/linux.h"
tmake_file="cris/t-cris t-slibgcc-elf-ver cris/t-linux"
;;
d30v-*)
tm_file="dbxelf.h elfos.h svr4.h ${tm_file}"
;;
dsp16xx-*)
use_fixproto=yes
;;
fr30-*-elf)
tm_file="dbxelf.h elfos.h svr4.h ${tm_file}"
tmake_file=fr30/t-fr30
@ -900,16 +878,6 @@ i[34567]86-*-elf*)
tmake_file="i386/t-i386elf t-svr4"
use_fixproto=yes
;;
i[34567]86-ncr-sysv4*) # NCR 3000 - ix86 running system V.4
xm_defines="SMALL_ARG_MAX"
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h svr4.h i386/sysv4.h i386/sysv4-cpp.h"
extra_parts="crtbegin.o crtend.o"
tmake_file=i386/t-crtpic
use_fixproto=yes
;;
i[34567]86-*-netware) # Intel 80386's running netware
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h svr4.h i386/sysv4.h netware.h i386/netware.h"
;;
i[34567]86-sequent-ptx4* | i[34567]86-sequent-sysv4*)
if test x$gas = xyes
then
@ -930,10 +898,6 @@ i[34567]86-*-beoself* | i[34567]86-*-beos*)
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h svr4.h i386/beos-elf.h"
extra_parts='crtbegin.o crtend.o'
;;
i[34567]86-*-freebsd2 | i[34567]86-*-freebsd2.* | i[34567]86-*-freebsd*aout*)
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/gstabs.h i386/freebsd-aout.h"
tmake_file=t-freebsd
;;
i[34567]86-*-freebsd*)
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h ${fbsd_tm_file} i386/freebsd.h"
;;
@ -963,23 +927,6 @@ i[34567]86-*-coff*)
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h dbxcoff.h i386/i386-coff.h"
use_fixproto=yes
;;
i[34567]86-*-linux*aout*) # Intel 80386's running GNU/Linux
# with a.out format
tmake_file="i386/t-crtstuff"
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/gstabs.h linux-aout.h i386/linux-aout.h"
gnu_ld=yes
;;
i[34567]86-*-linux*libc1) # Intel 80386's running GNU/Linux
# with ELF format using the
# GNU/Linux C library 5
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h svr4.h linux.h i386/linux.h"
tmake_file="t-slibgcc-elf-ver t-linux t-linux-gnulibc1 i386/t-crtstuff"
extra_parts="crtbegin.o crtbeginS.o crtend.o crtendS.o"
gnu_ld=yes
if test x$enable_threads = xyes; then
thread_file='single'
fi
;;
i[34567]86-*-linux*) # Intel 80386's running GNU/Linux
# with ELF format using glibc 2
# aka GNU/Linux C library 6
@ -1006,13 +953,6 @@ i[34567]86-pc-msdosdjgpp*)
gnu_ld=yes
gas=yes
;;
i[34567]86-moss-msdos* | i[34567]86-*-moss*)
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h svr4.h linux.h i386/linux.h i386/moss.h"
tmake_file=t-libc-ok
gnu_ld=yes
gas=yes
use_fixproto=yes
;;
i[34567]86-*-lynxos*)
if test x$gas = xyes
then
@ -1022,12 +962,6 @@ i[34567]86-*-lynxos*)
fi
use_fixproto=yes
;;
i[34567]86-*-mach*)
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/gstabs.h i386/mach.h"
# tmake_file=t-libc-ok
use_collect2=yes
use_fixproto=yes
;;
i[34567]86-*-nto-qnx*)
tm_file="${tm_file} i386/att.h dbxelf.h tm-dwarf2.h elfos.h svr4.h i386/unix.h i386/nto.h"
tmake_file=i386/t-nto
@ -1097,38 +1031,6 @@ i[34567]86-*-sysv4*) # Intel 80386's running system V.4
extra_parts="crtbegin.o crtend.o"
use_fixproto=yes
;;
i[34567]86-*-udk*) # Intel x86 on SCO UW/OSR5 Dev Kit
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h svr4.h i386/sysv4.h i386/sysv5.h i386/udk.h"
tmake_file="i386/t-crtpic i386/t-udk t-svr4"
extra_parts="crtbegin.o crtend.o"
use_fixproto=yes
;;
i[34567]86-*-sysv*) # Intel 80386's running system V
if test x$gas = xyes
then
if test x$stabs = xyes
then
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/svr3gas.h i386/svr3dbx.h"
tmake_file=i386/t-svr3dbx
extra_parts="svr3.ifile svr3z.ifile"
else
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/svr3gas.h"
extra_parts="crtbegin.o crtend.o"
tmake_file=i386/t-crtstuff
fi
else
tm_file="${tm_file} svr3.h i386/unix.h i386/att.h i386/sysv3.h"
extra_parts="crtbegin.o crtend.o"
tmake_file=i386/t-crtstuff
fi
tmake_file="$tmake_file i386/t-crtpic"
use_fixproto=yes
;;
i386-*-vsta) # Intel 80386's running VSTa kernel
xm_file="i386/xm-vsta.h"
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/vsta.h"
use_fixproto=yes
;;
i[4567]86-wrs-vxworks)
tm_file="${tm_file} i386/sysv4.h i386/unix.h i386/vxworks.h"
tmake_file="${tmake_file} i386/t-vxworks"
@ -1180,17 +1082,6 @@ i[34567]86-*-interix3*)
tm_file="${tm_file} dbxcoff.h"
fi
;;
i[34567]86-*-interix*)
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/i386-interix.h interix.h"
tmake_file="i386/t-interix"
extra_objs=winnt.o
if test x$enable_threads = xyes ; then
thread_file='posix'
fi
if test x$stabs = xyes ; then
tm_file="${tm_file} dbxcoff.h"
fi
;;
i[34567]86-*-kaos*)
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h i386/i386elf.h kaos.h i386/kaos-i386.h"
tmake_file="i386/t-i386elf t-svr4"
@ -1201,25 +1092,6 @@ i860-*-sysv4*)
extra_parts="crtbegin.o crtend.o"
use_fixproto=yes
;;
i960-*-coff*)
tm_file="${tm_file} dbxcoff.h i960/i960-coff.h libgloss.h"
tmake_file=i960/t-960bare
c_target_objs="i960-c.o"
cxx_target_objs="i960-c.o"
;;
i960-*-rtems)
tmake_file="i960/t-960bare t-rtems"
tm_file="${tm_file} dbxcoff.h i960/i960-coff.h i960/rtems.h rtems.h"
c_target_objs="i960-c.o"
cxx_target_objs="i960-c.o"
;;
i960-*-*) # Default i960 environment.
use_collect2=yes
tmake_file=i960/t-960bare
c_target_objs="i960-c.o"
cxx_target_objs="i960-c.o"
use_fixproto=yes
;;
ia64*-*-elf*)
tm_file="${tm_file} dbxelf.h elfos.h ia64/sysv4.h ia64/elf.h"
tmake_file="ia64/t-ia64"
@ -1324,37 +1196,6 @@ m68hc12-*-*|m6812-*-*)
tmake_file="m68hc11/t-m68hc11-gas"
use_fixproto=yes
;;
m68000-hp-hpux*) # HP 9000 series 300
tm_file="m68k/hp320base.h m68k/m68k.h m68k/hp320.h m68k/hp310.h"
tm_defines="TARGET_DEFAULT=0" # 68000, no 68881, no bitfield ops
if test x$gas = xyes
then
tm_defines="${tm_defines} DBX_DEBUGGING_INFO=1 USE_GAS"
fi
tmake_file=m68k/t-hp320
use_collect2=yes
use_fixproto=yes
;;
m68k-hp-hpux7*) # HP 9000 series 300 running HPUX version 7.
tm_file="m68k/hp320base.h m68k/m68k.h m68k/hp320.h"
if test x$gas = xyes
then
tm_defines="DBX_DEBUGGING_INFO=1 USE_GAS"
else
tm_defines="NO_DOT_IN_LABEL NO_BUGS"
fi
use_collect2=yes
use_fixproto=yes
;;
m68k-hp-hpux*) # HP 9000 series 300
tm_file="m68k/hp320base.h m68k/m68k.h m68k/hp320.h"
if test x$gas = xyes
then
tm_defines="DBX_DEBUGGING_INFO=1 USE_GAS"
fi
use_collect2=yes
use_fixproto=yes
;;
m68k-*-aout*)
tmake_file=m68k/t-m68kbare
tm_file="m68k/m68k.h m68k/m68k-none.h m68k/m68kemb.h m68k/m68k-aout.h libgloss.h"
@ -1384,34 +1225,6 @@ m68010-*-netbsdelf* | m68k*-*-netbsdelf*)
;;
esac
;;
m68k*-*-netbsd*)
if test "x$enable_obsolete" != xyes; then
echo "*** Configuration ${target} is obsolete." >&2
echo "*** Specify --enable-obsolete to build it anyway." >&2
echo "*** Support will be REMOVED in the next major release of GCC," >&2
echo "*** unless a maintainer comes forward." >&2
exit 1
fi
tm_file="m68k/m68k.h netbsd.h netbsd-aout.h m68k/netbsd.h"
tmake_file=t-netbsd
extra_parts=""
use_collect2=yes
;;
m68k*-*-openbsd*)
# needed to unconfuse gdb
tm_defines="OBSD_OLD_GAS TARGET_DEFAULT=(MASK_68020|MASK_68881|MASK_BITFIELD)"
tm_file="m68k/m68k.h openbsd.h m68k/openbsd.h"
tmake_file="t-libc-ok t-openbsd m68k/t-openbsd"
# we need collect2 until our bug is fixed...
use_collect2=yes
;;
m68k-*-sysv4*) # Motorola m68k's running system V.4
tm_file="m68k/m68k.h m68k/sgs.h dbxelf.h elfos.h svr4.h m68k/m68kv4.h"
tm_defines="MOTOROLA SGS SGS_CMP_ORDER SGS_SWITCH_TABLES"
tmake_file=t-svr4
extra_parts="crtbegin.o crtend.o"
use_fixproto=yes
;;
m68k-*-uclinux*) # Motorola m68k/ColdFire running uClinux with uClibc
tm_file="m68k/m68k.h m68k/m68k-none.h m68k/m68kelf.h dbxelf.h elfos.h m68k/uclinux.h"
tm_defines="MOTOROLA USE_GAS"
@ -2214,16 +2027,6 @@ vax-*-ultrix*) # VAXen running ultrix
tm_file="${tm_file} vax/ultrix.h"
use_fixproto=yes
;;
vax-*-*) # VAX default entry
if test "x$enable_obsolete" != xyes; then
echo "*** Configuration ${target} is obsolete." >&2
echo "*** Specify --enable-obsolete to build it anyway." >&2
echo "*** Support will be REMOVED in the next major release of GCC," >&2
echo "*** unless a maintainer comes forward." >&2
exit 1
fi
use_fixproto=yes
;;
xscale-*-elf)
tm_file="arm/xscale-elf.h dbxelf.h elfos.h arm/unknown-elf.h arm/elf.h arm/aout.h arm/arm.h"
tmake_file=arm/t-xscale-elf

View file

@ -1,231 +0,0 @@
-*- Text -*-
This document describes the proposed ABI for the D30V processor. This is
revision 2 of the document.
Revision history:
Revision 1:
Original revision of this document.
Revision 2:
Done after consultation with Mitsubshi about the calling sequence.
This revision now reduces the number of registers the compiler will not
touch from 18 registers down to 8.
Register 1 is now a normal temporary register, since mvfacc rx,ay,32 is
legal.
Arguments greater than 4 bytes must be passed in an even register or at
a double word alignment.
The va_list type is a structure, not a char *.
The stack must be aligned to 8 byte boundary. Doubles and long longs
must also be aligned to 8 byte boundaries.
System calls are specified via trap 31.
Revision 3:
I added discussion about compiler switches.
Register usage:
===============
Registers Call Status Usage
--------- ----------- -----
R0 hardware Hardwired to 0
R1 volatile temp
R2 volatile Arg 1 and main return value.
R3 volatile Arg 2 and low bits of 64 bit returns
R4 - R17 volatile Args 3-16
R18 volatile Static chain if used
R19 - R25 volatile temps
R26 - R33 saved Reserved for user use
R34 - R60 saved Registers preserved across calls
R61 saved Frame pointer if needed.
R62 saved Return address pointer (hardware)
R63 saved Stack pointer
CR0 - CR3 hardware {normal,backup} {psw,pc}
CR4 - CR6 hardware Reserved for future use
CR7 - CR9 volatile Repeat count, addresses
CR10 - CR11 saved Modulo start/end
CR12 - CR14 hardware Reserved for future use
CR15 - CR17 hardware Interrupt support
F0 - F1 volatile Execution flags
F2 - F3 volatile General flags
F4 - F7 volatile Special purpose flags
A0 volatile Accumulator
A1 saved Accumulator
Notes on the register usage:
============================
1) R61 will hold the frame pointer if it is needed. Normally the frame
pointer will not be needed, in which case this will become another
saved register.
2) Repeat instructions and delayed branches cannot cross call boundaries.
Similarly, all flags are assumed to not be preserved across calls.
3) Since so many registers are available, I reserved 8 registers (r26-r33)
for the user to use for any purpose (global variables, interrupt
routines, thread pointer, etc.). These registers will not be used by
the compiler for any purpose.
4) One of the two accumulators is saved across calls.
5) Doubles and long longs will only be allocated to even/odd register
pairs to allow use of the ld2w/st2w instructions.
Miscellaneous call information:
===============================
1) Structures are passed in registers, rounding them up to word
boundaries.
2) Any argument that is greater than word size (4 bytes) must be aligned
to a double word boundary and/or start in an even register. The
intention here is to be able to use the ld2w/st2w instructions for
moving doubles and long longs.
3) Variable argument functions are called with the same calling sequence
as non-variable argument functions. When called, a variable argument
function first saves the 16 registers (R2 - R17) used for passing
arguments. The va_list type is a structure. The first element of the
structure is a pointer to the first word saved on the stack, and the
second element is a number that gives which argument number is being
processed.
4) Word and double word sized structures/unions are returned in registers,
other functions returning structures expect a temporary area address to
be passed as the first argument.
The stack frame when a function is called looks like:
high | .... |
+-------------------------------+
| Argument word #20 |
+-------------------------------+
| Argument word #19 |
+-------------------------------+
| Argument word #18 |
+-------------------------------+
| Argument word #17 |
low SP----> +-------------------------------+
After the prologue is executed, the stack frame will look like:
high | .... |
+-------------------------------+
| Argument word #20 |
+-------------------------------+
| Argument word #19 |
+-------------------------------+
| Argument word #18 |
+-------------------------------+
| Argument word #17 |
Prev sp +-------------------------------+
| |
| Save for arguments 1..16 if |
| the func. uses stdarg/varargs |
| |
+-------------------------------+
| |
| Save area for preserved regs |
| |
+-------------------------------+
| |
| Local variables |
| |
+-------------------------------+
| |
| alloca space if used |
| |
+-------------------------------+
| |
| Space for outgoing arguments |
| |
low SP----> +-------------------------------+
System Calls
============
System calls will be done using "TRAP 31". Input arguments will be in R2 - R5,
and the system call number will be in R6. Return values from the system call
will be in R2. Negative values of the return indicate the system call failed,
and the value is the negative of the error code. Here are the assigned system
call numbers (value in R6):
exit 1
open 2
close 3
read 4
write 5
lseek 6
unlink 7
getpid 8
kill 9
fstat 10
(11 is reserved for sbrk)
argvlen 12
argv 13
chdir 14
stat 15
chmod 16
utime 17
time 18
Compiler Switches
=================
The following d30v specific compiler switches are currently supported:
-mextmem Link .text/.data/.bss/etc in external memory.
-mextmemory Same as -mextmem.
-monchip Link .text/.data/.bss/etc in the onchip data/text
memory.
-mno-asm-optimize Do not pass -O to the assembler when optimizing (the -O
switch will mark two short instructions that don't
interfere with each other as being done parallel
instead of sequentially).
-masm-optimize [default] If optimizing, pass -O to the assembler.
-mbranch-cost=n Increase the internal costs of branches to n. Higher
costs means that the compiler will issue more
instructions to avoid doing a branch. The default is
2.
-mcond-exec=n Replace branches around n insns with conditional
execution if we can. Default is 4.
Sections
========
You can override the effect of the -mextmem/-monchip options by putting
functions into either the ".stext" or ".etext" sections. If you put them into
the ".stext" section, the linker will always link the function into the onchip
memory area. Similarly, if you put the function in the ".etext" section, the
linker will always link the function into the external memory area.
Data can be controlled as well. If you put the data in the ".sdata" section,
the linker will put the data into the onchip data area. Similarly, if you put
the data in the ".edata" section, the linker will put the data into the
external memory.
Stack pointer
=============
The crt0.o that we ship loads up the stack pointer with the value of the label
__stack. If you do not define a value for __stack, the linker will choose the
top of the onchip data area (0x20008000) for the stack pointer. You can set a
new value via the options:
-Wl,-defsym,__stack=0x20008000

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@ -1,142 +0,0 @@
/* d30v prototypes.
Copyright (C) 1999, 2000 Free Software Foundation, Inc.
Contributed by Cygnus Solutions.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* External functions called. */
extern void override_options (void);
#ifdef RTX_CODE
extern int short_memory_operand (rtx, enum machine_mode);
extern int long_memory_operand (rtx, enum machine_mode);
extern int d30v_memory_operand (rtx, enum machine_mode);
extern int single_reg_memory_operand (rtx, enum machine_mode);
extern int const_addr_memory_operand (rtx, enum machine_mode);
extern int call_operand (rtx, enum machine_mode);
extern int gpr_operand (rtx, enum machine_mode);
extern int accum_operand (rtx, enum machine_mode);
extern int gpr_or_accum_operand (rtx, enum machine_mode);
extern int cr_operand (rtx, enum machine_mode);
extern int repeat_operand (rtx, enum machine_mode);
extern int flag_operand (rtx, enum machine_mode);
extern int br_flag_operand (rtx, enum machine_mode);
extern int br_flag_or_constant_operand (rtx, enum machine_mode);
extern int gpr_br_flag_operand (rtx, enum machine_mode);
extern int f0_operand (rtx, enum machine_mode);
extern int f1_operand (rtx, enum machine_mode);
extern int carry_operand (rtx, enum machine_mode);
extern int reg_or_0_operand (rtx, enum machine_mode);
extern int gpr_or_signed6_operand (rtx, enum machine_mode);
extern int gpr_or_unsigned5_operand (rtx, enum machine_mode);
extern int gpr_or_unsigned6_operand (rtx, enum machine_mode);
extern int gpr_or_constant_operand (rtx, enum machine_mode);
extern int gpr_or_dbl_const_operand (rtx, enum machine_mode);
extern int gpr_or_memory_operand (rtx, enum machine_mode);
extern int move_input_operand (rtx, enum machine_mode);
extern int move_output_operand (rtx, enum machine_mode);
extern int signed6_operand (rtx, enum machine_mode);
extern int unsigned5_operand (rtx, enum machine_mode);
extern int unsigned6_operand (rtx, enum machine_mode);
extern int bitset_operand (rtx, enum machine_mode);
extern int condexec_test_operator (rtx, enum machine_mode);
extern int condexec_branch_operator (rtx, enum machine_mode);
extern int condexec_unary_operator (rtx, enum machine_mode);
extern int condexec_addsub_operator (rtx, enum machine_mode);
extern int condexec_binary_operator (rtx, enum machine_mode);
extern int condexec_shiftl_operator (rtx, enum machine_mode);
extern int condexec_extend_operator (rtx, enum machine_mode);
extern int branch_zero_operator (rtx, enum machine_mode);
extern int cond_move_dest_operand (rtx, enum machine_mode);
extern int cond_move_operand (rtx, enum machine_mode);
extern int cond_exec_operand (rtx, enum machine_mode);
extern int srelational_si_operator (rtx, enum machine_mode);
extern int urelational_si_operator (rtx, enum machine_mode);
extern int relational_di_operator (rtx, enum machine_mode);
#endif
extern d30v_stack_t *d30v_stack_info (void);
extern int direct_return (void);
#ifdef TREE_CODE
#ifdef RTX_CODE
extern void d30v_init_cumulative_args (CUMULATIVE_ARGS *, tree,
rtx, tree, int);
#endif
extern int d30v_function_arg_boundary (enum machine_mode, tree);
#ifdef RTX_CODE
extern rtx d30v_function_arg (CUMULATIVE_ARGS *,
enum machine_mode, tree, int, int);
#endif
extern int d30v_function_arg_partial_nregs (CUMULATIVE_ARGS *,
enum machine_mode, tree, int);
extern int d30v_function_arg_pass_by_reference (CUMULATIVE_ARGS *,
enum machine_mode, tree, int);
extern void d30v_function_arg_advance (CUMULATIVE_ARGS *,
enum machine_mode, tree, int);
#endif
#ifdef RTX_CODE
extern rtx d30v_expand_builtin_saveregs (void);
#endif
#ifdef TREE_CODE
extern void d30v_setup_incoming_varargs (CUMULATIVE_ARGS *,
enum machine_mode, tree, int *, int);
#ifdef RTX_CODE
extern void d30v_expand_builtin_va_start (tree, rtx);
extern rtx d30v_expand_builtin_va_arg (tree, tree);
#endif /* RTX_CODE */
#endif /* TREE_CODE */
extern void d30v_expand_prologue (void);
extern void d30v_expand_epilogue (void);
extern void d30v_function_profiler (FILE *, int);
#ifdef RTX_CODE
extern void d30v_split_double (rtx, rtx *, rtx *);
extern void d30v_print_operand (FILE *, rtx, int);
extern void d30v_print_operand_address (FILE *, rtx);
#endif
extern int d30v_trampoline_size (void);
#ifdef RTX_CODE
extern void d30v_initialize_trampoline (rtx, rtx, rtx);
extern int d30v_legitimate_address_p (enum machine_mode, rtx, int);
extern rtx d30v_legitimize_address (rtx, rtx, enum machine_mode, int);
extern int d30v_mode_dependent_address_p (rtx);
extern rtx d30v_emit_comparison (int, rtx, rtx, rtx);
extern const char *d30v_move_2words (rtx *, rtx);
extern int d30v_emit_cond_move (rtx, rtx, rtx, rtx);
extern rtx d30v_return_addr (void);
#endif
extern void d30v_init_expanders (void);
extern void debug_stack_info (d30v_stack_t *);
/* External variables referenced */
/* Define the information needed to generate branch and scc insns. This is
stored from the compare operation. */
extern GTY(()) rtx d30v_compare_op0;
extern GTY(()) rtx d30v_compare_op1;
/* Define the information needed to modify the epilogue for EH. */
#ifdef RTX_CODE
extern rtx d30v_eh_epilogue_sp_ofs;
#endif

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@ -1,187 +0,0 @@
/* Assembly support functions for libgcc.
*
* Copyright (C) 1997 Free Software Foundation, Inc.
* Contributed by Cygnus Support
*
* This file is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2, or (at your option) any
* later version.
*
* In addition to the permissions in the GNU General Public License, the
* Free Software Foundation gives you unlimited permission to link the
* compiled version of this file into combinations with other programs,
* and to distribute those combinations without any restriction coming
* from the use of this file. (The General Public License restrictions
* do apply in other respects; for example, they cover modification of
* the file, and distribution when not linked into a combine
* executable.)
*
* This file is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
*
*/
#ifdef L_udivsi3
/* For division, we use the following algorithm:
*
* unsigned
* __divsi3 (unsigned a, unsigned b)
* {
* unsigned al = a;
* unsigned ah = 0;
* unsigned tmpf;
* int i;
*
* for (i = 32; i > 0; i--)
* {
* ah = (ah << 1) | (al >> 31);
* tmpf = (ah >= b) ? 1 : 0;
* ah -= ((tmpf) ? b : 0);
* al = (al << 1) | tmpf;
* }
*
* return al; // for __udivsi3
* return ah; // for __umodsi3
* }
*/
.file "_udivsi3"
.text
.globl __umodsi3
.globl __udivsi3
.type __umodsi3,@function
.type __udivsi3,@function
.stabs "libgcc1.asm",100,0,0,__umodsi3
.stabs "int:t(0,1)=r(0,1);-2147483648;2147483647;",128,0,0,0
.stabs "__umodsi3:F(0,1)",36,0,1,__umodsi3
.stabs "a:P(0,1)",64,0,1,2
.stabs "b:P(0,1)",64,0,1,3
__umodsi3:
bra.s .Lmerge || orfg f1,f1,1 ; indicate this is __umodsi3
.Lumod:
.size __umodsi3,.Lumod-__umodsi3
.stabs "",36,0,0,.Lumod-__umodsi3
.stabs "__udivsi3:F(0,1)",36,0,1,__udivsi3
.stabs "a:P(0,1)",64,0,1,2
.stabs "b:P(0,1)",64,0,1,3
__udivsi3:
andfg f1,f1,0 || nop ; indicate this is __udivsi3
.Lmerge:
; r2 = al
; r3 = b
; r4 = ah
; r5 = loop counter
; f0 = tmpf
; f1 = 1 if this is mod, 0 if this is div
or r4,r0,0 || sub r5,r0,-32 ; ah = 0, loop = 32
.Lloop:
src r4,r2,-1 || sub r5,r5,1 ; ah = (ah << 1) | (al >> 31); decrement loop count
cmpuge f0,r4,r3 || sra r2,r2,-1 ; f0 = (ah >= b); al <<= 1
sub/tx r4,r4,r3 || or/tx r2,r2,1 ; ah -= (tmpf) ? b : 0; al |= tmpf
bratnz.s r5,.Lloop || nop ; loop back if not done
jmp link || or/xt r2,r0,r4 ; if mod, update register, then return to user
.Ludiv:
.size __udivsi3,.Ludiv-__udivsi3
.stabs "",36,0,0,.Ludiv-__udivsi3
#endif /* L_udivsi3 */
#ifdef L_divsi3
/* For division, we use the following algorithm:
*
* unsigned
* __divsi3 (unsigned a, unsigned b)
* {
* unsigned al = __builtin_abs (a);
* unsigned b2 = __builtin_abs (b);
* unsigned ah = 0;
* unsigned tmpf;
* int i;
*
* for (i = 32; i > 0; i--)
* {
* ah = (ah << 1) | (al >> 31);
* tmpf = (ah >= b2) ? 1 : 0;
* ah -= ((tmpf) ? b2 : 0);
* al = (al << 1) | tmpf;
* }
*
* if (a < 0)
* ah = -ah, al = -al;
*
* if (b < 0)
* al = -al;
*
* return al; // for __divsi3
* return ah; // for __modsi3
* }
*/
.file "_divsi3"
.text
.globl __modsi3
.globl __divsi3
.type __modsi3,@function
.type __divsi3,@function
.stabs "libgcc1.asm",100,0,0,__modsi3
.stabs "int:t(0,1)=r(0,1);-2147483648;2147483647;",128,0,0,0
.stabs "__modsi3:F(0,1)",36,0,1,__modsi3
.stabs "a:P(0,1)",64,0,1,2
.stabs "b:P(0,1)",64,0,1,3
__modsi3:
bra.s .Lmerge || orfg f1,f1,1 ; indicate this is __modsi3
.Lmod:
.size __modsi3,.Lmod-__modsi3
.stabs "",36,0,0,.Lmod-__modsi3
.stabs "__divsi3:F(0,1)",36,0,1,__divsi3
.stabs "a:P(0,1)",64,0,1,2
.stabs "b:P(0,1)",64,0,1,3
__divsi3:
andfg f1,f1,0 || nop ; indicate this is __divsi3
.Lmerge:
; r2 = al
; r3 = b2
; r4 = ah
; r5 = loop counter
; r6 = a
; r7 = b
; f0 = tmpf
; f1 = 1 if this is mod, 0 if this is div
or r6,r0,r2 || or r7,r0,r3 ; copy original inputs
abs r2,r2 || abs r3,r3 ; make both postive
or r4,r0,0 || sub r5,r0,-32 ; ah = 0, loop = 32
.Lloop:
src r4,r2,-1 || sub r5,r5,1 ; ah = (ah << 1) | (al >> 31); decrement loop count
cmpuge f0,r4,r3 || sra r2,r2,-1 ; f0 = (ah >= b); al <<= 1
sub/tx r4,r4,r3 || or/tx r2,r2,1 ; ah -= (tmpf) ? b : 0; al |= tmpf
bratnz.s r5,.Lloop || nop ; loop back if not done
cmplt f0,r6,0 || nop ; f0 = (a < 0)
sub/tx r2,r0,r2 || sub/tx r4,r0,r4 ; negate both al, ah if (a < 0)
cmplt f0,r7,0 -> sub/tx r2,r0,r2 ; negate al if (b < 0)
jmp link || or/xt r2,r0,r4 ; update result if mod; return to user
.Ldiv:
.size __divsi3,.Ldiv-__divsi3
.stabs "",36,0,0,.Ldiv-__divsi3
#endif /* L_divsi3 */

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@ -1,32 +0,0 @@
LIB1ASMSRC = d30v/libgcc1.asm
LIB1ASMFUNCS = _udivsi3 _divsi3
# Turn on full debug for libgcc.a.
LIBGCC2_DEBUG_CFLAGS = -g
# We want fine grained libraries, so use the new code to build the
# floating point emulation libraries.
FPBIT = fp-bit.c
DPBIT = dp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c config.status
cat $(srcdir)/config/fp-bit.c > dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c config.status
echo '#define FLOAT' > fp-bit.c
echo '#define _fpadd_parts _fpadd_parts_sf' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
# For svr4 we build crtbegin.o and crtend.o which serve to add begin and
# end labels to the .ctors and .dtors section when we link using gcc.
EXTRA_PARTS=crtbegin.o crtend.o
# We need to use -fPIC when we are using gcc to compile the routines in
# crtstuff.c. This is only really needed when we are going to use gcc/g++
# to produce a shared library, but since we don't know ahead of time when
# we will be doing that, we just always use -fPIC when compiling the
# routines in crtstuff.c.
# Right now, disable, since we don't support shared libraries on d30v yet.
#CRTSTUFF_T_CFLAGS = -fPIC

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@ -1,23 +0,0 @@
/* DSP16xx extra modes.
Copyright (C) 2003 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* HFmode is the DSP16xx's equivalent of SFmode.
FIXME: What format is this anyway? */
FLOAT_MODE (HF, 2, 0);

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@ -1,86 +0,0 @@
/* Definitions of target machine for GNU compiler. AT&T DSP1600.
Copyright (C) 2000 Free Software Foundation, Inc.
Contributed by Michael Collison (collison@world.std.com).
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#ifdef RTX_CODE
extern struct rtx_def *gen_compare_reg (enum rtx_code, rtx, rtx);
extern int call_address_operand (rtx, enum machine_mode);
extern int arith_reg_operand (rtx, enum machine_mode);
extern int symbolic_address_operand (rtx, enum machine_mode);
extern int Y_address_operand (rtx, enum machine_mode);
extern int sp_operand (rtx, enum machine_mode);
extern int sp_operand2 (rtx, enum machine_mode);
extern int nonmemory_arith_operand (rtx, enum machine_mode);
extern int dsp16xx_comparison_operator (rtx, enum machine_mode);
extern int unx_comparison_operator (rtx, enum machine_mode);
extern int signed_comparison_operator (rtx, enum machine_mode);
extern void notice_update_cc (rtx);
extern void double_reg_from_memory (rtx[]);
extern void double_reg_to_memory (rtx[]);
extern enum rtx_code next_cc_user_code (rtx);
extern int next_cc_user_unsigned (rtx);
extern struct rtx_def *gen_tst_reg (rtx);
extern const char *output_block_move (rtx[]);
extern enum reg_class preferred_reload_class (rtx, enum reg_class);
extern enum reg_class secondary_reload_class (enum reg_class,
enum machine_mode, rtx);
extern int emit_move_sequence (rtx *, enum machine_mode);
extern void print_operand (FILE *, rtx, int);
extern void print_operand_address (FILE *, rtx);
extern void output_dsp16xx_float_const (rtx *);
extern void emit_1600_core_shift (enum rtx_code, rtx *, int);
extern int symbolic_address_p (rtx);
extern int uns_comparison_operator (rtx, enum machine_mode);
#endif /* RTX_CODE */
#ifdef TREE_CODE
extern struct rtx_def *dsp16xx_function_arg (CUMULATIVE_ARGS,
enum machine_mode,
tree, int);
extern void dsp16xx_function_arg_advance (CUMULATIVE_ARGS *,
enum machine_mode,
tree, int);
#endif /* TREE_CODE */
extern void dsp16xx_invalid_register_for_compare (void);
extern int class_max_nregs (enum reg_class, enum machine_mode);
extern enum reg_class limit_reload_class (enum reg_class, enum machine_mode);
extern int dsp16xx_register_move_cost (enum reg_class, enum reg_class);
extern int dsp16xx_makes_calls (void);
extern long compute_frame_size (int);
extern int dsp16xx_call_saved_register (int);
extern int dsp16xx_call_saved_register (int);
extern void init_emulation_routines (void);
extern int ybase_regs_ever_used (void);
extern void override_options (void);
extern int dsp16xx_starting_frame_offset (void);
extern int initial_frame_pointer_offset (void);
extern void asm_output_common (FILE *, const char *, int, int);
extern void asm_output_local (FILE *, const char *, int, int);
extern void asm_output_float (FILE *, double);
extern bool dsp16xx_compare_gen;
extern int hard_regno_mode_ok (int, enum machine_mode);
extern enum reg_class dsp16xx_reg_class_from_letter (int);
extern int regno_reg_class (int);
extern void function_prologue (FILE *, int);
extern void function_epilogue (FILE *, int);
extern int num_1600_core_shifts (int);

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@ -1,125 +0,0 @@
This directory contains code for building a compiler for the
32-bit ESA/390 architecture. It supports three different styles
of assembly:
-- MVS for use with the HLASM assembler
-- Open Edition (USS Unix System Services)
-- ELF/Linux for use with the binutils/gas GNU assembler.
Cross-compiling Hints
---------------------
When building a cross-compiler on AIX, set the environment variable CC
and be sure to set the -ma and -qcpluscmt flags; i.e.
export CC="cc -ma -qcpluscmt"
do this *before* running configure, e.g.
configure --target=i370-ibm-linux --prefix=/where/to/install/usr
The Objective-C and FORTRAN front ends don't build. To avoid looking at
errors, do only
make LANGUAGES=c
OpenEdition Hints
-----------------
The shell script "install" is handy for users of OpenEdition.
The ELF ABI
-----------
This compiler, in conjunction with the gas/binutils assembler, defines
a defacto ELF-based ABI for the ESA/390 architecture. Be warned: this
ABI has several major faults. It should be fixed. As it is fixed,
it is subject to change without warning. You should not commit to major
software systems without further exploring and fixing these problems.
Here are some of the problems:
-- No support for shared libraries or dynamically loadable objects.
This is because the compiler currently places address literals in
the text section. Although the GAS assembler supports a syntax for
USING that will place address literals in the data section, this forces
the use of two base registers, one for branches and one for the literal
pool. Work is needed to redesign the function prologue, epilogue and the
base register reloads to minimize the currently excessive use of reserved
registers.
I beleive the best solution would be to add a toc or plt, and extending
the meaning of the USING directive to encompass this. This would
allow the continued use of the human-readable and familiar practice
of using =A() and =F'' to denote address literals, as opposed to more
difficult jump-table notation.
-- the stackframe is almost twice as big as it needs to be.
-- currently, r15 is used to return 32-bit values. Because this is the
last register, it prevents 64-bit ints and small structures from being
returned in registers, forcing return in memory. It would be more
efficient to use r14 to return 32-bit values, and r14+r15 to return
64-bit values.
-- all arguments are currently passed in memory. It would be more efficient
to pass arguments in registers.
ChangeLog
---------
Oct98-Dec98 -- add ELF back end; work on getting ABI more or less functional.
98.12.05 -- fix numerous MVC bugs
99.02.06 -- multiply insn sometimes not generated when needed.
-- extendsidi bugs, bad literal values printed
-- remove broken adddi subdi patterns
99.02.15 -- add clrstrsi pattern
-- fix -O2 divide bug
99.03.04 -- base & index reg usage bugs
99.03.15 -- fixes for returning long longs and structs (struct value return)
99.03.29 -- fix handling & alignment of shorts
99.03.31 -- clobbered register 14 is not always clobbered
99.04.02 -- operand constraints for cmphi
99.04.07 -- function pointer fixes for call, call_value patterns,
function pointers derefed once too often.
99.04.14 -- add pattern to print double-wide int
-- check intval<4096 for misc operands
-- add clrstrsi pattern
-- movstrsi fixes
99.04.16 -- use r2 to pass args into r11 in subroutine call.
-- fixes to movsi; some operand combinations impossible;
rework constraints
-- start work on forward jump optimization
-- char alignment bug
99.04.25 -- add untyped_call pattern so that builtin_apply works
99.04.27 -- fixes to compare logical under mask
99.04.28 -- reg 2 is clobbered by calls
99.04.30 -- fix rare mulsi bug
99.04.30 -- add constraints so that all RS, SI, SS forms insns have valid
addressing modes
99.04.30 -- major condition code fixes. The old code was just way off
w.r.t. which insns set condition code, and the codes that
were set. The extent of this damage was unbeleivable.
99.05.01 -- restructuring of operand constraints on many patterns,
many lead to invalid instructions being genned.
99.05.02 -- float pt fixes
-- fix movdi issue bugs
99.05.03 -- fix divide insn; was dividing incorrectly
99.05.05 -- fix sign extension problems on andhi
-- deprecate some constraints
99.05.06 -- add set_attr insn lengths; fix misc litpool sizes
-- add notes about how unsigned jumps work (i.e.
arithmetic vs. logical vs. signed vs unsigned).
99.05.11 -- use insn length to predict forward branch target;
use relative branchining where possible,
remove un-needed base register reload.
99.05.15 -- fix movstrsi, clrstrsi, cmpstrsi patterns as per conversation
w/ Richard Henderson

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@ -1,64 +0,0 @@
/* Subroutines for the C front end for System/370.
Copyright (C) 1989, 1993, 1995, 1997, 1998, 1999, 2000
Free Software Foundation, Inc.
Contributed by Jan Stein (jan@cd.chalmers.se).
Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "tree.h"
#include "toplev.h"
#include "cpplib.h"
#include "c-pragma.h"
#include "tm_p.h"
#ifdef TARGET_HLASM
/* #pragma map (name, alias) -
In this implementation both name and alias are required to be
identifiers. The older code seemed to be more permissive. Can
anyone clarify? */
void
i370_pr_map (pfile)
cpp_reader *pfile ATTRIBUTE_UNUSED;
{
tree name, alias, x;
if (c_lex (&x) == CPP_OPEN_PAREN
&& c_lex (&name) == CPP_NAME
&& c_lex (&x) == CPP_COMMA
&& c_lex (&alias) == CPP_NAME
&& c_lex (&x) == CPP_CLOSE_PAREN)
{
if (c_lex (&x) != CPP_EOF)
warning ("junk at end of #pragma map");
mvs_add_alias (IDENTIFIER_POINTER (name), IDENTIFIER_POINTER (alias), 1);
return;
}
warning ("malformed #pragma map, ignored");
}
#endif

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@ -1,55 +0,0 @@
/* Definitions of target machine for GNU compiler. System/370 version.
Copyright (C) 2000 Free Software Foundation, Inc.
Contributed by Jan Stein (jan@cd.chalmers.se).
Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#ifndef GCC_I370_PROTOS_H
#define GCC_I370_PROTOS_H
extern void override_options (void);
#ifdef RTX_CODE
extern int i370_branch_dest (rtx);
extern int i370_branch_length (rtx);
extern int i370_short_branch (rtx);
extern int s_operand (rtx, enum machine_mode);
extern int r_or_s_operand (rtx, enum machine_mode);
extern int unsigned_jump_follows_p (rtx);
#endif /* RTX_CODE */
#ifdef TREE_CODE
extern int handle_pragma (int (*)(void), void (*)(int), const char *);
#endif /* TREE_CODE */
extern void mvs_add_label (int);
extern int mvs_check_label (int);
extern int mvs_check_page (FILE *, int, int);
extern int mvs_function_check (const char *);
extern void mvs_add_alias (const char *, const char *, int);
extern int mvs_need_alias (const char *);
extern int mvs_get_alias (const char *, char *);
extern int mvs_check_alias (const char *, char *);
extern void check_label_emit (void);
extern void mvs_free_label_list (void);
extern void i370_pr_map (struct cpp_reader *);
#endif /* ! GCC_I370_PROTOS_H */

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@ -1,113 +0,0 @@
/* Definitions of target machine for GNU compiler. System/370 version.
Copyright (C) 1989, 1993, 1995, 1996, 1997, 2003
Free Software Foundation, Inc.
Contributed by Jan Stein (jan@cd.chalmers.se).
Modified for Linux/390 by Linas Vepstas (linas@linas.org)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define TARGET_VERSION fprintf (stderr, " (i370 GNU/Linux with ELF)");
/* Specify that we're generating code for a Linux port to 370 */
#define TARGET_ELF_ABI
/* Target OS preprocessor built-ins. */
#define TARGET_OS_CPP_BUILTINS() LINUX_TARGET_OS_CPP_BUILTINS()
/* Options for this target machine. */
#define LIBGCC_SPEC "libgcc.a%s"
#ifdef SOME_FUTURE_DAY
#define CPP_SPEC "%{posix: -D_POSIX_SOURCE} %(cpp_sysv) %(cpp_endian_big) \
%{mcall-linux: %(cpp_os_linux) } \
%{!mcall-linux: %(cpp_os_default) }"
#define LIB_SPEC "\
%{mcall-linux: %(lib_linux) } \
%{!mcall-linux:%(lib_default) }"
#define STARTFILE_SPEC "\
%{mcall-linux: %(startfile_linux) } \
%{!mcall-linux: %(startfile_default) }"
#define ENDFILE_SPEC "\
%{mcall-linux: %(endfile_linux) } \
%{!mcall-linux: %(endfile_default) }"
/* GNU/Linux support. */
#ifndef LIB_LINUX_SPEC
#define LIB_LINUX_SPEC "%{mnewlib: --start-group -llinux -lc --end-group } %{!mnewlib: -lc }"
#endif
#ifndef STARTFILE_LINUX_SPEC
#define STARTFILE_LINUX_SPEC "\
%{!shared: %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} %{!p:crt1.o%s}}} \
%{mnewlib: ecrti.o%s} \
%{!mnewlib: crti.o%s %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}}"
#endif
#ifndef ENDFILE_LINUX_SPEC
#define ENDFILE_LINUX_SPEC "\
%{mnewlib: ecrtn.o%s} \
%{!mnewlib: %{!shared:crtend.o%s} %{shared:crtendS.o%s} crtn.o%s}"
#endif
#ifndef LINK_START_LINUX_SPEC
#define LINK_START_LINUX_SPEC "-Ttext 0x10000"
#endif
#ifndef LINK_OS_LINUX_SPEC
#define LINK_OS_LINUX_SPEC ""
#endif
#ifndef CPP_OS_LINUX_SPEC
#define CPP_OS_LINUX_SPEC "-D__unix__ -D__gnu_linux__ -D__linux__ \
%{!ansi: -Dunix -Dlinux } \
-Asystem=unix -Asystem=linux"
#endif
#ifndef CPP_OS_LINUX_SPEC
#define CPP_OS_LINUX_SPEC ""
#endif
/* Define any extra SPECS that the compiler needs to generate. */
#undef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS \
{ "lib_linux", LIB_LINUX_SPEC }, \
{ "lib_default", LIB_DEFAULT_SPEC }, \
{ "startfile_linux", STARTFILE_LINUX_SPEC }, \
{ "startfile_default", STARTFILE_DEFAULT_SPEC }, \
{ "endfile_linux", ENDFILE_LINUX_SPEC }, \
{ "endfile_default", ENDFILE_DEFAULT_SPEC }, \
{ "link_shlib", LINK_SHLIB_SPEC }, \
{ "link_target", LINK_TARGET_SPEC }, \
{ "link_start", LINK_START_SPEC }, \
{ "link_start_linux", LINK_START_LINUX_SPEC }, \
{ "link_os", LINK_OS_SPEC }, \
{ "link_os_linux", LINK_OS_LINUX_SPEC }, \
{ "link_os_default", LINK_OS_DEFAULT_SPEC }, \
{ "cpp_endian_big", CPP_ENDIAN_BIG_SPEC }, \
{ "cpp_os_linux", CPP_OS_LINUX_SPEC }, \
{ "cpp_os_default", CPP_OS_DEFAULT_SPEC },
#endif /* SOME_FUTURE_DAY */

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@ -1,49 +0,0 @@
/* Definitions of target machine for GNU compiler. System/370 version.
Copyright (C) 1989, 1993, 1995, 1996, 1997, 2003
Free Software Foundation, Inc.
Contributed by Jan Stein (jan@cd.chalmers.se).
Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define TARGET_VERSION printf (" (370/MVS)");
/* Specify that we're generating code for the Language Environment */
#define LE370 1
#define TARGET_EBCDIC 1
#define TARGET_HLASM 1
/* Options for the preprocessor for this target machine. */
#define CPP_SPEC "-trigraphs"
/* Target OS preprocessor built-ins. */
#define TARGET_OS_CPP_BUILTINS() \
do { \
builtin_define_std ("MVS"); \
builtin_define_std ("mvs"); \
MAYBE_LE370_MACROS(); \
builtin_assert ("system=mvs"); \
} while (0)
#if defined(LE370)
# define MAYBE_LE370_MACROS() do {builtin_define_std ("LE370");} while (0)
#else
# define MAYBE_LE370_MACROS()
#endif

View file

@ -1,53 +0,0 @@
/* Definitions of target machine for GNU compiler. System/370 version.
Copyright (C) 1989, 1993, 1995, 1996, 1997, 2003
Free Software Foundation, Inc.
Contributed by Jan Stein (jan@cd.chalmers.se).
Modified for OS/390 OpenEdition by Dave Pitts (dpitts@cozx.com)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define TARGET_VERSION printf (" (370/OpenEdition)");
/* Specify that we're generating code for the Language Environment */
#define LE370 1
#define LONGEXTERNAL 1
#define TARGET_EBCDIC 1
#define TARGET_HLASM 1
/* Options for the preprocessor for this target machine. */
#define CPP_SPEC "-trigraphs"
/* Options for this target machine. */
#define LIB_SPEC ""
#define LIBGCC_SPEC ""
#define STARTFILE_SPEC "/usr/local/lib/gccmain.o"
/* Target OS preprocessor built-ins. */
#define TARGET_OS_CPP_BUILTINS() \
do { \
builtin_define_std ("unix"); \
builtin_define_std ("UNIX"); \
builtin_define_std ("openedition"); \
builtin_define ("__i370__"); \
builtin_assert ("system=openedition"); \
builtin_assert ("system=unix"); \
} while (0)

View file

@ -1,3 +0,0 @@
i370-c.o: $(srcdir)/config/i370/i370-c.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
$(TM_H) $(TREE_H) toplev.h $(CPPLIB_H) c-pragma.h $(TM_P_H)
$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/i370/i370-c.c

View file

@ -1,230 +0,0 @@
/* Definitions of target machine for GNU compiler for Intel 80386
running FreeBSD.
Copyright (C) 1988, 1992, 1994, 1996, 1997, 1999, 2000, 2002, 2003
Free Software Foundation, Inc.
Contributed by Poul-Henning Kamp <phk@login.dkuug.dk>
Continued development by David O'Brien <obrien@NUXI.org>
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Don't assume anything about the header files. */
#define NO_IMPLICIT_EXTERN_C
/* This goes away when the math-emulator is fixed */
#undef TARGET_SUBTARGET_DEFAULT
#define TARGET_SUBTARGET_DEFAULT \
(MASK_80387 | MASK_IEEE_FP | MASK_FLOAT_RETURNS | MASK_NO_FANCY_MATH_387)
/* The macro defined in i386.h doesn't work with the old gas of
FreeBSD 2.x. The definition in sco.h and sol2.h appears to work,
but it turns out that, even though the assembler doesn't complain,
we get incorrect results. Fortunately, the definition in
defaults.h works. */
#undef ASM_PREFERRED_EH_DATA_FORMAT
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
builtin_define_std ("unix"); \
builtin_define ("__FreeBSD__"); \
builtin_assert ("system=unix"); \
builtin_assert ("system=bsd"); \
builtin_assert ("system=FreeBSD"); \
} \
while (0)
/* Like the default, except no -lg. */
#define LIB_SPEC "%{!shared:%{!pg:-lc}%{pg:-lc_p}}"
#undef SIZE_TYPE
#define SIZE_TYPE "unsigned int"
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "int"
#undef WCHAR_TYPE
#define WCHAR_TYPE "int"
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD
/* Override the default comment-starter of "/". */
#undef ASM_COMMENT_START
#define ASM_COMMENT_START "#"
#undef ASM_APP_ON
#define ASM_APP_ON "#APP\n"
#undef ASM_APP_OFF
#define ASM_APP_OFF "#NO_APP\n"
/* FreeBSD using a.out does not support DWARF2 unwinding mechanisms. */
#define DWARF2_UNWIND_INFO 0
/* Don't default to pcc-struct-return, because in FreeBSD we prefer the
superior nature of the older gcc way. */
#define DEFAULT_PCC_STRUCT_RETURN 0
/* Ensure we the configuration knows our system correctly so we can link with
libraries compiled with the native cc. */
#undef NO_DOLLAR_IN_LABEL
/* i386 freebsd still uses old binutils that don't insert nops by default
when the .align directive demands to insert extra space in the text
segment. */
#undef ASM_OUTPUT_ALIGN
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
if ((LOG)!=0) fprintf ((FILE), "\t.align %d,0x90\n", (LOG))
/* Profiling routines, partially copied from i386/osfrose.h. */
/* Tell final.c that we don't need a label passed to mcount. */
#define NO_PROFILE_COUNTERS 1
#undef MCOUNT_NAME
#define MCOUNT_NAME "mcount"
#undef PROFILE_COUNT_REGISTER
#define PROFILE_COUNT_REGISTER "eax"
/*
* Some imports from svr4.h in support of shared libraries.
* Currently, we need the DECLARE_OBJECT_SIZE stuff.
*/
/* Define the strings used for the special svr4 .type and .size directives.
These strings generally do not vary from one system running svr4 to
another, but if a given system (e.g. m88k running svr) needs to use
different pseudo-op names for these, they may be overridden in the
file which includes this one. */
#define TYPE_ASM_OP "\t.type\t"
#define SIZE_ASM_OP "\t.size\t"
#define SET_ASM_OP "\t.set\t"
/* The following macro defines the format used to output the second
operand of the .type assembler directive. Different svr4 assemblers
expect various different forms for this operand. The one given here
is just a default. You may need to override it in your machine-
specific tm.h file (depending upon the particulars of your assembler). */
#define TYPE_OPERAND_FMT "@%s"
#define HANDLE_SYSV_PRAGMA 1
#define ASM_WEAKEN_LABEL(FILE,NAME) \
do { fputs ("\t.weak\t", FILE); assemble_name (FILE, NAME); \
fputc ('\n', FILE); } while (0)
/* Write the extra assembler code needed to declare a function's result.
Most svr4 assemblers don't require any special declaration of the
result value, but there are exceptions. */
#ifndef ASM_DECLARE_RESULT
#define ASM_DECLARE_RESULT(FILE, RESULT)
#endif
/* These macros generate the special .type and .size directives which
are used to set the corresponding fields of the linker symbol table
entries in an ELF object file under SVR4. These macros also output
the starting labels for the relevant functions/objects. */
/* Write the extra assembler code needed to declare a function properly.
Some svr4 assemblers need to also have something extra said about the
function's return value. We allow for that here. */
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
do \
{ \
ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function"); \
ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
ASM_OUTPUT_LABEL (FILE, NAME); \
} \
while (0)
/* Write the extra assembler code needed to declare an object properly. */
#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
do \
{ \
HOST_WIDE_INT size; \
\
ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
\
size_directive_output = 0; \
if (!flag_inhibit_size_directive \
&& (DECL) && DECL_SIZE (DECL)) \
{ \
size_directive_output = 1; \
size = int_size_in_bytes (TREE_TYPE (DECL)); \
ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \
} \
\
ASM_OUTPUT_LABEL (FILE, NAME); \
} \
while (0)
/* Output the size directive for a decl in rest_of_decl_compilation
in the case where we did not do so before the initializer.
Once we find the error_mark_node, we know that the value of
size_directive_output was set
by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
#undef ASM_FINISH_DECLARE_OBJECT
#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
do { \
const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
HOST_WIDE_INT size; \
if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
&& ! AT_END && TOP_LEVEL \
&& DECL_INITIAL (DECL) == error_mark_node \
&& !size_directive_output) \
{ \
size_directive_output = 1; \
size = int_size_in_bytes (TREE_TYPE (DECL)); \
ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
} \
} while (0)
/* This is how to declare the size of a function. */
#define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
do { \
if (!flag_inhibit_size_directive) \
ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
} while (0)
#define AS_NEEDS_DASH_FOR_PIPED_INPUT
#define ASM_SPEC "%{fpic|fpie|fPIC|fPIE:-k}"
#define LINK_SPEC \
"%{p:%e`-p' not supported; use `-pg' and gprof(1)} \
%{shared:-Bshareable} \
%{!shared:%{!nostdlib:%{!r:%{!e*:-e start}}} -dc -dp %{static:-Bstatic} \
%{pg:-Bstatic} %{Z}} \
%{assert*} %{R*}"
#define STARTFILE_SPEC \
"%{shared:c++rt0.o%s} \
%{!shared:%{pg:gcrt0.o%s}%{!pg:%{static:scrt0.o%s}%{!static:crt0.o%s}}}"
/* Define this so we can compile MS code for use with WINE. */
#define HANDLE_PRAGMA_PACK_PUSH_POP
/* FreeBSD 2.2.7's assembler does not support .quad properly. Do not
use it. */
#undef ASM_QUAD

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@ -1,73 +0,0 @@
/* Definitions for Intel 386 running Linux-based GNU systems using a.out.
Copyright (C) 1992, 1994, 1995, 1997, 1998, 2002
Free Software Foundation, Inc.
Contributed by H.J. Lu (hjl@nynexst.com)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#undef ASM_COMMENT_START
#define ASM_COMMENT_START "#"
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
LINUX_TARGET_OS_CPP_BUILTINS(); \
if (flag_pic) \
{ \
builtin_define ("__PIC__"); \
builtin_define ("__pic__"); \
} \
} \
while (0)
#undef CPP_SPEC
#define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
#undef SIZE_TYPE
#define SIZE_TYPE "unsigned int"
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "int"
#undef WCHAR_TYPE
#define WCHAR_TYPE "long int"
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD
/* Don't default to pcc-struct-return, because gcc is the only compiler,
and we want to retain compatibility with older gcc versions. */
#define DEFAULT_PCC_STRUCT_RETURN 0
#undef LIB_SPEC
#if 1
/* We no longer link with libc_p.a or libg.a by default. If you
want to profile or debug the GNU/Linux C library, please add
-lc_p or -ggdb to LDFLAGS at the link time, respectively. */
#define LIB_SPEC \
"%{mieee-fp:-lieee} %{p:-lgmon} %{pg:-lgmon} %{!ggdb:-lc} %{ggdb:-lg}"
#else
#define LIB_SPEC \
"%{mieee-fp:-lieee} %{p:-lgmon -lc_p} %{pg:-lgmon -lc_p} \
%{!p:%{!pg:%{!g*:-lc} %{g*:-lg -static}}}"
#endif
#undef LINK_SPEC
#define LINK_SPEC "-m i386linux"

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@ -1,43 +0,0 @@
/* Definitions for Intel 386 running MOSS
Copyright (C) 1996, 2001 Free Software Foundation, Inc.
Contributed by Bryan Ford <baford@cs.utah.edu>
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#undef TARGET_OS_CPP_BUILTINS /* config.gcc includes i386/linux.h. */
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
builtin_define_std ("moss"); \
builtin_assert ("system=posix"); \
if (flag_pic) \
{ \
builtin_define ("__PIC__"); \
builtin_define ("__pic__"); \
} \
} \
while (0)
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "crt0.o%s"
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtn.o%s"
#undef LINK_SPEC

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@ -1,40 +0,0 @@
/* Core target definitions for GCC for Intel 80386 running Netware 4.
and using stabs-in-elf for the debugging format.
Copyright (C) 1993, 1994 Free Software Foundation, Inc.
Written by David V. Henkel-Wallace (gumby@cygnus.com)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#undef TARGET_VERSION
#define TARGET_VERSION fprintf (stderr, " (i386 Netware 4)");
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
builtin_define_std ("APX386"); \
builtin_define ("__netware__"); \
builtin_assert ("system=netware"); \
} \
while (0)
#undef WCHAR_TYPE
#define WCHAR_TYPE "short unsigned int"
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE 16

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@ -1,48 +0,0 @@
/*
* svr3.ifile - for collectless G++ on i386 System V.
* Leaves memory configured at address 0.
*
* Install this file as $prefix/gcc-lib/TARGET/VERSION/gcc.ifile
*
* BLOCK to an offset that leaves room for many headers ( the value
* here allows for a file header, an outheader, and up to 11 section
* headers on most systems.
* BIND to an address that includes page 0 in mapped memory. The value
* used for BLOCK should be or'd into this value. Here I'm setting BLOCK
* to 0x200 and BIND to ( value_used_for(BLOCK) )
* If you are using shared libraries, watch that you don't overlap the
* address ranges assigned for shared libs.
*
* GROUP BIND to a location in the next segment. Here, the only value
* that you should change (I think) is that within NEXT, which I've set
* to my hardware segment size. You can always use a larger size, but not
* a smaller one.
*/
SECTIONS
{
.text BIND(0x000200) BLOCK (0x200) :
{
/* plenty for room for headers */
*(.init)
*(.text)
vfork = fork; /* I got tired of editing peoples sloppy code */
*(.fini)
}
.stab BIND(ADDR(.text) + SIZEOF(.text)): { }
.stabstr BIND(ADDR(.stab) + SIZEOF(.stab)): { }
GROUP BIND( NEXT(0x400000) +
(ADDR(.stabstr) + (SIZEOF(.stabstr)) % 0x1000)):
{
.data : {
__CTOR_LIST__ = . ;
. += 4 ; /* leading NULL */
*(.ctor)
. += 4 ; /* trailing NULL */
__DTOR_LIST__ = . ;
. += 4 ; /* leading NULL */
*(.dtor)
. += 4 ; /* trailing NULL */
}
.bss : { }
}
}

View file

@ -1,81 +0,0 @@
/* Definitions for Intel 386 running system V, using dbx-in-coff encapsulation.
Copyright (C) 1992, 1995, 2002 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* We do not want to output SDB debugging information. */
#undef SDB_DEBUGGING_INFO
/* We want to output DBX debugging information. */
#define DBX_DEBUGGING_INFO 1
/* Compensate for botch in dbxout_init/dbxout_source_file which
unconditionally drops the first character from ltext_label_name */
#undef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(BUF,PREFIX,NUMBER) \
sprintf ((BUF), "*.%s%ld", (PREFIX), (long)(NUMBER))
/* With the current gas, .align N aligns to an N-byte boundary.
This is done to be compatible with the system assembler.
You must specify -DOTHER_ALIGN when building gas-1.38.1. */
#undef ASM_OUTPUT_ALIGN
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
if ((LOG)!=0) fprintf ((FILE), "\t.align %d\n", 1<<(LOG))
/* Align labels, etc. at 4-byte boundaries.
For the 486, align to 16-byte boundary for sake of cache. */
#undef LABEL_ALIGN_AFTER_BARRIER
#define LABEL_ALIGN_AFTER_BARRIER(LABEL) (i386_align_jumps)
/* Align start of loop at 4-byte boundary. */
#undef LOOP_ALIGN
#define LOOP_ALIGN(LABEL) (i386_align_loops)
/* Additional overrides needed for dbx-in-coff gas, mostly taken from pbb.h */
/* Although the gas we use can create .ctor and .dtor sections from N_SETT
stabs, it does not support section directives, so we need to have the loader
define the lists.
*/
#define CTOR_LISTS_DEFINED_EXTERNALLY
/* Use crt1.o as a startup file and crtn.o as a closing file. */
/*
* The loader directive file svr3.ifile defines how to merge the constructor
* sections into the data section. Also, since gas only puts out those
* sections in response to N_SETT stabs, and does not (yet) have a
* ".sections" directive, svr3.ifile also defines the list symbols
* __DTOR_LIST__ and __CTOR_LIST__.
*/
#undef STARTFILE_SPEC
#define STARTFILE_SPEC \
"%{!r:%{!z:svr3.ifile%s}%{z:svr3z.ifile%s}}\
%{pg:gcrt1.o%s}%{!pg:%{posix:%{p:mcrtp1.o%s}%{!p:crtp1.o%s}}%{!posix:%{p:mcrt1.o%s}%{!p:crt1.o%s}}} \
%{p:-L/usr/lib/libp}%{pg:-L/usr/lib/libp}"
#define ENDFILE_SPEC "crtn.o%s"
#undef LIB_SPEC
#define LIB_SPEC "%{posix:-lcposix} %{shlib:-lc_s} -lc -lg"

View file

@ -1,141 +0,0 @@
/* Definitions for Intel 386 running system V, using gas.
Copyright (C) 1992, 1996, 2000, 2002 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define TARGET_VERSION fprintf (stderr, " (80386, ATT syntax)");
/* Add stuff that normally comes from i386/sysv3.h */
/* longjmp may fail to restore the registers if called from the same
function that called setjmp. To compensate, the compiler avoids
putting variables in registers in functions that use both setjmp
and longjmp. */
#define NON_SAVING_SETJMP \
(current_function_calls_setjmp && current_function_calls_longjmp)
/* longjmp may fail to restore the stack pointer if the saved frame
pointer is the same as the caller's frame pointer. Requiring a frame
pointer in any function that calls setjmp or longjmp avoids this
problem, unless setjmp and longjmp are called from the same function.
Since a frame pointer will be required in such a function, it is OK
that the stack pointer is not restored. */
#undef SUBTARGET_FRAME_POINTER_REQUIRED
#define SUBTARGET_FRAME_POINTER_REQUIRED \
(current_function_calls_setjmp || current_function_calls_longjmp)
/* Modify ASM_OUTPUT_LOCAL slightly to test -msvr3-shlib, adapted to gas */
#undef ASM_OUTPUT_LOCAL
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
do { \
int align = exact_log2 (ROUNDED); \
if (align > 2) align = 2; \
if (TARGET_SVR3_SHLIB) \
{ \
data_section (); \
ASM_OUTPUT_ALIGN ((FILE), align == -1 ? 2 : align); \
ASM_OUTPUT_LABEL ((FILE), (NAME)); \
fprintf ((FILE), "\t.set .,.+%u\n", (int)(ROUNDED)); \
} \
else \
{ \
fputs (".lcomm ", (FILE)); \
assemble_name ((FILE), (NAME)); \
fprintf ((FILE), ",%u\n", (int)(ROUNDED)); \
} \
} while (0)
/* Add stuff that normally comes from i386/sysv3.h via svr3.h */
/* Define the actual types of some ANSI-mandated types. These
definitions should work for most SVR3 systems. */
#undef SIZE_TYPE
#define SIZE_TYPE "unsigned int"
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "int"
#undef WCHAR_TYPE
#define WCHAR_TYPE "long int"
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD
/* ??? This stuff is copied from config/svr3.h. In the future,
this file should be rewritten to include config/svr3.h
and override what isn't right. */
#define INIT_SECTION_ASM_OP "\t.section\t.init"
#define FINI_SECTION_ASM_OP "\t.section .fini,\"x\""
#define CTORS_SECTION_ASM_OP INIT_SECTION_ASM_OP
#define DTORS_SECTION_ASM_OP FINI_SECTION_ASM_OP
/* CTOR_LIST_BEGIN and CTOR_LIST_END are machine-dependent
because they push on the stack. */
/* This is copied from i386/sysv3.h. */
#define CTOR_LIST_BEGIN \
asm (INIT_SECTION_ASM_OP); \
asm ("pushl $0")
#define CTOR_LIST_END CTOR_LIST_BEGIN
/* Constructor list on stack is in reverse order. Go to the end of the
list and go backwards to call constructors in the right order. */
#define DO_GLOBAL_CTORS_BODY \
do { \
func_ptr *p, *beg = alloca (0); \
for (p = beg; *p; p++) \
; \
while (p != beg) \
(*--p) (); \
} while (0)
#undef EXTRA_SECTIONS
#define EXTRA_SECTIONS in_init, in_fini
#undef EXTRA_SECTION_FUNCTIONS
#define EXTRA_SECTION_FUNCTIONS \
INIT_SECTION_FUNCTION \
FINI_SECTION_FUNCTION
#define INIT_SECTION_FUNCTION \
void \
init_section () \
{ \
if (in_section != in_init) \
{ \
fprintf (asm_out_file, "%s\n", INIT_SECTION_ASM_OP); \
in_section = in_init; \
} \
}
#define FINI_SECTION_FUNCTION \
void \
fini_section () \
{ \
if (in_section != in_fini) \
{ \
fprintf (asm_out_file, "%s\n", FINI_SECTION_ASM_OP); \
in_section = in_fini; \
} \
}
#define TARGET_ASM_CONSTRUCTOR ix86_svr3_asm_out_constructor

View file

@ -1,48 +0,0 @@
/*
* svr3z.ifile - for collectless G++ on i386 System V.
* Leaves memory unconfigured at address 0.
*
* Install this file as $prefix/gcc-lib/TARGET/VERSION/gccz.ifile
*
* BLOCK to an offset that leaves room for many headers ( the value
* here allows for a file header, an outheader, and up to 11 section
* headers on most systems.
* BIND to an address that excludes page 0 from being mapped. The value
* used for BLOCK should be or'd into this value. Here I'm setting BLOCK
* to 0x200 and BIND to ( 0x400000 | value_used_for(BLOCK) )
* If you are using shared libraries, watch that you don't overlap the
* address ranges assigned for shared libs.
*
* GROUP BIND to a location in the next segment. Here, the only value
* that you should change (I think) is that within NEXT, which I've set
* to my hardware segment size. You can always use a larger size, but not
* a smaller one.
*/
SECTIONS
{
.text BIND(0x400200) BLOCK (0x200) :
{
/* plenty for room for headers */
*(.init)
*(.text)
vfork = fork; /* I got tired of editing peoples sloppy code */
*(.fini)
}
.stab BIND(ADDR(.text) + SIZEOF(.text)): { }
.stabstr BIND(ADDR(.stab) + SIZEOF(.stab)): { }
GROUP BIND( NEXT(0x400000) +
(ADDR(.stabstr) + (SIZEOF(.stabstr)) % 0x1000)):
{
.data : {
__CTOR_LIST__ = . ;
. += 4 ; /* leading NULL */
*(.ctor)
. += 4 ; /* trailing NULL */
__DTOR_LIST__ = . ;
. += 4 ; /* leading NULL */
*(.dtor)
. += 4 ; /* trailing NULL */
}
.bss : { }
}
}

View file

@ -1,2 +0,0 @@
# Tell fixincludes to work on this set of headers
SYSTEM_HEADER_DIR = /udk/usr/include

View file

@ -1,28 +0,0 @@
/* Configuration for i386 interfacing with SCO's Universal Development Kit
probably running on OpenServer 5, Unixware 2, or Unixware 5
*/
/* We're very much the SVR4 target with "/udk" prepended to everything that's
interesting */
#undef MD_EXEC_PREFIX
#define MD_EXEC_PREFIX "/udk/usr/ccs/bin/"
#undef MD_STARTFILE_PREFIX
#define MD_STARTFILE_PREFIX "/udk/usr/ccs/lib/"
#define STANDARD_INCLUDE_DIR "/udk/usr/include"
#undef LINK_SPEC
#define LINK_SPEC "%{h*} %{v:-V} \
%{b} %{Wl,*:%*} \
%{static:-dn -Bstatic} \
%{shared:-G -dy -z text} \
%{symbolic:-Bsymbolic -G -dy -z text} \
%{G:-G} \
%{YP,*} \
%{!YP,*:%{p:-Y P,/udk/usr/ccs/lib/libp:/udk/usr/lib/libp:/udk/usr/ccs/lib:/udk/usr/lib} \
%{!p:-Y P,/udk/usr/ccs/lib:/udk/usr/lib}} \
%{Qy:} %{!Qn:-Qy}"

View file

@ -1,32 +0,0 @@
/* Configuration for an i386 running VSTa micro-kernel.
Copyright (C) 1994, 2002 Free Software Foundation, Inc.
Contributed by Rob Savoye (rob@cygnus.com).
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define TARGET_VERSION fprintf (stderr, " (80386, BSD syntax)");
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
builtin_define_std ("unix"); \
builtin_define ("VSTA"); \
builtin_assert ("system=unix"); \
builtin_assert ("system=vsta"); \
} \
while (0)

View file

@ -1,117 +0,0 @@
/* Intel 80960 specific, C compiler specific functions.
Copyright (C) 1992, 1995, 1996, 1997, 1998, 1999, 2000
Free Software Foundation, Inc.
Contributed by Steven McGeady, Intel Corp.
Additional Work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson
Converted to GCC 2.0 by Jim Wilson and Michael Tiemann, Cygnus Support.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "cpplib.h"
#include "tree.h"
#include "c-pragma.h"
#include "toplev.h"
#include "ggc.h"
#include "tm_p.h"
/* Handle pragmas for compatibility with Intel's compilers. */
/* NOTE: ic960 R3.0 pragma align definition:
#pragma align [(size)] | (identifier=size[,...])
#pragma noalign [(identifier)[,...]]
(all parens are optional)
- size is [1,2,4,8,16]
- noalign means size==1
- applies only to component elements of a struct (and union?)
- identifier applies to structure tag (only)
- missing identifier means next struct
- alignment rules for bitfields need more investigation.
This implementation only handles the case of no identifiers. */
void
i960_pr_align (pfile)
cpp_reader *pfile ATTRIBUTE_UNUSED;
{
tree number;
enum cpp_ttype type;
int align;
type = c_lex (&number);
if (type == CPP_OPEN_PAREN)
type = c_lex (&number);
if (type == CPP_NAME)
{
warning ("sorry, not implemented: #pragma align NAME=SIZE");
return;
}
if (type != CPP_NUMBER)
{
warning ("malformed #pragma align - ignored");
return;
}
align = TREE_INT_CST_LOW (number);
switch (align)
{
case 0:
/* Return to last alignment. */
align = i960_last_maxbitalignment / 8;
/* Fall through. */
case 16:
case 8:
case 4:
case 2:
case 1:
i960_last_maxbitalignment = i960_maxbitalignment;
i960_maxbitalignment = align * 8;
break;
default:
/* Silently ignore bad values. */
break;
}
}
void
i960_pr_noalign (pfile)
cpp_reader *pfile ATTRIBUTE_UNUSED;
{
enum cpp_ttype type;
tree number;
type = c_lex (&number);
if (type == CPP_OPEN_PAREN)
type = c_lex (&number);
if (type == CPP_NAME)
{
warning ("sorry, not implemented: #pragma noalign NAME");
return;
}
i960_last_maxbitalignment = i960_maxbitalignment;
i960_maxbitalignment = 8;
}

View file

@ -1,43 +0,0 @@
/* Definitions of target machine for GNU compiler, for "naked" Intel
80960 using coff object format and coff debugging symbols.
Copyright (C) 1988, 1989, 1991, 1996, 2000 Free Software Foundation.
Contributed by Steven McGeady (mcg@omepd.intel.com)
Additional work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson
Converted to GCC 2.0 by Michael Tiemann, Cygnus Support.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Support -gstabs using stabs in COFF sections. */
/* Generate SDB_DEBUGGING_INFO by default. */
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
/* This is intended to be used with Cygnus's newlib library, so we want to
use the standard definition of LIB_SPEC. */
#undef LIB_SPEC
/* Emit a .file directive. */
#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
/* Support the ctors and dtors sections for g++. */
#define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"x\""
#define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"x\""
/* end of i960-coff.h */

View file

@ -1,33 +0,0 @@
/* Definitions of target machine for GNU compiler, for Intel 80960
Copyright (C) 2002 Free Software Foundation, Inc.
Contributed by Steven McGeady, Intel Corp.
Additional Work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson
Converted to GCC 2.0 by Jim Wilson and Michael Tiemann, Cygnus Support.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* long double */
FLOAT_MODE (TF, 16, ieee_extended_intel_128_format);
/* Add any extra modes needed to represent the condition code.
Also, signed and unsigned comparisons are distinguished, as
are operations which are compatible with chkbit insns. */
CC_MODE (CC_UNS);
CC_MODE (CC_CHK);

View file

@ -1,102 +0,0 @@
/* Definitions of target machine for GNU compiler, for Intel 80960
Copyright (C) 2000
Free Software Foundation, Inc.
Contributed by Steven McGeady, Intel Corp.
Additional Work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson
Converted to GCC 2.0 by Jim Wilson and Michael Tiemann, Cygnus Support.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#ifndef GCC_I960_PROTOS_H
#define GCC_I960_PROTOS_H
#ifdef RTX_CODE
extern struct rtx_def *legitimize_address (rtx, rtx, enum machine_mode);
/* Define the function that build the compare insn for scc and bcc. */
extern struct rtx_def *gen_compare_reg (enum rtx_code, rtx, rtx);
/* Define functions in i960.c and used in insn-output.c. */
extern const char *i960_output_ldconst (rtx, rtx);
extern const char *i960_output_call_insn (rtx, rtx, rtx, rtx);
extern const char *i960_output_ret_insn (rtx);
extern const char *i960_output_move_double (rtx, rtx);
extern const char *i960_output_move_double_zero (rtx);
extern const char *i960_output_move_quad (rtx, rtx);
extern const char *i960_output_move_quad_zero (rtx);
extern int literal (rtx, enum machine_mode);
extern int hard_regno_mode_ok (int, enum machine_mode);
extern int fp_literal (rtx, enum machine_mode);
extern int signed_literal (rtx, enum machine_mode);
extern int legitimate_address_p (enum machine_mode, rtx, int);
extern void i960_print_operand (FILE *, rtx, int);
extern int fpmove_src_operand (rtx, enum machine_mode);
extern int arith_operand (rtx, enum machine_mode);
extern int logic_operand (rtx, enum machine_mode);
extern int fp_arith_operand (rtx, enum machine_mode);
extern int signed_arith_operand (rtx, enum machine_mode);
extern int fp_literal_one (rtx, enum machine_mode);
extern int fp_literal_zero (rtx, enum machine_mode);
extern int symbolic_memory_operand (rtx, enum machine_mode);
extern int eq_or_neq (rtx, enum machine_mode);
extern int arith32_operand (rtx, enum machine_mode);
extern int power2_operand (rtx, enum machine_mode);
extern int cmplpower2_operand (rtx, enum machine_mode);
extern enum machine_mode select_cc_mode (RTX_CODE, rtx);
extern int emit_move_sequence (rtx *, enum machine_mode);
extern int i960_bypass (rtx, rtx, rtx, int);
extern void i960_print_operand_addr (FILE *, rtx);
extern int i960_expr_alignment (rtx, int);
extern int i960_improve_align (rtx, rtx, int);
extern int i960_si_ti (rtx, rtx);
extern int i960_si_di (rtx, rtx);
#ifdef TREE_CODE
extern struct rtx_def *i960_function_arg (CUMULATIVE_ARGS *,
enum machine_mode,
tree, int);
extern rtx i960_va_arg (tree, tree);
extern void i960_va_start (tree, rtx);
#endif /* TREE_CODE */
extern enum reg_class secondary_reload_class (enum reg_class, enum machine_mode, rtx);
#endif /* RTX_CODE */
#ifdef TREE_CODE
extern void i960_function_name_declare (FILE *, const char *, tree);
extern void i960_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
extern int i960_round_align (int, tree);
extern void i960_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int);
extern int i960_final_reg_parm_stack_space (int, tree);
extern int i960_reg_parm_stack_space (tree);
#endif /* TREE_CODE */
extern int process_pragma (int(*)(void), void(*)(int), const char *);
extern int i960_object_bytes_bitalign (int);
extern void i960_initialize (void);
extern int bitpos (unsigned int);
extern int is_mask (unsigned int);
extern int bitstr (unsigned int, int *, int *);
extern int compute_frame_size (int);
extern void output_function_profiler (FILE *, int);
extern void i960_scan_opcode (const char *);
extern void i960_pr_align (struct cpp_reader *);
extern void i960_pr_noalign (struct cpp_reader *);
#endif /* ! GCC_I960_PROTOS_H */

File diff suppressed because it is too large Load diff

File diff suppressed because it is too large Load diff

File diff suppressed because it is too large Load diff

View file

@ -1,29 +0,0 @@
/* Definitions for rtems targeting an Intel i960.
Copyright (C) 1996, 1997, 2000, 2002 Free Software Foundation, Inc.
Contributed by Joel Sherrill (joel@OARcorp.com).
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Target OS builtins. */
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
builtin_define ("__rtems__"); \
builtin_assert ("system=rtems"); \
} \
while (0)

View file

@ -1,30 +0,0 @@
LIB2FUNCS_EXTRA = xp-bit.c
# We want fine grained libraries, so use the new code to build the
# floating point emulation libraries.
FPBIT = fp-bit.c
DPBIT = dp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' > dp-bit.c
cat $(srcdir)/config/fp-bit.c >> dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT' > fp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
xp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define EXTENDED_FLOAT_STUBS' > xp-bit.c
cat $(srcdir)/config/fp-bit.c >> xp-bit.c
i960-c.o: $(srcdir)/config/i960/i960-c.c $(CONFIG_H) $(SYSTEM_H) \
coretypes.h $(TM_H) $(CPPLIB_H) $(TREE_H) c-pragma.h toplev.h $(GGC_H) $(TM_P_H)
$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/i960/i960-c.c
MULTILIB_OPTIONS=mnumerics/msoft-float mlong-double-64
MULTILIB_DIRNAMES=float soft-float ld64
MULTILIB_MATCHES=mnumerics=msb mnumerics=msc mnumerics=mkb mnumerics=mkc mnumerics=mmc mnumerics=mcb mnumerics=mcc mnumerics=mjf msoft-float=msa msoft-float=mka msoft-float=mca msoft-float=mcf
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib

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@ -1,37 +0,0 @@
/* Definitions for Linux-based GNU systems with a.out binaries.
Copyright (C) 1995, 1997, 1999, 2000 Free Software Foundation, Inc.
Contributed by H.J. Lu (hjl@nynexst.com)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Don't assume anything about the header files. */
#define NO_IMPLICIT_EXTERN_C
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "%{pg:gcrt0.o%s} %{!pg:%{p:gcrt0.o%s} %{!p:crt0.o%s}} %{static:-static}"
#undef ASM_APP_ON
#define ASM_APP_ON "#APP\n"
#undef ASM_APP_OFF
#define ASM_APP_OFF "#NO_APP\n"
#define SET_ASM_OP "\t.set\t"
/* We need that too. */
#define HANDLE_SYSV_PRAGMA 1

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@ -1,29 +0,0 @@
/* Definitions of target machine for GNU compiler. HP-UX 68010 version. */
/* Don't try using XFmode. */
#undef LONG_DOUBLE_TYPE_SIZE
#define LONG_DOUBLE_TYPE_SIZE 64
#undef CPP_SPEC
#undef ASM_SPEC
/* HP does not support a 68020 without a 68881 or a 68010 with a 68881.
However, -m68020 does not imply -m68881. You must specify both
if you want both. */
#ifdef HPUX_ASM
#define CPP_SPEC "-D__HPUX_ASM__ %{m68881: -D__HAVE_68881__}\
%{m68020: -Dmc68020}%{mc68020: -Dmc68020} -D_INCLUDE__STDC__"
#define ASM_SPEC "%{!m68020:%{!mc68020:+X}}"
#else /* not HPUX_ASM */
#define CPP_SPEC "%{m68881: -D__HAVE_68881__}\
%{m68020: -Dmc68020}%{mc68020: -Dmc68020} -D_INCLUDE__STDC__"
#define ASM_SPEC \
"%{m68000:-mc68000}%{mc68000:-mc68000}%{!mc68000:%{!m68000:-mc68020}}"
#endif /* not HPUX_ASM */

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@ -1,530 +0,0 @@
/* Definitions of target machine for GNU compiler. HP-UX 68000/68020 version.
Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1999, 2000, 2002, 2003
Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* gcc.c should find libgcc.a itself rather than expecting linker to. */
#define LINK_LIBGCC_SPECIAL
/* The arguments of -L must be a separate argv element. */
#define SPACE_AFTER_L_OPTION
/* HP/UX doesn't have libg.a. */
#define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
/* Be compatible with system stddef.h. */
#define SIZE_TYPE "unsigned int"
#undef INT_OP_GROUP
#define INT_OP_GROUP INT_OP_NO_DOT
/* See m68k.h. 7 means 68020 with 68881. */
#ifndef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_BITFIELD|MASK_68881|MASK_68020)
#endif
/* Define __HAVE_68881__ in preprocessor, unless -msoft-float is specified.
This will control the use of inline 68881 insns in certain macros. */
#ifdef HPUX_ASM
#define ASM_SPEC "%{m68000:+X}%{mc68000:+X}"
#define NO_DOT_IN_LABEL
#if TARGET_DEFAULT & MASK_68881 /* -m68881 is the default */
/* These definitions differ from those used for GAS by defining __HPUX_ASM__.
This is needed because some programs, particularly GDB, need to
know which assembler is being used so that the correct `asm'
instructions can be used. */
#define CPP_SPEC \
"%{!msoft-float:-D__HAVE_68881__ }\
%{!ansi:%{!mc68000:%{!m68000:-Dmc68020}} -D_HPUX_SOURCE} -D__HPUX_ASM__"
#else /* default is -msoft-float */
#define CPP_SPEC \
"%{m68881:-D__HAVE_68881__ }\
%{!ansi:%{!mc68000:%{!m68000:-Dmc68020}} -D_HPUX_SOURCE} -D__HPUX_ASM__"
#endif /* default is -msoft-float */
#else /* not HPUX_ASM */
#if TARGET_DEFAULT & MASK_68881 /* -m68881 is the default */
#define CPP_SPEC \
"%{!msoft-float:-D__HAVE_68881__ }\
%{!ansi:%{!mc68000:%{!m68000:-Dmc68020}} -D_HPUX_SOURCE}"
#else /* default is -msoft-float */
#define CPP_SPEC \
"%{m68881:-D__HAVE_68881__ }\
%{!ansi:%{!mc68000:%{!m68000:-Dmc68020}} -D_HPUX_SOURCE}"
#endif /* default is -msoft-float */
/* -m68000 requires special flags to the assembler. */
#define ASM_SPEC \
"%{m68000:-mc68000}%{mc68000:-mc68000}%{!mc68000:%{!m68000:-mc68020}}"
/* Tell GCC to put a space after -L when generating such options. */
#define SPACE_AFTER_L_OPTION
#endif /* Not HPUX_ASM */
/* Translate -static for HPUX linker. */
#define LINK_SPEC "%{static:-a archive}"
/* Target OS builtins. These are the ones defined by HPUX cc. */
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
builtin_define_std ("hp9000s200"); \
builtin_define_std ("hp9000s300"); \
builtin_define_std ("hpux"); \
builtin_define_std ("unix"); \
builtin_define_std ("PWB"); \
builtin_define ("__motorola__"); \
builtin_assert ("system=unix"); \
builtin_assert ("system=hpux"); \
} \
while (0)
/* Every structure or union's size must be a multiple of 2 bytes. */
#define STRUCTURE_SIZE_BOUNDARY 16
/* hpux doesn't use static area for struct returns. */
#undef PCC_STATIC_STRUCT_RETURN
/* Generate calls to memcpy, memcmp and memset. */
#define TARGET_MEM_FUNCTIONS
#if 0 /* No longer correct in HPUX version 6.5. */
/* Function calls don't save any fp registers on hpux. */
#undef CALL_USED_REGISTERS
#define CALL_USED_REGISTERS \
{1, 1, 0, 0, 0, 0, 0, 0, \
1, 1, 0, 0, 0, 0, 0, 1, \
1, 1, 1, 1, 1, 1, 1, 1}
#endif /* 0 */
#ifdef HPUX_ASM
/* Override parts of m68k.h to fit the HPUX assembler. */
#undef TARGET_VERSION
#undef REGISTER_NAMES
#undef ASM_OUTPUT_REG_PUSH
#undef ASM_OUTPUT_REG_POP
#undef ASM_APP_ON
#undef ASM_APP_OFF
#undef TEXT_SECTION_ASM_OP
#undef DATA_SECTION_ASM_OP
#undef READONLY_DATA_SECTION_ASM_OP
#undef ASM_OUTPUT_ADDR_VEC_ELT
#undef ASM_OUTPUT_ADDR_DIFF_ELT
#undef ASM_OUTPUT_ALIGN
#undef ASM_OUTPUT_SKIP
#undef ASM_OUTPUT_COMMON
#undef ASM_OUTPUT_LOCAL
#undef FUNCTION_PROFILER
#undef GLOBAL_ASM_OP
#undef IMMEDIATE_PREFIX
#undef REGISTER_PREFIX
#define TARGET_VERSION fprintf (stderr, " (68k, SGS/hpux syntax)");
#define REGISTER_NAMES \
{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
"%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
"%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", "argptr"}
#define IMMEDIATE_PREFIX "&"
#define REGISTER_PREFIX "%"
#define FUNCTION_PROFILER(FILE, LABEL_NO) \
fprintf (FILE, "\tmov.l &LP%d,%%a0\n\tjsr mcount\n", (LABEL_NO));
/* This is how to output an insn to push a register on the stack.
It need not be very fast code. */
#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
fprintf (FILE, "\tmov.l %s,-(%%sp)\n", reg_names[REGNO])
/* This is how to output an insn to pop a register from the stack.
It need not be very fast code. */
#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
fprintf (FILE, "\tmov.l (%%sp)+,%s\n", reg_names[REGNO])
/* For HPUX versions before 6.5, define this macro as empty. */
#define TARGET_ASM_FILE_START m68k_hp320_file_start
#define ASM_APP_ON ""
#define ASM_APP_OFF ""
#ifdef AS_BUG_TRAILING_LABEL
#define TEXT_SECTION_ASM_OP "\tlalign\t1\ntext"
#define DATA_SECTION_ASM_OP "\tlalign\t1\ndata"
#else
#define TEXT_SECTION_ASM_OP "text"
#define DATA_SECTION_ASM_OP "data"
#endif
#define ASCII_DATA_ASM_OP "\tbyte\t"
/* This is the command to make the user-level label named NAME
defined for reference from other files. */
#define GLOBAL_ASM_OP "\tglobal\t"
/* This says how to output an assembler line
to define a global common symbol. */
#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
( fputs ("\tcomm ", (FILE)), \
assemble_name ((FILE), (NAME)), \
fprintf ((FILE), ",%u\n", (int)(ROUNDED)))
/* This says how to output an assembler line
to define a local common symbol. */
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
( fputs ("\tlcomm ", (FILE)), \
assemble_name ((FILE), (NAME)), \
fprintf ((FILE), ",%u,2\n", (int)(ROUNDED)))
#define ASM_PN_FORMAT "%s___%lu"
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
fprintf (FILE, "\tlong L%d\n", VALUE)
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
fprintf (FILE, "\tshort L%d-L%d\n", VALUE, REL)
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
do { \
if ((LOG) == 1) \
fprintf (FILE, "\tlalign 2\n"); \
else if ((LOG) != 0) \
abort (); \
} while (0)
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
fprintf (FILE, "\tspace %u\n", (int)(SIZE))
#define ASM_OUTPUT_SOURCE_FILENAME(FILE, FILENAME)
#define ASM_OUTPUT_SOURCE_LINE(FILE, LINENO, COUNTER)
/* Output a float value (represented as a C double) as an immediate operand.
This macro is a 68k-specific macro. */
#undef ASM_OUTPUT_FLOAT_OPERAND
#ifdef AS_BUG_FLOATING_CONSTANT
#define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \
do { long l; \
REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
fprintf ((FILE), "&0x%lx", l); \
} while (0)
#else
#define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \
do { \
if (CODE == 'f') \
{ \
char dstr[30]; \
real_to_decimal (dstr, &(VALUE), sizeof (dstr), 9, 0); \
fprintf ((FILE), "&0f%s", dstr); \
} \
else \
{ \
long l; \
REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
fprintf ((FILE), "&0x%lx", l); \
} \
} while (0)
#endif /* AS_BUG_FLOATING_CONSTANT */
/* Output a double value (represented as a C double) as an immediate operand.
This macro is a 68k-specific macro. */
#undef ASM_OUTPUT_DOUBLE_OPERAND
#define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
do { char dstr[30]; \
real_to_decimal (dstr, &(VALUE), sizeof (dstr), 0, 1); \
fprintf (FILE, "&0f%s", dstr); \
} while (0)
/* Note, long double immediate operands are not actually
generated by m68k.md. */
#undef ASM_OUTPUT_LONG_DOUBLE_OPERAND
#define ASM_OUTPUT_LONG_DOUBLE_OPERAND(FILE,VALUE) \
do { char dstr[30]; \
real_to_decimal (dstr, &(VALUE), sizeof (dstr), 0, 1); \
fprintf (FILE, "&0f%s", dstr); \
} while (0)
#if 0
#undef PRINT_OPERAND
#define PRINT_OPERAND(FILE, X, CODE) \
{ if (CODE == '.') fprintf (FILE, "."); \
else if (CODE == '#') fprintf (FILE, "&"); \
else if (CODE == '-') fprintf (FILE, "-(%%sp)"); \
else if (CODE == '+') fprintf (FILE, "(%%sp)+"); \
else if (CODE == '@') fprintf (FILE, "(%%sp)"); \
else if (CODE == '!') fprintf (FILE, "%%fpcr"); \
else if (CODE == '$') { if (TARGET_68040_ONLY) fprintf (FILE, "s"); } \
else if (CODE == '&') { if (TARGET_68040_ONLY) fprintf (FILE, "d"); } \
else if (CODE == '/') \
fprintf (FILE, "%%"); \
else if (GET_CODE (X) == REG) \
fprintf (FILE, "%s", reg_names[REGNO (X)]); \
else if (GET_CODE (X) == MEM) \
output_address (XEXP (X, 0)); \
else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \
{ REAL_VALUE_TYPE r; long l; \
REAL_VALUE_FROM_CONST_DOUBLE (r, X); \
PRINT_OPERAND_FLOAT (CODE, FILE, r, l); } \
else if (GET_CODE (X) == CONST_DOUBLE \
&& (GET_MODE (X) == DFmode || GET_MODE (X) == XFmode)) \
{ char dstr[30]; \
real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (X), \
sizeof (dstr), 0, 1); \
fprintf (FILE, "&0f%s", dstr); } \
else { putc ('&', FILE); output_addr_const (FILE, X); }}
#endif
#undef PRINT_OPERAND_ADDRESS
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
{ register rtx reg1, reg2, breg, ireg; \
register rtx addr = ADDR; \
rtx offset; \
switch (GET_CODE (addr)) \
{ \
case REG: \
fprintf (FILE, "(%s)", reg_names[REGNO (addr)]); \
break; \
case PRE_DEC: \
fprintf (FILE, "-(%s)", reg_names[REGNO (XEXP (addr, 0))]); \
break; \
case POST_INC: \
fprintf (FILE, "(%s)+", reg_names[REGNO (XEXP (addr, 0))]); \
break; \
case PLUS: \
reg1 = 0; reg2 = 0; \
ireg = 0; breg = 0; \
offset = 0; \
if (CONSTANT_ADDRESS_P (XEXP (addr, 0))) \
{ \
offset = XEXP (addr, 0); \
addr = XEXP (addr, 1); \
} \
else if (CONSTANT_ADDRESS_P (XEXP (addr, 1))) \
{ \
offset = XEXP (addr, 1); \
addr = XEXP (addr, 0); \
} \
if (GET_CODE (addr) != PLUS) ; \
else if (GET_CODE (XEXP (addr, 0)) == SIGN_EXTEND) \
{ \
reg1 = XEXP (addr, 0); \
addr = XEXP (addr, 1); \
} \
else if (GET_CODE (XEXP (addr, 1)) == SIGN_EXTEND) \
{ \
reg1 = XEXP (addr, 1); \
addr = XEXP (addr, 0); \
} \
else if (GET_CODE (XEXP (addr, 0)) == MULT) \
{ \
reg1 = XEXP (addr, 0); \
addr = XEXP (addr, 1); \
} \
else if (GET_CODE (XEXP (addr, 1)) == MULT) \
{ \
reg1 = XEXP (addr, 1); \
addr = XEXP (addr, 0); \
} \
else if (GET_CODE (XEXP (addr, 0)) == REG) \
{ \
reg1 = XEXP (addr, 0); \
addr = XEXP (addr, 1); \
} \
else if (GET_CODE (XEXP (addr, 1)) == REG) \
{ \
reg1 = XEXP (addr, 1); \
addr = XEXP (addr, 0); \
} \
if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT \
|| GET_CODE (addr) == SIGN_EXTEND) \
{ if (reg1 == 0) reg1 = addr; else reg2 = addr; addr = 0; } \
/* for OLD_INDEXING \
else if (GET_CODE (addr) == PLUS) \
{ \
if (GET_CODE (XEXP (addr, 0)) == REG) \
{ \
reg2 = XEXP (addr, 0); \
addr = XEXP (addr, 1); \
} \
else if (GET_CODE (XEXP (addr, 1)) == REG) \
{ \
reg2 = XEXP (addr, 1); \
addr = XEXP (addr, 0); \
} \
} \
*/ \
if (offset != 0) { if (addr != 0) abort (); addr = offset; } \
if ((reg1 && (GET_CODE (reg1) == SIGN_EXTEND \
|| GET_CODE (reg1) == MULT)) \
|| (reg2 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg2)))) \
{ breg = reg2; ireg = reg1; } \
else if (reg1 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg1))) \
{ breg = reg1; ireg = reg2; } \
if (ireg != 0 && breg == 0 && GET_CODE (addr) == LABEL_REF) \
{ int scale = 1; \
if (GET_CODE (ireg) == MULT) \
{ scale = INTVAL (XEXP (ireg, 1)); \
ireg = XEXP (ireg, 0); } \
if (GET_CODE (ireg) == SIGN_EXTEND) \
fprintf (FILE, "L%d-LI%d(%%pc,%s.w", \
CODE_LABEL_NUMBER (XEXP (addr, 0)), \
CODE_LABEL_NUMBER (XEXP (addr, 0)), \
reg_names[REGNO (XEXP (ireg, 0))]); \
else \
fprintf (FILE, "L%d-LI%d(%%pc,%s.l", \
CODE_LABEL_NUMBER (XEXP (addr, 0)), \
CODE_LABEL_NUMBER (XEXP (addr, 0)), \
reg_names[REGNO (ireg)]); \
if (scale != 1) fprintf (FILE, "*%d", scale); \
putc (')', FILE); \
break; } \
if (ireg != 0 || breg != 0) \
{ int scale = 1; \
if (breg == 0) \
abort (); \
if (addr != 0) \
output_addr_const (FILE, addr); \
fprintf (FILE, "(%s", reg_names[REGNO (breg)]); \
if (ireg != 0) \
putc (',', FILE); \
if (ireg != 0 && GET_CODE (ireg) == MULT) \
{ scale = INTVAL (XEXP (ireg, 1)); \
ireg = XEXP (ireg, 0); } \
if (ireg != 0 && GET_CODE (ireg) == SIGN_EXTEND) \
fprintf (FILE, "%s.w", reg_names[REGNO (XEXP (ireg, 0))]); \
else if (ireg != 0) \
fprintf (FILE, "%s.l", reg_names[REGNO (ireg)]); \
if (scale != 1) fprintf (FILE, "*%d", scale); \
putc (')', FILE); \
break; \
} \
else if (reg1 != 0 && GET_CODE (addr) == LABEL_REF) \
{ fprintf (FILE, "L%d-LI%d(%%pc,%s.w)", \
CODE_LABEL_NUMBER (XEXP (addr, 0)), \
CODE_LABEL_NUMBER (XEXP (addr, 0)), \
reg_names[REGNO (reg1)]); \
break; } \
default: \
if (GET_CODE (addr) == CONST_INT \
&& INTVAL (addr) < 0x8000 \
&& INTVAL (addr) >= -0x8000) \
fprintf (FILE, "%d.w", (int) INTVAL (addr)); \
else \
output_addr_const (FILE, addr); \
}}
#define ASM_OUTPUT_ASCII(f, p, SIZE) \
do { size_t i, limit = (SIZE); \
int inside; \
inside = FALSE; \
for (i = 0; i < limit; i++) { \
if (i % 8 == 0) { \
if (i != 0) { \
if (inside) \
putc('"', (f)); \
putc('\n', (f)); \
inside = FALSE; \
} \
fprintf((f), "%s", ASCII_DATA_ASM_OP); \
} \
if ((p)[i] < 32 || (p)[i] == '\\' || (p)[i] == '"' || (p)[i] == 127) { \
if (inside) { \
putc('"', (f)); \
inside = FALSE; \
} \
if (i % 8 != 0) \
putc(',', (f)); \
fprintf((f), "%d", (p)[i]); \
} else { \
if (!inside) { \
if (i % 8 != 0) \
putc(',', (f)); \
putc('"', (f)); \
inside = TRUE; \
} \
putc((p)[i], (f)); \
} \
} \
if (inside) \
putc('"', (f)); \
putc('\n', (f)); \
} while (0)
/* Translate Motorola opcodes such as `jbeq'
into SGS opcodes such as `beq.w'.
Delete the `e' in `move...' and `fmove'.
Change `ftst' to `ftest'. */
#define ASM_OUTPUT_OPCODE(FILE, PTR) \
{ if ((PTR)[0] == 'j' && (PTR)[1] == 'b') \
{ ++(PTR); \
while (*(PTR) != ' ') \
{ putc (*(PTR), (FILE)); ++(PTR); } \
fprintf ((FILE), ".w"); } \
else if ((PTR)[0] == 'f') \
{ \
if (!strncmp ((PTR), "fmove", 5)) \
{ fprintf ((FILE), "fmov"); (PTR) += 5; } \
else if (!strncmp ((PTR), "ftst", 4)) \
{ fprintf ((FILE), "ftest"); (PTR) += 4; } \
} \
else if ((PTR)[0] == 'm' && (PTR)[1] == 'o' \
&& (PTR)[2] == 'v' && (PTR)[3] == 'e') \
{ fprintf ((FILE), "mov"); (PTR) += 4; } \
}
#else /* not HPUX_ASM */
#undef FUNCTION_PROFILER
/* HP-UX needs the call to mcount before the link instruction.
Copy the return address onto the stack before the call to fake it out. */
#define FUNCTION_PROFILER(FILE, LABEL_NO) \
fprintf (FILE, \
"\tmovel a6@(4),sp@-\n\tmovl #LP%d,a0\n\tjsr mcount\n\taddqw #4,sp\n", \
(LABEL_NO));
#endif /* not HPUX_ASM */
/* hpux8 and later have C++ compatible include files, so do not
pretend they are `extern "C"'. */
#define NO_IMPLICIT_EXTERN_C

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@ -1,40 +0,0 @@
/* Configuration file for an HP 320.
Copyright (C) 2003 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Control assembler-syntax conditionals in m68k.md. */
#ifndef USE_GAS
#define MOTOROLA /* Use Motorola syntax rather than "MIT" */
#define SGS /* Uses SGS assembler */
#define SGS_CMP_ORDER /* Takes cmp operands in reverse order */
#define HPUX_ASM
#if !defined (CROSS_COMPILE) && !defined (NO_BUGS)
/* The assembler on HP 9k3xx machines running HPUX 8.0 doesn't translate
floating point constants behind some operands. The workaround is to
use hex constants. Reported by Thomas Nau (nau@medizin.uni-ulm.de). */
#define AS_BUG_FLOATING_CONSTANT
/* The assembler on HP 9k3xx machines running HPUX 8.0 doesn't accept
labels followed by a text, data, or other section directive. Reported
by Thomas Nau (nau@medizin.uni-ulm.de). */
#define AS_BUG_TRAILING_LABEL
#endif
#endif /* not USE_GAS */

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@ -1,298 +0,0 @@
/* Target definitions for GNU compiler for mc680x0 running System V.4
Copyright (C) 1991, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2003, 2004
Free Software Foundation, Inc.
Contributed by Ron Guilmette (rfg@monkeys.com) and
Fred Fish (fnf@cygnus.com).
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Target OS builtins. */
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
builtin_define_std ("unix"); \
builtin_define_std ("m68k"); \
builtin_define ("__svr4__"); \
builtin_define ("__motorola__"); \
builtin_assert ("system=unix"); \
builtin_assert ("system=svr4"); \
} \
while (0)
#ifndef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_BITFIELD|MASK_68881|MASK_68020)
#endif
/* Override the definition of NO_DOLLAR_IN_LABEL in svr4.h, for special
g++ assembler names. When this is defined, g++ uses embedded '.'
characters and some m68k assemblers have problems with this. The
chances are much greater that any particular assembler will permit
embedded '$' characters. */
#undef NO_DOLLAR_IN_LABEL
/* Define PCC_STATIC_STRUCT_RETURN if the convention on the target machine
is to use the nonreentrant technique for returning structure and union
values, as commonly implemented by the AT&T Portable C Compiler (PCC).
When defined, the gcc option -fpcc-struct-return can be used to cause
this form to be generated. When undefined, the option does nothing.
For m68k SVR4, the convention is to use a reentrant technique compatible
with the gcc default, so override the definition of this macro in m68k.h */
#undef PCC_STATIC_STRUCT_RETURN
/* Test to see if the target includes a 68881 by default, and use CPP_SPEC
to control whether or not __HAVE_68881__ is defined by default or not.
If a 68881 is the default, gcc will use inline 68881 instructions, by
predefining __HAVE_68881__, unless -msoft-float is specified.
If a 68881 is not the default, gcc will only define __HAVE_68881__ if
-m68881 is specified. */
#if TARGET_DEFAULT & MASK_68881
#define CPP_SPEC "%{!msoft-float:-D__HAVE_68881__}"
#else
#define CPP_SPEC "%{m68881:-D__HAVE_68881__}"
#endif
/* Output assembler code to FILE to increment profiler label # LABELNO
for profiling a function entry. We override the definition in m68k.h
and match the way the native m68k/SVR4 compiler does profiling, with the
address of the profile counter in a1, not a0, and using bsr rather
than jsr. */
#undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(FILE, LABELNO) \
asm_fprintf ((FILE), "\tlea.l\t(%LLP%d,%Rpc),%Ra1\n\tbsr\t_mcount\n", \
(LABELNO))
/* Local common symbols are declared to the assembler with ".lcomm" rather
than ".bss", so override the definition in svr4.h */
/* ??? svr4.h no longer defines this, and this is only used by m68k/amix.h. */
#undef BSS_ASM_OP
#define BSS_ASM_OP "\t.lcomm\t"
/* Register in which address to store a structure value is passed to a
function. The default in m68k.h is a1. For m68k/SVR4 it is a0. */
#undef M68K_STRUCT_VALUE_REGNUM
#define M68K_STRUCT_VALUE_REGNUM 8
/* Register in which static-chain is passed to a function. The
default in m68k.h is a0, but that is already the struct value
regnum. Make it a1 instead. */
#undef STATIC_CHAIN_REGNUM
#define STATIC_CHAIN_REGNUM 9
#define ASM_COMMENT_START "#"
/* Define how the m68k registers should be numbered for Dwarf output.
The numbering provided here should be compatible with the native
SVR4 SDB debugger in the m68k/SVR4 reference port, where d0-d7
are 0-7, a0-a8 are 8-15, and fp0-fp7 are 16-23. */
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
/* The ASM_OUTPUT_SKIP macro is first defined in m68k.h, using ".skip".
It is then overridden by m68k/sgs.h to use ".space", and again by svr4.h
to use ".zero". The m68k/SVR4 assembler uses ".space", so repeat the
definition from m68k/sgs.h here. Note that ASM_NO_SKIP_IN_TEXT is
defined in m68k/sgs.h, so we don't have to repeat it here. */
#undef ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
fprintf (FILE, "%s%u\n", SPACE_ASM_OP, (int)(SIZE))
/* 1 if N is a possible register number for a function value.
For m68k/SVR4 allow d0, a0, or fp0 as return registers, for integral,
pointer, or floating types, respectively. Reject fp0 if not using a
68881 coprocessor. */
#undef FUNCTION_VALUE_REGNO_P
#define FUNCTION_VALUE_REGNO_P(N) \
((N) == 0 || (N) == 8 || (TARGET_68881 && (N) == 16))
/* Define this to be true when FUNCTION_VALUE_REGNO_P is true for
more than one register. */
#undef NEEDS_UNTYPED_CALL
#define NEEDS_UNTYPED_CALL 1
/* Define how to generate (in the callee) the output value of a function
and how to find (in the caller) the value returned by a function. VALTYPE
is the data type of the value (as a tree). If the precise function being
called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0.
For m68k/SVR4 generate the result in d0, a0, or fp0 as appropriate. */
#undef FUNCTION_VALUE
#define FUNCTION_VALUE(VALTYPE, FUNC) \
(TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \
? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \
: (POINTER_TYPE_P (VALTYPE) \
? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \
: gen_rtx_REG (TYPE_MODE (VALTYPE), 0)))
/* For compatibility with the large body of existing code which does not
always properly declare external functions returning pointer types, the
m68k/SVR4 convention is to copy the value returned for pointer functions
from a0 to d0 in the function epilogue, so that callers that have
neglected to properly declare the callee can still find the correct return
value. */
#define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) \
do { \
if (current_function_returns_pointer \
&& ! find_equiv_reg (0, get_last_insn (), 0, 0, 0, 8, Pmode)) \
asm_fprintf (FILE, "\tmov.l %Ra0,%Rd0\n"); \
} while (0);
/* Define how to find the value returned by a library function assuming the
value has mode MODE.
For m68k/SVR4 look for integer values in d0, pointer values in d0
(returned in both d0 and a0), and floating values in fp0. */
#undef LIBCALL_VALUE
#define LIBCALL_VALUE(MODE) \
((((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode) \
&& TARGET_68881) \
? gen_rtx_REG ((MODE), 16) \
: gen_rtx_REG ((MODE), 0))
/* Boundary (in *bits*) on which stack pointer should be aligned.
The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
#undef STACK_BOUNDARY
#define STACK_BOUNDARY 32
/* Alignment of field after `int : 0' in a structure.
For m68k/SVR4, this is the next longword boundary. */
#undef EMPTY_FIELD_BOUNDARY
#define EMPTY_FIELD_BOUNDARY 32
/* No data type wants to be aligned rounder than this.
For m68k/SVR4, some types (doubles for example) are aligned on 8 byte
boundaries */
#undef BIGGEST_ALIGNMENT
#define BIGGEST_ALIGNMENT 64
/* SVR4 m68k assembler is bitching on the `comm i,1,1' which asks for
1 byte alignment. Don't generate alignment for COMMON seems to be
safer until we the assembler is fixed. */
#undef ASM_OUTPUT_ALIGNED_COMMON
/* Same problem with this one. */
#undef ASM_OUTPUT_ALIGNED_LOCAL
/* The `string' directive on m68k svr4 does not handle string with
escape char (ie., `\') right. Use normal way to output ASCII bytes
seems to be safer. */
#undef ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(FILE,PTR,LEN) \
do { \
register size_t sp = 0, limit = (LEN); \
fputs (integer_asm_op (1, TRUE), (FILE)); \
do { \
int ch = (PTR)[sp]; \
if (ch > ' ' && ! (ch & 0x80) && ch != '\\') \
{ \
fprintf ((FILE), "'%c", ch); \
} \
else \
{ \
fprintf ((FILE), "0x%x", ch); \
} \
if (++sp < limit) \
{ \
if ((sp % 10) == 0) \
{ \
fprintf ((FILE), "\n%s", integer_asm_op (1, TRUE)); \
} \
else \
{ \
putc (',', (FILE)); \
} \
} \
} while (sp < limit); \
putc ('\n', (FILE)); \
} while (0)
/* SVR4 m68k assembler is bitching on the syntax `2.b'.
So use the "LLDnnn-LLnnn" format. Define LLDnnn after the table. */
#undef ASM_OUTPUT_CASE_END
#define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \
do { \
if (switch_table_difference_label_flag) \
asm_fprintf ((FILE), "%s%LLD%d,%LL%d\n", SET_ASM_OP, (NUM), (NUM)); \
switch_table_difference_label_flag = 0; \
} while (0)
extern int switch_table_difference_label_flag;
#undef ASM_OUTPUT_COMMON
#undef ASM_OUTPUT_LOCAL
#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
( fputs (".comm ", (FILE)), \
assemble_name ((FILE), (NAME)), \
fprintf ((FILE), ",%u\n", (int)(SIZE)))
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
( fputs (".lcomm ", (FILE)), \
assemble_name ((FILE), (NAME)), \
fprintf ((FILE), ",%u\n", (int)(SIZE)))
/* Override the definition in svr4.h. In m68k svr4, using swbeg is the
standard way to do switch table. */
#undef ASM_OUTPUT_BEFORE_CASE_LABEL
#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
fprintf ((FILE), "%s&%d\n", SWBEG_ASM_OP, XVECLEN (PATTERN (TABLE), 1));
/* Output assembler code for a block containing the constant parts
of a trampoline, leaving space for the variable parts. */
/* On m68k svr4, the trampoline is different from the generic version
in that we use a1 as the static call chain. */
#undef TRAMPOLINE_TEMPLATE
#define TRAMPOLINE_TEMPLATE(FILE) \
{ \
assemble_aligned_integer (2, GEN_INT (0x227a)); \
assemble_aligned_integer (2, GEN_INT (8)); \
assemble_aligned_integer (2, GEN_INT (0x2f3a)); \
assemble_aligned_integer (2, GEN_INT (8)); \
assemble_aligned_integer (2, GEN_INT (0x4e75)); \
assemble_aligned_integer (4, const0_rtx); \
assemble_aligned_integer (4, const0_rtx); \
}
/* Redefine since we are using a different trampoline */
#undef TRAMPOLINE_SIZE
#define TRAMPOLINE_SIZE 18
/* Emit RTL insns to initialize the variable parts of a trampoline.
FNADDR is an RTX for the address of the function's pure code.
CXT is an RTX for the static chain value for the function. */
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 10)), CXT); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 14)), FNADDR); \
}

View file

@ -1,62 +0,0 @@
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
NETBSD_OS_CPP_BUILTINS_AOUT(); \
builtin_define_std ("unix"); \
builtin_define_std ("m68k"); \
builtin_define_std ("mc68000"); \
builtin_define_std ("mc68020"); \
} \
while (0)
#define TARGET_DEFAULT (MASK_BITFIELD|MASK_68881|MASK_68020)
#define EXTRA_SPECS \
{ "netbsd_cpp_spec", NETBSD_CPP_SPEC },
/* Define __HAVE_68881__ in preprocessor, unless -msoft-float is specified.
This will control the use of inline 68881 insns in certain macros. */
#undef CPP_SPEC
#define CPP_SPEC \
"%{!msoft-float:-D__HAVE_68881__ -D__HAVE_FPU__} %(netbsd_cpp_spec)"
#undef ASM_SPEC
#define ASM_SPEC "%{m68030} %{m68040} %{m68060} %{fpic|fpie:-k} %{fPIC|fPIE:-k -K}"
#define AS_NEEDS_DASH_FOR_PIPED_INPUT
/* Make gcc agree with <machine/ansi.h> */
#undef SIZE_TYPE
#define SIZE_TYPE "unsigned int"
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "int"
/* Every structure or union's size must be a multiple of 2 bytes. */
#define STRUCTURE_SIZE_BOUNDARY 16
/* This is BSD, so it wants DBX format. */
#define DBX_DEBUGGING_INFO 1
/* Do not break .stabs pseudos into continuations. */
#define DBX_CONTIN_LENGTH 0
/* This is the char to use for continuation (in case we need to turn
continuation back on). */
#define DBX_CONTIN_CHAR '?'
/* Don't default to pcc-struct-return, because gcc is the only compiler, and
we want to retain compatibility with older gcc versions. */
#define DEFAULT_PCC_STRUCT_RETURN 0
/* Until they use ELF or something that handles dwarf2 unwinds
and initialization stuff better. */
#define DWARF2_UNWIND_INFO 0

View file

@ -1,367 +0,0 @@
/* Definitions of target machine for GNU compiler for m68k targets using
assemblers derived from AT&T "SGS" releases.
Copyright (C) 1991, 1993, 1996, 2000, 2003 Free Software Foundation, Inc.
Written by Fred Fish (fnf@cygnus.com)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#undef INT_OP_GROUP
#define INT_OP_GROUP INT_OP_STANDARD
/* SGS specific assembler pseudo ops. */
#define SPACE_ASM_OP "\t.space "
#define ALIGN_ASM_OP "\t.align "
#undef GLOBAL_ASM_OP
#define GLOBAL_ASM_OP "\t.global "
#define SWBEG_ASM_OP "\t.swbeg "
#define SET_ASM_OP "\t.set "
#define ASM_PN_FORMAT "%s_%lu" /* Format for private names */
/* Here are four prefixes that are used by asm_fprintf to
facilitate customization for alternate assembler syntaxes.
Machines with no likelihood of an alternate syntax need not
define these and need not use asm_fprintf. */
/* The prefix for register names. Note that REGISTER_NAMES
is supposed to include this prefix. Also note that this is NOT an
fprintf format string, it is a literal string */
#undef REGISTER_PREFIX
#define REGISTER_PREFIX "%"
/* The prefix for local (compiler generated) labels.
These labels will not appear in the symbol table. */
#undef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX "."
/* The prefix to add to user-visible assembler symbols. */
#undef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX ""
/* The prefix for immediate operands. */
#undef IMMEDIATE_PREFIX
#define IMMEDIATE_PREFIX "&"
/* How to refer to registers in assembler output.
This sequence is indexed by compiler's hard-register-number.
Motorola format uses different register names than defined in m68k.h.
We also take this chance to convert 'a6' to 'fp' */
#undef REGISTER_NAMES
#define REGISTER_NAMES \
{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
"%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
"%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", "argptr" }
/* This is how to output an assembler line that says to advance the
location counter to a multiple of 2**LOG bytes. */
#undef ASM_OUTPUT_ALIGN
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
do { \
if ((LOG) > 0) \
fprintf ((FILE), "%s%u\n", ALIGN_ASM_OP, 1 << (LOG)); \
else if ((LOG) > 31) \
abort (); \
} while (0)
/* The routine used to output null terminated string literals. We cannot
use the ".string" pseudo op, because it silently truncates strings to
1023 bytes. There is no "partial string op" which works like ".string"
but doesn't append a null byte, so we can't chop the input string up
into small pieces and use that. Our only remaining alternative is to
output the string one byte at a time. */
#define ASM_OUTPUT_ASCII(FILE,PTR,LEN) \
do { \
register size_t sp = 0, limit = (LEN); \
fputs (integer_asm_op (1, TRUE), (FILE)); \
do { \
int ch = (PTR)[sp]; \
if (ch > ' ' && ! (ch & 0x80) && ch != '\\') \
{ \
fprintf ((FILE), "'%c", ch); \
} \
else \
{ \
fprintf ((FILE), "0x%x", ch); \
} \
if (++sp < limit) \
{ \
if ((sp % 10) == 0) \
{ \
fprintf ((FILE), "\n%s", integer_asm_op (1, TRUE)); \
} \
else \
{ \
putc (',', (FILE)); \
} \
} \
} while (sp < limit); \
putc ('\n', (FILE)); \
} while (0)
/* SGS based assemblers don't understand #NO_APP and #APP, so just don't
bother emitting them. */
#undef ASM_APP_ON
#define ASM_APP_ON ""
#undef ASM_APP_OFF
#define ASM_APP_OFF ""
/* When using SGS derived assemblers, change the "MIT" or "MOTOROLA"
to "SGS/AT&T" */
#undef TARGET_VERSION
#define TARGET_VERSION fprintf (stderr, " (68k, SGS/AT&T syntax)");
/* Use proper assembler syntax for these macros. */
#undef ASM_OUTPUT_REG_PUSH
#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
asm_fprintf (FILE, "\t%Omove.l %s,-(%Rsp)\n", reg_names[REGNO])
#undef ASM_OUTPUT_REG_POP
#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
asm_fprintf (FILE, "\t%Omove.l (%Rsp)+,%s\n", reg_names[REGNO])
#undef ASM_OUTPUT_FLOAT_OPERAND
#define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \
do { long l; \
REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
asm_fprintf ((FILE), "%I0x%lx", l); \
} while (0)
#undef ASM_OUTPUT_DOUBLE_OPERAND
#define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
do { long l[2]; \
REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
asm_fprintf ((FILE), "%I0x%lx%08lx", l[0], l[1]);\
} while (0)
/* How to output a block of SIZE zero bytes. Note that the `space' pseudo,
when used in the text segment, causes SGS assemblers to output nop insns
rather than 0s, so we set ASM_NO_SKIP_IN_TEXT to prevent this. */
#define ASM_NO_SKIP_IN_TEXT 1
#undef ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
fprintf (FILE, "%s%u\n", SPACE_ASM_OP, (int)(SIZE))
/* Translate Motorola opcodes such as `jbeq' into SGS opcodes such
as `beq.w'.
Delete the `e' in `move...' and `fmove'.
Change `ftst' to `ftest'.
Change `fbne' to `fbneq'
Change `fsne' to `fsneq'
Change `divsl' to `tdivs' (32/32 -> 32r:32q)
Change `divul' to `tdivu' (32/32 -> 32r:32q)
Optionally change swap to swap.w.
*/
#ifdef SGS_SWAP_W
#define ASM_OUTPUT_OPCODE(FILE, PTR) \
{ \
extern int flag_pic; \
if (!strncmp ((PTR), "jbsr", 4)) \
{ if (flag_pic) \
fprintf ((FILE), "bsr"); \
else \
fprintf ((FILE), "jsr"); \
(PTR) += 4; } \
else if ((PTR)[0] == 'j' && (PTR)[1] == 'b') \
{ ++(PTR); \
while (*(PTR) != ' ') \
{ putc (*(PTR), (FILE)); ++(PTR); } \
fprintf ((FILE), ".w"); } \
else if ((PTR)[0] == 's') \
{ \
if (!strncmp ((PTR), "swap", 4)) \
{ fprintf ((FILE), "swap.w"); (PTR) += 4; } \
} \
/* FMOVE ==> FMOV, (and F%& F%$ translations) */ \
else if ((PTR)[0] == 'f') \
{ \
if (!strncmp ((PTR), "fmove", 5)) \
{ fprintf ((FILE), "fmov"); (PTR) += 5; } \
else if (!strncmp ((PTR), "ftst", 4)) \
{ fprintf ((FILE), "ftest"); (PTR) += 4; } \
else if (!strncmp ((PTR), "fbne", 4)) \
{ fprintf ((FILE), "fbneq"); (PTR) += 4; } \
else if (!strncmp ((PTR), "fsne", 4)) \
{ fprintf ((FILE), "fsneq"); (PTR) += 4; } \
else if (!strncmp ((PTR), "f%$move", 7)) \
{ (PTR) += 7; \
if (TARGET_68040_ONLY) \
fprintf ((FILE), "fsmov"); \
else fprintf ((FILE), "fmov"); } \
else if (!strncmp ((PTR), "f%&move", 7)) \
{ (PTR) += 7; \
if (TARGET_68040_ONLY) \
fprintf ((FILE), "fdmov"); \
else fprintf ((FILE), "fmov"); } \
} \
/* MOVE, MOVEA, MOVEQ, MOVEC ==> MOV */ \
else if ((PTR)[0] == 'm' && (PTR)[1] == 'o' \
&& (PTR)[2] == 'v' && (PTR)[3] == 'e') \
{ fprintf ((FILE), "mov"); (PTR) += 4; \
if ((PTR)[0] == 'q' || (PTR)[0] == 'a' \
|| (PTR)[0] == 'c') (PTR)++; } \
/* SUB, SUBQ, SUBA, SUBI ==> SUB */ \
else if ((PTR)[0] == 's' && (PTR)[1] == 'u' \
&& (PTR)[2] == 'b') \
{ fprintf ((FILE), "sub"); (PTR) += 3; \
if ((PTR)[0] == 'q' || (PTR)[0] == 'i' \
|| (PTR)[0] == 'a') (PTR)++; } \
/* CMP, CMPA, CMPI, CMPM ==> CMP */ \
else if ((PTR)[0] == 'c' && (PTR)[1] == 'm' \
&& (PTR)[2] == 'p') \
{ fprintf ((FILE), "cmp"); (PTR) += 3; \
if ((PTR)[0] == 'a' || (PTR)[0] == 'i' \
|| (PTR)[0] == 'm') (PTR)++; } \
/* DIVSL ==> TDIVS */ \
else if ((PTR)[0] == 'd' && (PTR)[1] == 'i' \
&& (PTR)[2] == 'v' && (PTR)[3] == 's' \
&& (PTR)[4] == 'l') \
{ fprintf ((FILE), "tdivs"); (PTR) += 5; } \
/* DIVUL ==> TDIVU */ \
else if ((PTR)[0] == 'd' && (PTR)[1] == 'i' \
&& (PTR)[2] == 'v' && (PTR)[3] == 'u' \
&& (PTR)[4] == 'l') \
{ fprintf ((FILE), "tdivu"); (PTR) += 5; } \
}
#else /* not SGS_SWAP_W */
#define ASM_OUTPUT_OPCODE(FILE, PTR) \
{ \
extern int flag_pic; \
if (!strncmp ((PTR), "jbsr", 4)) \
{ if (flag_pic) \
fprintf ((FILE), "bsr"); \
else \
fprintf ((FILE), "jsr"); \
(PTR) += 4; } \
else if ((PTR)[0] == 'j' && (PTR)[1] == 'b') \
{ ++(PTR); \
while (*(PTR) != ' ') \
{ putc (*(PTR), (FILE)); ++(PTR); } \
fprintf ((FILE), ".w"); } \
/* FMOVE ==> FMOV, (and F%& F%$ translations) */ \
else if ((PTR)[0] == 'f') \
{ \
if (!strncmp ((PTR), "fmove", 5)) \
{ fprintf ((FILE), "fmov"); (PTR) += 5; } \
else if (!strncmp ((PTR), "ftst", 4)) \
{ fprintf ((FILE), "ftest"); (PTR) += 4; } \
else if (!strncmp ((PTR), "fbne", 4)) \
{ fprintf ((FILE), "fbneq"); (PTR) += 4; } \
else if (!strncmp ((PTR), "fsne", 4)) \
{ fprintf ((FILE), "fsneq"); (PTR) += 4; } \
else if (!strncmp ((PTR), "f%$move", 7)) \
{ (PTR) += 7; \
if (TARGET_68040_ONLY) \
fprintf ((FILE), "fsmov"); \
else fprintf ((FILE), "fmov"); } \
else if (!strncmp ((PTR), "f%&move", 7)) \
{ (PTR) += 7; \
if (TARGET_68040_ONLY) \
fprintf ((FILE), "fdmov"); \
else fprintf ((FILE), "fmov"); } \
} \
/* MOVE, MOVEA, MOVEQ, MOVEC ==> MOV */ \
else if ((PTR)[0] == 'm' && (PTR)[1] == 'o' \
&& (PTR)[2] == 'v' && (PTR)[3] == 'e') \
{ fprintf ((FILE), "mov"); (PTR) += 4; \
if ((PTR)[0] == 'q' || (PTR)[0] == 'a' \
|| (PTR)[0] == 'c') (PTR)++; } \
/* SUB, SUBQ, SUBA, SUBI ==> SUB */ \
else if ((PTR)[0] == 's' && (PTR)[1] == 'u' \
&& (PTR)[2] == 'b') \
{ fprintf ((FILE), "sub"); (PTR) += 3; \
if ((PTR)[0] == 'q' || (PTR)[0] == 'i' \
|| (PTR)[0] == 'a') (PTR)++; } \
/* CMP, CMPA, CMPI, CMPM ==> CMP */ \
else if ((PTR)[0] == 'c' && (PTR)[1] == 'm' \
&& (PTR)[2] == 'p') \
{ fprintf ((FILE), "cmp"); (PTR) += 3; \
if ((PTR)[0] == 'a' || (PTR)[0] == 'i' \
|| (PTR)[0] == 'm') (PTR)++; } \
/* DIVSL ==> TDIVS */ \
else if ((PTR)[0] == 'd' && (PTR)[1] == 'i' \
&& (PTR)[2] == 'v' && (PTR)[3] == 's' \
&& (PTR)[4] == 'l') \
{ fprintf ((FILE), "tdivs"); (PTR) += 5; } \
/* DIVUL ==> TDIVU */ \
else if ((PTR)[0] == 'd' && (PTR)[1] == 'i' \
&& (PTR)[2] == 'v' && (PTR)[3] == 'u' \
&& (PTR)[4] == 'l') \
{ fprintf ((FILE), "tdivu"); (PTR) += 5; } \
}
#endif /* not SGS_SWAP_W */
/* This macro outputs the label at the start of a switch table. The
".swbeg <N>" is an assembler directive that causes the switch table
size to be inserted into the object code so that disassemblers, for
example, can identify that it is the start of a switch table. */
#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
fprintf ((FILE), "%s&%d\n", SWBEG_ASM_OP, XVECLEN (PATTERN (TABLE), 1));
#define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
do { \
ASM_OUTPUT_BEFORE_CASE_LABEL((FILE),(PREFIX),(NUM),(TABLE)); \
(*targetm.asm_out.internal_label)((FILE),(PREFIX),(NUM)); \
} while (0)
/* At end of a switch table, define LDnnn iff the symbol LInnn was defined.
Some SGS assemblers have a bug such that "Lnnn-LInnn-2.b(pc,d0.l*2)"
fails to assemble. Luckily "LDnnn(pc,d0.l*2)" produces the results
we want. This difference can be accommodated by making the assembler
define such "LDnnn" to be either "Lnnn-LInnn-2.b", "Lnnn", or any other
string, as necessary. This is accomplished via the ASM_OUTPUT_CASE_END
macro. */
#undef ASM_OUTPUT_CASE_END
#define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \
{ if (switch_table_difference_label_flag) \
asm_fprintf (FILE, "%s%LLD%d,%LL%d-%LLI%d-2.b\n",\
SET_ASM_OP, (NUM), (NUM), (NUM)); \
switch_table_difference_label_flag = 0; }
extern int switch_table_difference_label_flag;
/* This is how to output an element of a case-vector that is relative. */
#undef ASM_OUTPUT_ADDR_DIFF_ELT
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
asm_fprintf (FILE, "%s%LL%d-%LL%d\n", integer_asm_op (2, TRUE), VALUE, REL)
/* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
keep switch tables in the text section. */
#define JUMP_TABLES_IN_TEXT_SECTION 1

View file

@ -1,2 +0,0 @@
# So putenv and other functions get seen by fixproto.
FIXPROTO_DEFINES = -D_HPUX_SOURCE

View file

@ -1,68 +0,0 @@
/* netware.h -- operating system specific defines to be used when
targeting GCC for some generic NetWare 4 system.
Copyright (C) 1993, 1994, 2000, 2001, 2002 Free Software Foundation, Inc.
Written by David V. Henkel-Wallace (gumby@cygnus.com)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* We don't actually need any of these; the MD_ vars are ignored
anyway for cross-compilers, and the other specs won't get picked up
'coz the user is supposed to do ld -r (hmm, perhaps that should be
the default). In any case, setting them thus will catch some
common user errors. */
#undef MD_EXEC_PREFIX
#undef MD_STARTFILE_PREFIX
#undef LIB_SPEC
#define LIB_SPEC ""
/* Kinda useless, but what the hell */
#undef LINK_SPEC
#define LINK_SPEC "%{h*} %{V} %{v:%{!V:-V}} \
%{b} %{Wl,*:%*} \
%{Qy:} %{!Qn:-Qy}"
#undef STARTFILE_SPEC
#define STARTFILE_SPEC ""
#undef ENDFILE_SPEC
#define ENDFILE_SPEC ""
#undef RELATIVE_PREFIX_NOT_LINKDIR
#undef LIBGCC_SPEC
/* set debugging info */
#define DBX_DEBUGGING_INFO 1
#undef SDB_DEBUGGING_INFO
#undef XCOFF_DEBUGGING_INFO
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
/* Support const sections and the ctors and dtors sections for g++. */
#undef HAS_INIT_SECTION
#undef INIT_SECTION_ASM_OP
#undef READONLY_DATA_SECTION_ASM_OP
#define READONLY_DATA_SECTION_ASM_OP ".section\t.rodata"
#undef CTORS_SECTION_ASM_OP
#define CTORS_SECTION_ASM_OP ".section\t.ctors,\"x\""
#undef DTORS_SECTION_ASM_OP
#define DTORS_SECTION_ASM_OP ".section\t.dtors,\"x\""

View file

@ -1,7 +0,0 @@
# We are building for the Linux C library 5.
T_CFLAGS = -DUSE_GNULIBC_1
# Use unwind-dw2-fde
LIB2ADDEH = $(srcdir)/unwind-dw2.c $(srcdir)/unwind-dw2-fde.c \
$(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c
LIB2ADDEHDEP = unwind.inc unwind-dw2-fde.h

View file

@ -7198,8 +7198,6 @@ declarations.
@c Describe c4x pragmas here.
@c Describe h8300 pragmas here.
@c Describe i370 pragmas here.
@c Describe i960 pragmas here.
@c Describe sh pragmas here.
@c Describe v850 pragmas here.

View file

@ -530,7 +530,7 @@ provide a configure target when configuring a native compiler.
@item
@var{target} must be specified as @option{--target=@var{target}}
when configuring a cross compiler; examples of valid targets would be
i960-rtems, m68k-coff, sh-elf, etc.
m68k-coff, sh-elf, etc.
@item
Specifying just @var{target} instead of @option{--target=@var{target}}
@ -2010,8 +2010,6 @@ GNU Compiler Collection on your machine.
@item
@uref{#dos,,DOS}
@item
@uref{#dsp16xx,,dsp16xx}
@item
@uref{#*-*-freebsd*,,*-*-freebsd*}
@item
@uref{#h8300-hms,,h8300-hms}
@ -2022,8 +2020,6 @@ GNU Compiler Collection on your machine.
@item
@uref{#hppa*-hp-hpux11,,hppa*-hp-hpux11}
@item
@uref{#i370-*-*,,i370-*-*}
@item
@uref{#*-*-linux-gnu,,*-*-linux-gnu}
@item
@uref{#ix86-*-linux*aout,,i?86-*-linux*aout}
@ -2401,12 +2397,6 @@ any MSDOS compiler except itself. You need to get the complete
compilation package DJGPP, which includes binaries as well as sources,
and includes all the necessary compilation tools and libraries.
@html
<hr />
@end html
@heading @anchor{dsp16xx}dsp16xx
A port to the AT&T DSP1610 family of processors.
@html
<hr />
@end html
@ -2622,13 +2612,6 @@ either HP's unbundled compiler, or a binary distribution of GCC@.
This port still is undergoing significant development.
@html
<hr />
@end html
@heading @anchor{i370-*-*}i370-*-*
This port is very preliminary and has many known bugs. We hope to
have a higher-quality port for this machine soon.
@html
<hr />
@end html

View file

@ -510,16 +510,6 @@ in the following sections.
-mschedule=@var{cpu-type} -mspace-regs -msio -mwsio @gol
-nolibdld -static -threads}
@emph{Intel 960 Options}
@gccoptlist{-m@var{cpu-type} -masm-compat -mclean-linkage @gol
-mcode-align -mcomplex-addr -mleaf-procedures @gol
-mic-compat -mic2.0-compat -mic3.0-compat @gol
-mintel-asm -mno-clean-linkage -mno-code-align @gol
-mno-complex-addr -mno-leaf-procedures @gol
-mno-old-align -mno-strict-align -mno-tail-call @gol
-mnumerics -mold-align -msoft-float -mstrict-align @gol
-mtail-call}
@emph{DEC Alpha Options}
@gccoptlist{-mno-fp-regs -msoft-float -malpha-as -mgas @gol
-mieee -mieee-with-inexact -mieee-conformant @gol
@ -605,10 +595,6 @@ in the following sections.
-minline-int-divide-max-throughput -mno-dwarf2-asm @gol
-mfixed-range=@var{register-range}}
@emph{D30V Options}
@gccoptlist{-mextmem -mextmemory -monchip -mno-asm-optimize @gol
-masm-optimize -mbranch-cost=@var{n} -mcond-exec=@var{n}}
@emph{S/390 and zSeries Options}
@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol
-mhard-float -msoft-float -mbackchain -mno-backchain @gol
@ -5847,7 +5833,6 @@ that macro, which enables you to change the defaults.
* MIPS Options::
* i386 and x86-64 Options::
* HPPA Options::
* Intel 960 Options::
* DEC Alpha Options::
* DEC Alpha/VMS Options::
* H8/300 Options::
@ -5860,7 +5845,6 @@ that macro, which enables you to change the defaults.
* AVR Options::
* MCore Options::
* IA-64 Options::
* D30V Options::
* S/390 and zSeries Options::
* CRIS Options::
* MMIX Options::
@ -8717,118 +8701,6 @@ under HP-UX. This option sets flags for both the preprocessor and
linker.
@end table
@node Intel 960 Options
@subsection Intel 960 Options
These @samp{-m} options are defined for the Intel 960 implementations:
@table @gcctabopt
@item -m@var{cpu-type}
@opindex mka
@opindex mkb
@opindex mmc
@opindex mca
@opindex mcf
@opindex msa
@opindex msb
Assume the defaults for the machine type @var{cpu-type} for some of
the other options, including instruction scheduling, floating point
support, and addressing modes. The choices for @var{cpu-type} are
@samp{ka}, @samp{kb}, @samp{mc}, @samp{ca}, @samp{cf},
@samp{sa}, and @samp{sb}.
The default is
@samp{kb}.
@item -mnumerics
@itemx -msoft-float
@opindex mnumerics
@opindex msoft-float
The @option{-mnumerics} option indicates that the processor does support
floating-point instructions. The @option{-msoft-float} option indicates
that floating-point support should not be assumed.
@item -mleaf-procedures
@itemx -mno-leaf-procedures
@opindex mleaf-procedures
@opindex mno-leaf-procedures
Do (or do not) attempt to alter leaf procedures to be callable with the
@code{bal} instruction as well as @code{call}. This will result in more
efficient code for explicit calls when the @code{bal} instruction can be
substituted by the assembler or linker, but less efficient code in other
cases, such as calls via function pointers, or using a linker that doesn't
support this optimization.
@item -mtail-call
@itemx -mno-tail-call
@opindex mtail-call
@opindex mno-tail-call
Do (or do not) make additional attempts (beyond those of the
machine-independent portions of the compiler) to optimize tail-recursive
calls into branches. You may not want to do this because the detection of
cases where this is not valid is not totally complete. The default is
@option{-mno-tail-call}.
@item -mcomplex-addr
@itemx -mno-complex-addr
@opindex mcomplex-addr
@opindex mno-complex-addr
Assume (or do not assume) that the use of a complex addressing mode is a
win on this implementation of the i960. Complex addressing modes may not
be worthwhile on the K-series, but they definitely are on the C-series.
The default is currently @option{-mcomplex-addr} for all processors except
the CB and CC@.
@item -mcode-align
@itemx -mno-code-align
@opindex mcode-align
@opindex mno-code-align
Align code to 8-byte boundaries for faster fetching (or don't bother).
Currently turned on by default for C-series implementations only.
@ignore
@item -mclean-linkage
@itemx -mno-clean-linkage
@opindex mclean-linkage
@opindex mno-clean-linkage
These options are not fully implemented.
@end ignore
@item -mic-compat
@itemx -mic2.0-compat
@itemx -mic3.0-compat
@opindex mic-compat
@opindex mic2.0-compat
@opindex mic3.0-compat
Enable compatibility with iC960 v2.0 or v3.0.
@item -masm-compat
@itemx -mintel-asm
@opindex masm-compat
@opindex mintel-asm
Enable compatibility with the iC960 assembler.
@item -mstrict-align
@itemx -mno-strict-align
@opindex mstrict-align
@opindex mno-strict-align
Do not permit (do permit) unaligned accesses.
@item -mold-align
@opindex mold-align
Enable structure-alignment compatibility with Intel's gcc release version
1.3 (based on gcc 1.37). This option implies @option{-mstrict-align}.
@item -mlong-double-64
@opindex mlong-double-64
Implement type @samp{long double} as 64-bit floating point numbers.
Without the option @samp{long double} is implemented by 80-bit
floating point numbers. The only reason we have it because there is
no 128-bit @samp{long double} support in @samp{fp-bit.c} yet. So it
is only useful for people using soft-float targets. Otherwise, we
should recommend against use of it.
@end table
@node DEC Alpha Options
@subsection DEC Alpha Options
@ -10020,50 +9892,6 @@ instruction that triggered the stop bit. This can improve instruction
scheduling, but does not always do so.
@end table
@node D30V Options
@subsection D30V Options
@cindex D30V Options
These @samp{-m} options are defined for D30V implementations:
@table @gcctabopt
@item -mextmem
@opindex mextmem
Link the @samp{.text}, @samp{.data}, @samp{.bss}, @samp{.strings},
@samp{.rodata}, @samp{.rodata1}, @samp{.data1} sections into external
memory, which starts at location @code{0x80000000}.
@item -mextmemory
@opindex mextmemory
Same as the @option{-mextmem} switch.
@item -monchip
@opindex monchip
Link the @samp{.text} section into onchip text memory, which starts at
location @code{0x0}. Also link @samp{.data}, @samp{.bss},
@samp{.strings}, @samp{.rodata}, @samp{.rodata1}, @samp{.data1} sections
into onchip data memory, which starts at location @code{0x20000000}.
@item -mno-asm-optimize
@itemx -masm-optimize
@opindex mno-asm-optimize
@opindex masm-optimize
Disable (enable) passing @option{-O} to the assembler when optimizing.
The assembler uses the @option{-O} option to automatically parallelize
adjacent short instructions where possible.
@item -mbranch-cost=@var{n}
@opindex mbranch-cost
Increase the internal costs of branches to @var{n}. Higher costs means
that the compiler will issue more instructions to avoid doing a branch.
The default is 2.
@item -mcond-exec=@var{n}
@opindex mcond-exec
Specify the maximum number of conditionally executed instructions that
replace a branch. The default is 4.
@end table
@node S/390 and zSeries Options
@subsection S/390 and zSeries Options
@cindex S/390 and zSeries Options

View file

@ -1612,36 +1612,6 @@ Constant in range @minus{}2147483648 to 2147483647 or symbolic reference known t
Standard 80387 floating point constant
@end table
@item Intel 960---@file{i960.h}
@table @code
@item f
Floating point register (@code{fp0} to @code{fp3})
@item l
Local register (@code{r0} to @code{r15})
@item b
Global register (@code{g0} to @code{g15})
@item d
Any local or global register
@item I
Integers from 0 to 31
@item J
0
@item K
Integers from @minus{}31 to 0
@item G
Floating point 0
@item H
Floating point 1
@end table
@item Intel IA-64---@file{ia64.h}
@table @code
@item a

View file

@ -1,3 +1,9 @@
2004-02-04 Kazu Hirata <kazu@cs.umass.edu>
* gcc.dg/20020312-2.c, gcc.dg/builtin-inf-1.c,
gcc.dg/sibcall-3.c, gcc.dg/sibcall-4.c, gcc.dg/cpp/assert4.c:
Remove mentions of obsolete ports.
2004-02-04 Paolo Bonzini <bonzini@gnu.org>
* gcc.dg/noncompile/20001228-1.c: Fix for new

View file

@ -18,22 +18,14 @@
/* No pic register. */
#elif defined(__cris__)
# define PIC_REG "0"
#elif defined(__D30V__)
/* No pic register. */
#elif defined(__dsp1600__)
/* No pic register. */
#elif defined(__fr30__)
/* No pic register. */
#elif defined(__H8300__) || defined(__H8300H__) || defined(__H8300S__)
/* No pic register. */
#elif defined(_IBMR2)
/* No pic register. */
#elif #cpu(i370)
/* No pic register. */
#elif defined(__i386__)
# define PIC_REG "ebx"
#elif defined(__i960__)
/* No pic register. */
#elif defined(__ia64__)
/* PIC register is r1, but is used even without -fpic. */
#elif defined(__M32R__)

View file

@ -8,6 +8,6 @@ float fh = __builtin_huge_valf();
double dh = __builtin_huge_val();
long double lh = __builtin_huge_vall();
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* i370-*-* c4x-*-* } 3 } */
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* i370-*-* c4x-*-* } 4 } */
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* i370-*-* c4x-*-* } 5 } */
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* c4x-*-* } 3 } */
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* c4x-*-* } 4 } */
/* { dg-warning "does not support infinity" "INF unsupported" { target vax-*-* c4x-*-* } 5 } */

View file

@ -192,14 +192,6 @@
# error
#endif
#if defined __d30v__
# if !#cpu(d30v) || !#machine(d30v)
# error
# endif
#elif #cpu(d30v) || #machine(d30v)
# error
#endif
#if defined __fr30__
# if !#cpu(fr30) || !#machine(fr30)
# error
@ -270,14 +262,6 @@
# error
#endif
#if defined __i960__
# if !#cpu(i960) || !#machine(i960)
# error
# endif
#elif #cpu(i960) || #machine(i960)
# error
#endif
#if defined __ia64__
# if !#cpu(ia64) || !#machine(ia64)
# error

View file

@ -5,7 +5,7 @@
Copyright (C) 2002 Free Software Foundation Inc.
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
/* { dg-do run { xfail arc-*-* avr-*-* c4x-*-* cris-*-* h8300-*-* i370-*-* i960-*-* ip2k-*-* m32r-*-* m68hc1?-*-* m681?-*-* m680*-*-* m68k-*-* mcore-*-* mips*-*-* mn10300-*-* ns32k-*-* s390*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
/* { dg-do run { xfail arc-*-* avr-*-* c4x-*-* cris-*-* h8300-*-* ip2k-*-* m32r-*-* m68hc1?-*-* m681?-*-* m680*-*-* m68k-*-* mcore-*-* mips*-*-* mn10300-*-* ns32k-*-* s390*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
/* { dg-options "-O2 -foptimize-sibling-calls" } */
/* The option -foptimize-sibling-calls is the default, but serves as

View file

@ -5,7 +5,7 @@
Copyright (C) 2002 Free Software Foundation Inc.
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
/* { dg-do run { xfail arc-*-* avr-*-* c4x-*-* cris-*-* h8300-*-* i370-*-* i960-*-* ip2k-*-* m32r-*-* m68hc1?-*-* m681?-*-* m680*-*-* m68k-*-* mcore-*-* mips*-*-* mn10300-*-* ns32k-*-* s390*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
/* { dg-do run { xfail arc-*-* avr-*-* c4x-*-* cris-*-* h8300-*-* ip2k-*-* m32r-*-* m68hc1?-*-* m681?-*-* m680*-*-* m68k-*-* mcore-*-* mips*-*-* mn10300-*-* ns32k-*-* s390*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
/* { dg-options "-O2 -foptimize-sibling-calls" } */
/* The option -foptimize-sibling-calls is the default, but serves as