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re PR target/83402 (PPC64 implementation of ./rs6000/emmintrin.h gives out of range for _mm_slli_epi32)

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gcc/ChangeLog:

2018-04-20  Carl Love  <cel@us.ibm.com>

        PR target/83402
        * config/rs6000/rs6000-c.c (rs6000_gimple_fold_builtin): Add
        size check for arg0.

From-SVN: r259524
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Carl Love 2018-04-20 15:18:24 +00:00 • committed by Carl Love
parent e91eba31fd
commit a3b82e156d
2 changed files with 21 additions and 2 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2018-04-20 Carl Love <cel@us.ibm.com>
PR target/83402
* config/rs6000/rs6000-c.c (rs6000_gimple_fold_builtin): Add
size check for arg0.
2018-04-20 Nathan Sidwell <nathan@codesourcery.com>
Tom de Vries <tom@codesourcery.com>

17
gcc/config/rs6000/rs6000.c
View file

@ -16594,10 +16594,23 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
case ALTIVEC_BUILTIN_VSPLTISH:
case ALTIVEC_BUILTIN_VSPLTISW:
{
int size;
if (fn_code == ALTIVEC_BUILTIN_VSPLTISB)
size = 8;
else if (fn_code == ALTIVEC_BUILTIN_VSPLTISH)
size = 16;
else
size = 32;
arg0 = gimple_call_arg (stmt, 0);
lhs = gimple_call_lhs (stmt);
/* Only fold the vec_splat_*() if arg0 is constant. */
if (TREE_CODE (arg0) != INTEGER_CST)
/* Only fold the vec_splat_*() if the lower bits of arg 0 is a
5-bit signed constant in range -16 to +15. */
if (TREE_CODE (arg0) != INTEGER_CST
|| !IN_RANGE (sext_hwi(TREE_INT_CST_LOW (arg0), size),
-16, 15))
return false;
gimple_seq stmts = NULL;
location_t loc = gimple_location (stmt);