x86: Disable -mforce-indirect-call for PIC in 32-bit mode
-mforce-indirect-call generates invalid instruction in 32-bit MI thunk since there are no available scratch registers in 32-bit PIC mode. Disable -mforce-indirect-call for PIC in 32-bit mode when generating MI thunk. gcc/ PR target/105980 * config/i386/i386.cc (x86_output_mi_thunk): Disable -mforce-indirect-call for PIC in 32-bit mode. gcc/testsuite/ PR target/105980 * g++.target/i386/pr105980.C: New test.
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2 changed files with 14 additions and 0 deletions
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@ -21480,6 +21480,7 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta,
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rtx this_reg, tmp, fnaddr;
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unsigned int tmp_regno;
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rtx_insn *insn;
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int saved_flag_force_indirect_call = flag_force_indirect_call;
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if (TARGET_64BIT)
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tmp_regno = R10_REG;
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@ -21492,6 +21493,9 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta,
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tmp_regno = DX_REG;
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else
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tmp_regno = CX_REG;
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if (flag_pic)
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flag_force_indirect_call = 0;
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}
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emit_note (NOTE_INSN_PROLOGUE_END);
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@ -21659,6 +21663,8 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta,
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final (insn, file, 1);
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final_end_function ();
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assemble_end_function (thunk_fndecl, fnname);
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flag_force_indirect_call = saved_flag_force_indirect_call;
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}
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static void
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8
gcc/testsuite/g++.target/i386/pr105980.C
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8
gcc/testsuite/g++.target/i386/pr105980.C
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@ -0,0 +1,8 @@
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// { dg-do assemble { target { fpic } } }
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// { dg-options "-O0 -fpic -mforce-indirect-call" }
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struct A {
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virtual ~A();
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};
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struct B : virtual A {};
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void bar() { B(); }
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