constraints.md ("Y2"): Replaced by ...
2007-06-05 H.J. Lu <hongjiu.lu@intel.com> * config/i386/constraints.md ("Y2"): Replaced by ... ("Yt"): This. * config/i386/i386.md: Likewise. * config/i386/mmx.md: Likewise. * config/i386/sse.md: Likewise. From-SVN: r125333
This commit is contained in:
parent
c3b9a8d688
commit
a176d60f9d
5 changed files with 49 additions and 41 deletions
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@ -1,3 +1,11 @@
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2007-06-05 H.J. Lu <hongjiu.lu@intel.com>
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* config/i386/constraints.md ("Y2"): Replaced by ...
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("Yt"): This.
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* config/i386/i386.md: Likewise.
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* config/i386/mmx.md: Likewise.
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* config/i386/sse.md: Likewise.
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2007-06-05 H.J. Lu <hongjiu.lu@intel.com>
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* config/i386/constraints.md ("z"): Replaced by ...
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@ -85,14 +85,14 @@
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;; We use the Y prefix to denote any number of conditional register sets:
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;; 0 First SSE register.
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;; 2 SSE2 enabled
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;; t SSE2 enabled
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;; i SSE2 inter-unit moves enabled
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;; m MMX inter-unit moves enabled
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(define_register_constraint "Y0" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS"
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"First SSE register (@code{%xmm0}).")
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(define_register_constraint "Y2" "TARGET_SSE2 ? SSE_REGS : NO_REGS"
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(define_register_constraint "Yt" "TARGET_SSE2 ? SSE_REGS : NO_REGS"
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"@internal Any SSE register, when SSE2 is enabled.")
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(define_register_constraint "Yi"
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@ -1987,9 +1987,9 @@
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(define_insn "*movdi_2"
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[(set (match_operand:DI 0 "nonimmediate_operand"
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"=r ,o ,*y,m*y,*y,*Y2,m ,*Y2,*Y2,*x,m ,*x,*x")
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"=r ,o ,*y,m*y,*y,*Yt,m ,*Yt,*Yt,*x,m ,*x,*x")
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(match_operand:DI 1 "general_operand"
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"riFo,riF,C ,*y ,m ,C ,*Y2,*Y2,m ,C ,*x,*x,m "))]
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"riFo,riF,C ,*y ,m ,C ,*Yt,*Yt,m ,C ,*x,*x,m "))]
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"!TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
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"@
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#
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@ -2460,7 +2460,7 @@
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(define_insn "*pushdf_nointeger"
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[(set (match_operand:DF 0 "push_operand" "=<,<,<,<")
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(match_operand:DF 1 "general_no_elim_operand" "f,Fo,*r,Y2"))]
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(match_operand:DF 1 "general_no_elim_operand" "f,Fo,*r,Yt"))]
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"!TARGET_64BIT && !TARGET_INTEGER_DFMODE_MOVES"
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{
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/* This insn should be already split before reg-stack. */
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@ -2472,7 +2472,7 @@
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(define_insn "*pushdf_integer"
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[(set (match_operand:DF 0 "push_operand" "=<,<,<")
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(match_operand:DF 1 "general_no_elim_operand" "f,rFo,Y2"))]
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(match_operand:DF 1 "general_no_elim_operand" "f,rFo,Yt"))]
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"TARGET_64BIT || TARGET_INTEGER_DFMODE_MOVES"
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{
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/* This insn should be already split before reg-stack. */
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@ -2512,9 +2512,9 @@
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(define_insn "*movdf_nointeger"
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[(set (match_operand:DF 0 "nonimmediate_operand"
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"=f,m,f,*r ,o ,Y2*x,Y2*x,Y2*x ,m ")
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"=f,m,f,*r ,o ,Yt*x,Yt*x,Yt*x ,m ")
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(match_operand:DF 1 "general_operand"
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"fm,f,G,*roF,F*r,C ,Y2*x,mY2*x,Y2*x"))]
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"fm,f,G,*roF,F*r,C ,Yt*x,mYt*x,Yt*x"))]
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"!(MEM_P (operands[0]) && MEM_P (operands[1]))
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&& ((optimize_size || !TARGET_INTEGER_DFMODE_MOVES) && !TARGET_64BIT)
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&& (reload_in_progress || reload_completed
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@ -2629,9 +2629,9 @@
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(define_insn "*movdf_integer_rex64"
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[(set (match_operand:DF 0 "nonimmediate_operand"
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"=f,m,f,r ,m ,Y2*x,Y2*x,Y2*x,m ,Yi,r ")
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"=f,m,f,r ,m ,Yt*x,Yt*x,Yt*x,m ,Yi,r ")
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(match_operand:DF 1 "general_operand"
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"fm,f,G,rmF,Fr,C ,Y2*x,m ,Y2*x,r ,Yi"))]
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"fm,f,G,rmF,Fr,C ,Yt*x,m ,Yt*x,r ,Yi"))]
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"TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))
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&& (reload_in_progress || reload_completed
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|| (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
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@ -2750,9 +2750,9 @@
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(define_insn "*movdf_integer"
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[(set (match_operand:DF 0 "nonimmediate_operand"
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"=f,m,f,r ,o ,Y2*x,Y2*x,Y2*x,m ")
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"=f,m,f,r ,o ,Yt*x,Yt*x,Yt*x,m ")
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(match_operand:DF 1 "general_operand"
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"fm,f,G,roF,Fr,C ,Y2*x,m ,Y2*x"))]
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"fm,f,G,roF,Fr,C ,Yt*x,m ,Yt*x"))]
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"!(MEM_P (operands[0]) && MEM_P (operands[1]))
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&& !optimize_size && TARGET_INTEGER_DFMODE_MOVES
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&& (reload_in_progress || reload_completed
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@ -3386,7 +3386,7 @@
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})
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(define_insn "zero_extendsidi2_32"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?o,?*Ym,?*y,?*Yi,*Y2")
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?o,?*Ym,?*y,?*Yi,*Yt")
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(zero_extend:DI
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(match_operand:SI 1 "nonimmediate_operand" "0,rm,r ,r ,m ,r ,m")))
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(clobber (reg:CC FLAGS_REG))]
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@ -3403,7 +3403,7 @@
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(set_attr "type" "multi,multi,multi,mmxmov,mmxmov,ssemov,ssemov")])
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(define_insn "zero_extendsidi2_rex64"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*Ym,?*y,?*Yi,*Y2")
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*Ym,?*y,?*Yi,*Yt")
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(zero_extend:DI
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(match_operand:SI 1 "nonimmediate_operand" "rm,0,r ,m ,r ,m")))]
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"TARGET_64BIT"
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(set_attr "mode" "SF")])
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(define_insn "*truncdfsf_mixed"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=m,?fx*r,Y2")
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[(set (match_operand:SF 0 "nonimmediate_operand" "=m,?fx*r,Yt")
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(float_truncate:SF
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(match_operand:DF 1 "nonimmediate_operand" "f ,f ,Y2m")))
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(match_operand:DF 1 "nonimmediate_operand" "f ,f ,Ytm")))
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(clobber (match_operand:SF 2 "memory_operand" "=X,m ,X"))]
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"TARGET_MIX_SSE_I387"
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{
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(set_attr "mode" "SF")])
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(define_insn "*truncxfdf2_mixed"
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[(set (match_operand:DF 0 "nonimmediate_operand" "=m,?fY2*r")
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[(set (match_operand:DF 0 "nonimmediate_operand" "=m,?fYt*r")
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(float_truncate:DF
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(match_operand:XF 1 "register_operand" "f,f")))
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(clobber (match_operand:DF 2 "memory_operand" "=X,m"))]
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@ -4237,7 +4237,7 @@
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;; Avoid vector decoded forms of the instruction.
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(define_peephole2
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[(match_scratch:DF 2 "Y2")
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[(match_scratch:DF 2 "Yt")
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(set (match_operand:SSEMODEI24 0 "register_operand" "")
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(fix:SSEMODEI24 (match_operand:DF 1 "memory_operand" "")))]
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"TARGET_AVOID_VECTOR_DECODE && !optimize_size"
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@ -64,9 +64,9 @@
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(define_insn "*mov<mode>_internal_rex64"
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[(set (match_operand:MMXMODEI 0 "nonimmediate_operand"
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"=rm,r,*y,*y ,m ,*y,Y2,x,x ,m,r,x")
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"=rm,r,*y,*y ,m ,*y,Yt,x,x ,m,r,x")
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(match_operand:MMXMODEI 1 "vector_move_operand"
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"Cr ,m,C ,*ym,*y,Y2,*y,C,xm,x,x,r"))]
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"Cr ,m,C ,*ym,*y,Yt,*y,C,xm,x,x,r"))]
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"TARGET_64BIT && TARGET_MMX
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&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
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"@
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@ -88,9 +88,9 @@
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(define_insn "*mov<mode>_internal"
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[(set (match_operand:MMXMODEI 0 "nonimmediate_operand"
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"=*y,*y ,m ,*y ,*Y2,*Y2,*Y2 ,m ,*x,*x,*x,m ,?r ,?m")
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"=*y,*y ,m ,*y ,*Yt,*Yt,*Yt ,m ,*x,*x,*x,m ,?r ,?m")
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(match_operand:MMXMODEI 1 "vector_move_operand"
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"C ,*ym,*y,*Y2,*y ,C ,*Y2m,*Y2,C ,*x,m ,*x,irm,r"))]
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"C ,*ym,*y,*Yt,*y ,C ,*Ytm,*Yt,C ,*x,m ,*x,irm,r"))]
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"TARGET_MMX
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&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
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"@
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@ -123,9 +123,9 @@
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(define_insn "*movv2sf_internal_rex64"
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[(set (match_operand:V2SF 0 "nonimmediate_operand"
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"=rm,r,*y ,*y ,m ,*y,Y2,x,x,x,m,r,x")
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"=rm,r,*y ,*y ,m ,*y,Yt,x,x,x,m,r,x")
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(match_operand:V2SF 1 "vector_move_operand"
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"Cr ,m ,C ,*ym,*y,Y2,*y,C,x,m,x,x,r"))]
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"Cr ,m ,C ,*ym,*y,Yt,*y,C,x,m,x,x,r"))]
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"TARGET_64BIT && TARGET_MMX
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&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
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"@
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@ -148,9 +148,9 @@
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(define_insn "*movv2sf_internal"
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[(set (match_operand:V2SF 0 "nonimmediate_operand"
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"=*y,*y ,m,*y ,*Y2,*x,*x,*x,m ,?r ,?m")
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"=*y,*y ,m,*y ,*Yt,*x,*x,*x,m ,?r ,?m")
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(match_operand:V2SF 1 "vector_move_operand"
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"C ,*ym,*y,*Y2,*y ,C ,*x,m ,*x,irm,r"))]
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"C ,*ym,*y,*Yt,*y ,C ,*x,m ,*x,irm,r"))]
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"TARGET_MMX
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&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
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"@
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@ -1172,9 +1172,9 @@
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})
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(define_insn "*vec_extractv2si_1"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=y,Y2,Y2,x,frxy")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=y,Yt,Yt,x,frxy")
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(vec_select:SI
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(match_operand:V2SI 1 "nonimmediate_operand" " 0,0 ,Y2,0,o")
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(match_operand:V2SI 1 "nonimmediate_operand" " 0,0 ,Yt,0,o")
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(parallel [(const_int 1)])))]
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"TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
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"@
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@ -1364,7 +1364,7 @@
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})
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(define_insn "vec_setv4sf_0"
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[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,Y2,m")
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[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,Yt,m")
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(vec_merge:V4SF
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(vec_duplicate:V4SF
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(match_operand:SF 2 "general_operand" " x,m,*r,x*rfF"))
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(set_attr "mode" "DF")])
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(define_insn "*vec_concatv2df"
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[(set (match_operand:V2DF 0 "register_operand" "=Y2,Y2,Y2,x,x")
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[(set (match_operand:V2DF 0 "register_operand" "=Yt,Yt,Yt,x,x")
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(vec_concat:V2DF
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(match_operand:DF 1 "nonimmediate_operand" " 0 ,0 ,m ,0,0")
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(match_operand:DF 2 "vector_move_operand" " Y2,m ,C ,x,m")))]
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(match_operand:DF 2 "vector_move_operand" " Yt,m ,C ,x,m")))]
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"TARGET_SSE"
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"@
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unpcklpd\t{%2, %0|%0, %2}
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"operands[2] = CONST0_RTX (V4SImode);")
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(define_insn "sse2_loadld"
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[(set (match_operand:V4SI 0 "register_operand" "=Y2,Yi,x,x")
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[(set (match_operand:V4SI 0 "register_operand" "=Yt,Yi,x,x")
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(vec_merge:V4SI
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(vec_duplicate:V4SI
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(match_operand:SI 2 "nonimmediate_operand" "m ,r ,m,x"))
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(set_attr "mode" "V2SF,V4SF,V2SF")])
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(define_insn "*vec_dupv4si"
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[(set (match_operand:V4SI 0 "register_operand" "=Y2,x")
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[(set (match_operand:V4SI 0 "register_operand" "=Yt,x")
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(vec_duplicate:V4SI
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(match_operand:SI 1 "register_operand" " Y2,0")))]
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(match_operand:SI 1 "register_operand" " Yt,0")))]
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"TARGET_SSE"
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"@
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pshufd\t{$0, %1, %0|%0, %1, 0}
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(set_attr "mode" "TI,V4SF")])
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(define_insn "*vec_dupv2di"
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[(set (match_operand:V2DI 0 "register_operand" "=Y2,x")
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[(set (match_operand:V2DI 0 "register_operand" "=Yt,x")
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(vec_duplicate:V2DI
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(match_operand:DI 1 "register_operand" " 0 ,0")))]
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"TARGET_SSE"
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;; nonimmediate_operand for operand 2 and *not* allowing memory for the SSE
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;; alternatives pretty much forces the MMX alternative to be chosen.
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(define_insn "*sse2_concatv2si"
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[(set (match_operand:V2SI 0 "register_operand" "=Y2, Y2,*y,*y")
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[(set (match_operand:V2SI 0 "register_operand" "=Yt, Yt,*y,*y")
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(vec_concat:V2SI
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(match_operand:SI 1 "nonimmediate_operand" " 0 ,rm , 0,rm")
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(match_operand:SI 2 "reg_or_0_operand" " Y2,C ,*y, C")))]
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(match_operand:SI 2 "reg_or_0_operand" " Yt,C ,*y, C")))]
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"TARGET_SSE2"
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"@
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punpckldq\t{%2, %0|%0, %2}
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(set_attr "mode" "V4SF,V4SF,DI,DI")])
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(define_insn "*vec_concatv4si_1"
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[(set (match_operand:V4SI 0 "register_operand" "=Y2,x,x")
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[(set (match_operand:V4SI 0 "register_operand" "=Yt,x,x")
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(vec_concat:V4SI
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(match_operand:V2SI 1 "register_operand" " 0 ,0,0")
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(match_operand:V2SI 2 "nonimmediate_operand" " Y2,x,m")))]
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(match_operand:V2SI 2 "nonimmediate_operand" " Yt,x,m")))]
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"TARGET_SSE"
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"@
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punpcklqdq\t{%2, %0|%0, %2}
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(set_attr "mode" "TI,V4SF,V2SF")])
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(define_insn "vec_concatv2di"
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[(set (match_operand:V2DI 0 "register_operand" "=Y2,?Y2,Y2,x,x,x")
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[(set (match_operand:V2DI 0 "register_operand" "=Yt,?Yt,Yt,x,x,x")
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(vec_concat:V2DI
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(match_operand:DI 1 "nonimmediate_operand" " m,*y ,0 ,0,0,m")
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(match_operand:DI 2 "vector_move_operand" " C, C,Y2,x,m,0")))]
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(match_operand:DI 2 "vector_move_operand" " C, C,Yt,x,m,0")))]
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"TARGET_SSE"
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"@
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movq\t{%1, %0|%0, %1}
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