RISC-V: Fix vector cfi notes for stack-clash protection
The stack-clash code is generating wrong cfi directives in riscv_v_adjust_scalable_frame because REG_CFA_DEF_CFA has a different encoding than REG_FRAME_RELATED_EXPR, this patch fixes the offset sign in prologue and starts using REG_CFA_DEF_CFA in the epilogue. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_v_adjust_scalable_frame): Add epilogue code for stack-clash and fix prologue cfi note. gcc/testsuite/ChangeLog: * gcc.target/riscv/stack-check-cfa-3.c: Fix the expected output.
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2 changed files with 18 additions and 3 deletions
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@ -7974,8 +7974,22 @@ riscv_v_adjust_scalable_frame (rtx target, poly_int64 offset, bool epilogue)
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/* If doing stack clash protection then we use a loop to allocate and probe
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the stack. */
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if (flag_stack_clash_protection && !epilogue)
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if (flag_stack_clash_protection)
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{
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if (epilogue)
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{
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insn = emit_insn (gen_add3_insn (target, target, adjust_size));
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if (!frame_pointer_needed)
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{
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add_reg_note (insn, REG_CFA_DEF_CFA,
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plus_constant (Pmode, stack_pointer_rtx, -offset));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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return;
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}
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HOST_WIDE_INT min_probe_threshold
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= (1 << param_stack_clash_protection_guard_size) - STACK_CLASH_CALLER_GUARD;
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@ -8008,7 +8022,7 @@ riscv_v_adjust_scalable_frame (rtx target, poly_int64 offset, bool epilogue)
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if (!frame_pointer_needed)
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{
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add_reg_note (insn, REG_CFA_DEF_CFA,
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plus_constant (Pmode, stack_pointer_rtx, -offset));
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plus_constant (Pmode, stack_pointer_rtx, offset));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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@ -10,4 +10,5 @@
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/* { dg-final { scan-assembler-times {mv\tt3,sp} 1 } } */
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/* { dg-final { scan-assembler-times {\.cfi_def_cfa [0-9]+, 0} 1 } } */
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/* { dg-final { scan-assembler-times {\.cfi_escape 0xf,0xa,0x72,0,0x92,0xa2,0x38,0,0x9,0xec,0x1e,0x22} 1 } } */
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/* { dg-final { scan-assembler-times {\.cfi_escape 0xf,0x9,0x72,0,0x92,0xa2,0x38,0,0x3a,0x1e,0x22} 1 } } */
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/* { dg-final { scan-assembler-times {\.cfi_escape 0xf,0xa,0x72,0,0x92,0xa2,0x38,0,0x9,0xf6,0x1e,0x22} 1 } } */
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