RISC-V: Include local riscv_vector.h in testsuite

That could prevent us including stdint.h from glibc, and that will cause
problem when the corresponding multilib isn't built.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c: Include local
	riscv_vector.h.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2.c: Ditto.
	* gcc.target/riscv/rvv/base/bug-10-2.c: Ditto.
	* gcc.target/riscv/rvv/base/bug-10.c: Ditto.
	* gcc.target/riscv/rvv/base/bug-7.c: Ditto.
	* gcc.target/riscv/rvv/base/bug-8.c: Ditto.
	* gcc.target/riscv/rvv/base/bug-9.c: Ditto.
	* gcc.target/riscv/rvv/base/pr110943.c: Ditto.
	* gcc.target/riscv/rvv/base/pr112431-21.c: Ditto.
	* gcc.target/riscv/rvv/base/pr114639-1.c: Ditto.
	* gcc.target/riscv/rvv/base/pr115068.c: Ditto.
	* gcc.target/riscv/rvv/base/pr117286.c: Ditto.
	* gcc.target/riscv/rvv/base/pr117544.c: Ditto.
	* gcc.target/riscv/rvv/base/pr117955.c: Ditto.
	* gcc.target/riscv/rvv/base/pr118872.c: Ditto.
	* gcc.target/riscv/rvv/base/vlmul_ext-1.c: Ditto.
	* gcc.target/riscv/rvv/base/vssubu-1.c: Ditto.
	* gcc.target/riscv/rvv/base/vssubu-2.c: Ditto.
	* gcc.target/riscv/rvv/base/vwaddsub-1.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/pr111234.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/pr115214.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-24.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-3.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-4.c: Ditto.
	* gcc.target/riscv/rvv/xtheadvector/pr116591.c: Ditto.
	* gcc.target/riscv/rvv/xtheadvector/pr116592.c: Ditto.
	* gcc.target/riscv/rvv/xtheadvector/pr118357.c: Ditto.
	* gcc.target/riscv/rvv/xtheadvector/vsext.c: Ditto.
	* gcc.target/riscv/rvv/xtheadvector/vzext.c: Ditto.

gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c

@@ -2,7 +2,7 @@
 /* { dg-options "-O1 -march=rv64gczve32x -mabi=lp64d -mrvv-vector-bits=zvl" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 void bar (int8_t *data);
 

gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c

@@ -2,7 +2,7 @@
 /* { dg-options "-O1 -march=rv64gcv_zvl4096b -mabi=lp64d -mrvv-vector-bits=zvl" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 void bar (int8_t *data);
 

gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c

@@ -2,7 +2,7 @@
 /* { dg-options "-O1 -march=rv64gcv_zfh -mabi=lp64d -msave-restore" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 void bar (int8_t *data);
 

gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c

@@ -2,7 +2,7 @@
 /* { dg-options "-O1 -march=rv64gv_zfh_zca_zcmp -mabi=lp64d -fno-shrink-wrap-separate" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 void bar (int8_t *data);
 

gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1.c

@@ -2,7 +2,7 @@
 /* { dg-options "-O1 -march=rv64gcv_zfh -mabi=lp64d" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 void bar (int8_t *data);
 

gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c

@@ -2,7 +2,7 @@
 /* { dg-options "-O1 -march=rv64gcv_zfh -mabi=lp64d -msave-restore" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 void bar1 (vint8m1_t a);
 void bar2 ();

gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c

@@ -2,7 +2,7 @@
 /* { dg-options "-O1 -march=rv64gv_zfh_zca_zcmp -mabi=lp64d -fno-shrink-wrap-separate" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 void bar1 (vint8m1_t a);
 void bar2 ();

gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c

@@ -2,7 +2,7 @@
 /* { dg-options "-O1 -march=rv64gcv_zfh -mabi=lp64d" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 void bar1 (vint8m1_t a);
 void bar2 ();

gcc/testsuite/gcc.target/riscv/rvv/base/bug-10-2.c

@@ -4,7 +4,7 @@
 /* { dg-require-effective-target riscv_zvfh_ok } */
 /* { dg-options " -march=rv64gcv_zvfh -mabi=lp64d -O2" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 int8_t a[1];
 uint16_t b[1];

gcc/testsuite/gcc.target/riscv/rvv/base/bug-10.c

@@ -4,7 +4,7 @@
 /* { dg-require-effective-target riscv_zvfh_ok } */
 /* { dg-options " -march=rv64gcv_zvfh -mabi=lp64d -O2 --param=vsetvl-strategy=optim -fno-schedule-insns  -fno-schedule-insns2 -fno-schedule-fusion " } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 void
 __attribute__ ((noipa))

gcc/testsuite/gcc.target/riscv/rvv/base/bug-7.c

@@ -3,7 +3,7 @@
 /* { dg-options "-march=rv64gcv -mabi=lp64d -O2"  { target { rv64 } } } */
 /* { dg-options "-march=rv32gcv -mabi=ilp32d -O2"  { target { rv32 } } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 vint64m1_t f1 (vint64m1_t vd, vint64m1_t vs2, size_t vl)
 {

gcc/testsuite/gcc.target/riscv/rvv/base/bug-8.c

@@ -3,7 +3,7 @@
 /* { dg-options "-march=rv64gcv -mabi=lp64d -O0"  { target { rv64 } } } */
 /* { dg-options "-march=rv32gcv -mabi=ilp32d -O0"  { target { rv32 } } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 vint64m1_t f1 (vint64m1_t vd, vint64m1_t vs2, size_t vl)
 {

gcc/testsuite/gcc.target/riscv/rvv/base/bug-9.c

@@ -3,7 +3,7 @@
 /* { dg-options "-march=rv64gcv -mabi=lp64d -O2"  { target { rv64 } } } */
 /* { dg-options "-march=rv32gcv -mabi=ilp32d -O2"  { target { rv32 } } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 vfloat16m1_t f0 (vfloat16m1_t vs2, vfloat16m1_t vs1, size_t vl)
 {

gcc/testsuite/gcc.target/riscv/rvv/base/pr110943.c

@@ -2,7 +2,7 @@
 /* { dg-options "-O3 -march=rv64gcv -mabi=lp64d" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 /*
 ** foo9:

gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-21.c

@@ -1,7 +1,7 @@
 /* { dg-do run { target { riscv_v } } } */
 /* { dg-additional-options "-O3 -ansi -pedantic-errors -std=gnu99" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 size_t __attribute__ ((noinline))
 sumation (size_t sum0, size_t sum1, size_t sum2, size_t sum3, size_t sum4,

gcc/testsuite/gcc.target/riscv/rvv/base/pr114639-1.c

@@ -2,7 +2,7 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 extern size_t get_vl ();
 

gcc/testsuite/gcc.target/riscv/rvv/base/pr115068.c

@@ -3,7 +3,7 @@
 /* { dg-additional-options "-std=gnu99" } */
 
 #include <stdint.h>
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 vfloat64m8_t
 test_vfwadd_wf_f64m8_m (vbool8_t vm, vfloat64m8_t vs2, float rs1, size_t vl)

gcc/testsuite/gcc.target/riscv/rvv/base/pr117286.c

@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -O1" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 _Float16 a[10];
 void func(){
   int placeholder0 = 10;

gcc/testsuite/gcc.target/riscv/rvv/base/pr117544.c

@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 void bar() __attribute__((riscv_vector_cc));
 
 vint32m1_t foo(vint32m1_t a, vint32m1_t b) {

gcc/testsuite/gcc.target/riscv/rvv/base/pr117955.c

@@ -1,7 +1,7 @@
 /* { dg-do compile { target { rv64 } } } */
 /* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -O3" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 _Float16 a (uint64_t);
 int8_t b () {

gcc/testsuite/gcc.target/riscv/rvv/base/pr118872.c

@@ -3,7 +3,7 @@
 /* { dg-options "-march=rv64gcv -mabi=lp64d -O2"  { target { rv64 } } } */
 /* { dg-options "-march=rv32gcv -mabi=ilp32d -O2"  { target { rv32 } } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 vfloat32m2_t foo (vfloat16m1_t a, size_t vl)
 {

gcc/testsuite/gcc.target/riscv/rvv/base/vlmul_ext-1.c

@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 vint16m8_t test_vlmul_ext_v_i16mf4_i16m8(vint16mf4_t op1) {
   return __riscv_vlmul_ext_v_i16mf4_i16m8(op1);

gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-1.c

@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -march=rv64gcv -mabi=lp64d" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 vuint64m1_t test_vssubu_vx_u64m1(vuint64m1_t op1)
 {

gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-2.c

@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -march=rv32gcv -mabi=ilp32d" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 vuint64m1_t test_vssubu_vx_u64m1(vuint64m1_t op1)
 {

gcc/testsuite/gcc.target/riscv/rvv/base/vwaddsub-1.c

@@ -3,7 +3,7 @@
 /* { dg-additional-options "-std=gnu99 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include <stdint.h>
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 /*
 ** vwadd_wx_i64m8_m:

gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c

@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv -mabi=lp64d -O3" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 void
 f (vint32m1_t *in, vint64m2_t *out, vbool32_t *m, int b)

gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr115214.c

@@ -2,7 +2,7 @@
 /* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv -mabi=lp64d -O3 -w -std=gnu17" } */
 /* { dg-skip-if "" { *-*-* } { "-flto" } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 static inline __attribute__(()) int vaddq_f32();
 static inline __attribute__(()) int vload_tillz_f32(int nlane) {

gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c

@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv -mabi=lp64d" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 size_t foo ()
 {

gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-3.c

@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv32gcv -mabi=ilp32d -O2 -fdump-rtl-vsetvl-details" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 uint64_t a[2], b[2];
 

gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-4.c

@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv64gcv -mabi=lp64d -O2 -fno-schedule-insns -fdump-rtl-vsetvl-details" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 vuint16m1_t
 foo (vuint16m1_t a, vuint16m1_t b, size_t avl)

gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116591.c

@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gc_xtheadvector -mabi=ilp32d -O2 -save-temps" { target { rv32 } } } */
 /* { dg-options "-march=rv64gc_xtheadvector -mabi=lp64d -O2 -save-temps" { target { rv64 } } } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 void
 foo (float *a, int b)

gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116592.c

@@ -3,7 +3,7 @@
 /* { dg-options "-march=rv64gc_zfh_xtheadvector -mabi=lp64d -O2 -save-temps" { target { rv64 } } } */
 
 #include <math.h>
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 static vfloat32m8_t atan2_ps(vfloat32m8_t a, vfloat32m8_t b, size_t vl)
 {

gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr118357.c

@@ -1,7 +1,7 @@
 /* { dg-do compile { target { rv64 } } } */
 /* { dg-options "-march=rv64gc_xtheadvector -mabi=lp64d -O2" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 vfloat16m4_t foo (float *ptr, size_t vl)
 {

gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vsext.c

@@ -1,7 +1,7 @@
 /* { dg-do compile { target { rv64 } } } */
 /* { dg-options "-march=rv64gc_xtheadvector -mabi=lp64d -O3" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 struct a
 {

gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vzext.c

@@ -1,7 +1,7 @@
 /* { dg-do compile { target { rv64 } } } */
 /* { dg-options "-march=rv64gc_xtheadvector -mabi=lp64d -O3" } */
 
-#include <riscv_vector.h>
+#include "riscv_vector.h"
 
 struct a
 {