optabs.c: Remove unnecessary forward declarations.
* optabs.c: Remove unnecessary forward declarations. (expand_unop_direct): New, broken out of expand_unop. (expand_doubleword_clz): New. (expand_ctz): Move above expand_ffs. Use start_sequence, end_sequence, add_equal_note, and expand_unop_direct. Add more commentary. (expand_ffs): Try both ctz optab and expand_ctz. Generate a test and branch if the hardware doesn't give us a useful value for input zero. Style improvements similar to expand_ctz. * config/arm/arm.md (ffssi2, ctzsi2): Delete. From-SVN: r128054
This commit is contained in:
Zack Weinberg
Zack Weinberg
parent
d46c958bfa
commit
9cce5b20d6
3 changed files with 243 additions and 141 deletions
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@ -1,3 +1,18 @@
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2007-09-03 Zack Weinberg <zack@codesourcery.com>
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* optabs.c: Remove unnecessary forward declarations.
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(expand_unop_direct): New, broken out of expand_unop.
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(expand_doubleword_clz): New.
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(expand_ctz): Move above expand_ffs. Use
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start_sequence, end_sequence, add_equal_note, and
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expand_unop_direct. Add more commentary.
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(expand_ffs): Try both ctz optab and expand_ctz.
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Generate a test and branch if the hardware doesn't give us
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a useful value for input zero. Style improvements similar to
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expand_ctz.
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* config/arm/arm.md (ffssi2, ctzsi2): Delete.
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2007-09-03 Zack Weinberg <zack@codesourcery.com>
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* config.gcc: Delete stanza for arm-semi-aof and
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@ -10747,46 +10747,6 @@
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[(set_attr "predicable" "yes")
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(set_attr "insn" "clz")])
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(define_expand "ffssi2"
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[(set (match_operand:SI 0 "s_register_operand" "")
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(ffs:SI (match_operand:SI 1 "s_register_operand" "")))]
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"TARGET_32BIT && arm_arch5"
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"
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{
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rtx t1, t2, t3;
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t1 = gen_reg_rtx (SImode);
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t2 = gen_reg_rtx (SImode);
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t3 = gen_reg_rtx (SImode);
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emit_insn (gen_negsi2 (t1, operands[1]));
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emit_insn (gen_andsi3 (t2, operands[1], t1));
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emit_insn (gen_clzsi2 (t3, t2));
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emit_insn (gen_subsi3 (operands[0], GEN_INT (32), t3));
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DONE;
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}"
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)
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(define_expand "ctzsi2"
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[(set (match_operand:SI 0 "s_register_operand" "")
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(ctz:SI (match_operand:SI 1 "s_register_operand" "")))]
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"TARGET_32BIT && arm_arch5"
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"
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{
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rtx t1, t2, t3;
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t1 = gen_reg_rtx (SImode);
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t2 = gen_reg_rtx (SImode);
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t3 = gen_reg_rtx (SImode);
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emit_insn (gen_negsi2 (t1, operands[1]));
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emit_insn (gen_andsi3 (t2, operands[1], t1));
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emit_insn (gen_clzsi2 (t3, t2));
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emit_insn (gen_subsi3 (operands[0], GEN_INT (31), t3));
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DONE;
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}"
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)
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;; V5E instructions.
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(define_insn "prefetch"
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329
gcc/optabs.c
329
gcc/optabs.c
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@ -95,37 +95,9 @@ enum insn_code vcondu_gen_code[NUM_MACHINE_MODES];
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the code to be used in the trap insn and all other fields are ignored. */
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static GTY(()) rtx trap_rtx;
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static int add_equal_note (rtx, rtx, enum rtx_code, rtx, rtx);
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static rtx widen_operand (rtx, enum machine_mode, enum machine_mode, int,
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int);
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static void prepare_cmp_insn (rtx *, rtx *, enum rtx_code *, rtx,
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enum machine_mode *, int *,
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enum can_compare_purpose);
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static enum insn_code can_fix_p (enum machine_mode, enum machine_mode, int,
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int *);
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static enum insn_code can_float_p (enum machine_mode, enum machine_mode, int);
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static optab new_optab (void);
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static convert_optab new_convert_optab (void);
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static inline optab init_optab (enum rtx_code);
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static inline optab init_optabv (enum rtx_code);
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static inline convert_optab init_convert_optab (enum rtx_code);
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static void init_libfuncs (optab, int, int, const char *, int);
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static void init_integral_libfuncs (optab, const char *, int);
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static void init_floating_libfuncs (optab, const char *, int);
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static void init_interclass_conv_libfuncs (convert_optab, const char *,
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enum mode_class, enum mode_class);
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static void init_intraclass_conv_libfuncs (convert_optab, const char *,
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enum mode_class, bool);
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static void emit_cmp_and_jump_insn_1 (rtx, rtx, enum machine_mode,
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enum rtx_code, int, rtx);
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static void prepare_float_lib_cmp (rtx *, rtx *, enum rtx_code *,
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enum machine_mode *, int *);
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static rtx widen_clz (enum machine_mode, rtx, rtx);
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static rtx expand_parity (enum machine_mode, rtx, rtx);
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static rtx expand_ffs (enum machine_mode, rtx, rtx);
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static rtx expand_ctz (enum machine_mode, rtx, rtx);
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static enum rtx_code get_rtx_code (enum tree_code, bool);
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static rtx vector_compare_rtx (tree, bool, enum insn_code);
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static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
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/* Current libcall id. It doesn't matter what these are, as long
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as they are unique to each libcall that is emitted. */
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@ -2500,6 +2472,76 @@ widen_clz (enum machine_mode mode, rtx op0, rtx target)
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return 0;
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}
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/* Try calculating clz of a double-word quantity as two clz's of word-sized
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quantities, choosing which based on whether the high word is nonzero. */
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static rtx
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expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
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{
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rtx xop0 = force_reg (mode, op0);
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rtx subhi = gen_highpart (word_mode, xop0);
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rtx sublo = gen_lowpart (word_mode, xop0);
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rtx hi0_label = gen_label_rtx ();
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rtx after_label = gen_label_rtx ();
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rtx seq, temp, result;
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/* If we were not given a target, use a word_mode register, not a
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'mode' register. The result will fit, and nobody is expecting
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anything bigger (the return type of __builtin_clz* is int). */
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if (!target)
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target = gen_reg_rtx (word_mode);
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/* In any case, write to a word_mode scratch in both branches of the
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conditional, so we can ensure there is a single move insn setting
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'target' to tag a REG_EQUAL note on. */
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result = gen_reg_rtx (word_mode);
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start_sequence ();
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/* If the high word is not equal to zero,
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then clz of the full value is clz of the high word. */
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emit_cmp_and_jump_insns (subhi, CONST0_RTX (word_mode), EQ, 0,
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word_mode, true, hi0_label);
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temp = expand_unop_direct (word_mode, clz_optab, subhi, result, true);
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if (!temp)
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goto fail;
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if (temp != result)
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convert_move (result, temp, true);
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emit_jump_insn (gen_jump (after_label));
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emit_barrier ();
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/* Else clz of the full value is clz of the low word plus the number
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of bits in the high word. */
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emit_label (hi0_label);
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temp = expand_unop_direct (word_mode, clz_optab, sublo, 0, true);
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if (!temp)
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goto fail;
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temp = expand_binop (word_mode, add_optab, temp,
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GEN_INT (GET_MODE_BITSIZE (word_mode)),
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result, true, OPTAB_DIRECT);
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if (!temp)
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goto fail;
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if (temp != result)
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convert_move (result, temp, true);
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emit_label (after_label);
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convert_move (target, result, true);
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seq = get_insns ();
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end_sequence ();
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add_equal_note (seq, target, CLZ, xop0, 0);
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emit_insn (seq);
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return target;
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fail:
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end_sequence ();
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return 0;
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}
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/* Try calculating
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(bswap:narrow x)
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as
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@ -2604,65 +2646,130 @@ expand_parity (enum machine_mode mode, rtx op0, rtx target)
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return 0;
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}
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/* Try calculating ffs(x) using clz(x). Since the ffs builtin promises
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to return zero for a zero value and clz may have an undefined value
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in that case, only do this if we know clz returns the right thing so
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that we don't have to generate a test and branch. */
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/* Try calculating ctz(x) as K - clz(x & -x) ,
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where K is GET_MODE_BITSIZE(mode) - 1.
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Both __builtin_ctz and __builtin_clz are undefined at zero, so we
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don't have to worry about what the hardware does in that case. (If
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the clz instruction produces the usual value at 0, which is K, the
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result of this code sequence will be -1; expand_ffs, below, relies
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on this. It might be nice to have it be K instead, for consistency
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with the (very few) processors that provide a ctz with a defined
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value, but that would take one more instruction, and it would be
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less convenient for expand_ffs anyway. */
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static rtx
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expand_ctz (enum machine_mode mode, rtx op0, rtx target)
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{
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rtx seq, temp;
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if (optab_handler (clz_optab, mode)->insn_code == CODE_FOR_nothing)
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return 0;
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start_sequence ();
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temp = expand_unop_direct (mode, neg_optab, op0, NULL_RTX, true);
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if (temp)
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temp = expand_binop (mode, and_optab, op0, temp, NULL_RTX,
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true, OPTAB_DIRECT);
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if (temp)
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temp = expand_unop_direct (mode, clz_optab, temp, NULL_RTX, true);
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if (temp)
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temp = expand_binop (mode, sub_optab, GEN_INT (GET_MODE_BITSIZE (mode) - 1),
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temp, target,
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true, OPTAB_DIRECT);
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if (temp == 0)
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{
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end_sequence ();
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return 0;
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}
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seq = get_insns ();
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end_sequence ();
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add_equal_note (seq, temp, CTZ, op0, 0);
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emit_insn (seq);
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return temp;
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}
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/* Try calculating ffs(x) using ctz(x) if we have that instruction, or
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else with the sequence used by expand_clz.
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The ffs builtin promises to return zero for a zero value and ctz/clz
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may have an undefined value in that case. If they do not give us a
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convenient value, we have to generate a test and branch. */
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static rtx
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expand_ffs (enum machine_mode mode, rtx op0, rtx target)
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{
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HOST_WIDE_INT val;
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if (clz_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing
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&& CLZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2
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&& val == GET_MODE_BITSIZE (mode))
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bool defined_at_zero;
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rtx temp, seq;
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if (optab_handler (ctz_optab, mode)->insn_code != CODE_FOR_nothing)
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{
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rtx last = get_last_insn ();
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rtx temp;
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start_sequence ();
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temp = expand_unop (mode, neg_optab, op0, NULL_RTX, true);
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if (temp)
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temp = expand_binop (mode, and_optab, op0, temp, NULL_RTX,
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true, OPTAB_DIRECT);
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if (temp)
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temp = expand_unop (mode, clz_optab, temp, NULL_RTX, true);
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if (temp)
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temp = expand_binop (mode, sub_optab,
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GEN_INT (GET_MODE_BITSIZE (mode)),
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temp,
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target, true, OPTAB_DIRECT);
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if (temp == 0)
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delete_insns_since (last);
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return temp;
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temp = expand_unop_direct (mode, ctz_optab, op0, 0, true);
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if (!temp)
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goto fail;
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defined_at_zero = (CTZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2);
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}
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return 0;
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}
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/* We can compute ctz(x) using clz(x) with a similar recipe. Here the ctz
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builtin has an undefined result on zero, just like clz, so we don't have
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to do that check. */
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static rtx
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expand_ctz (enum machine_mode mode, rtx op0, rtx target)
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{
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if (clz_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
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else if (optab_handler (clz_optab, mode)->insn_code != CODE_FOR_nothing)
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{
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rtx last = get_last_insn ();
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rtx temp;
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start_sequence ();
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temp = expand_ctz (mode, op0, 0);
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if (!temp)
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goto fail;
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temp = expand_unop (mode, neg_optab, op0, NULL_RTX, true);
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if (temp)
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temp = expand_binop (mode, and_optab, op0, temp, NULL_RTX,
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true, OPTAB_DIRECT);
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if (temp)
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temp = expand_unop (mode, clz_optab, temp, NULL_RTX, true);
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if (temp)
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temp = expand_binop (mode, xor_optab, temp,
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GEN_INT (GET_MODE_BITSIZE (mode) - 1),
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target,
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true, OPTAB_DIRECT);
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if (temp == 0)
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delete_insns_since (last);
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return temp;
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if (CLZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2)
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{
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defined_at_zero = true;
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val = (GET_MODE_BITSIZE (mode) - 1) - val;
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}
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}
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else
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return 0;
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if (defined_at_zero && val == -1)
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/* No correction needed at zero. */;
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else
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{
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/* We don't try to do anything clever with the situation found
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on some processors (eg Alpha) where ctz(0:mode) ==
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bitsize(mode). If someone can think of a way to send N to -1
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and leave alone all values in the range 0..N-1 (where N is a
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power of two), cheaper than this test-and-branch, please add it.
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The test-and-branch is done after the operation itself, in case
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the operation sets condition codes that can be recycled for this.
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(This is true on i386, for instance.) */
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rtx nonzero_label = gen_label_rtx ();
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emit_cmp_and_jump_insns (op0, CONST0_RTX (mode), NE, 0,
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mode, true, nonzero_label);
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convert_move (temp, GEN_INT (-1), false);
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emit_label (nonzero_label);
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}
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/* temp now has a value in the range -1..bitsize-1. ffs is supposed
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to produce a value in the range 0..bitsize. */
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temp = expand_binop (mode, add_optab, temp, GEN_INT (1),
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target, false, OPTAB_DIRECT);
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if (!temp)
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goto fail;
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seq = get_insns ();
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end_sequence ();
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add_equal_note (seq, temp, FFS, op0, 0);
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emit_insn (seq);
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return temp;
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fail:
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end_sequence ();
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return 0;
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}
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@ -2791,34 +2898,19 @@ expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
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return target;
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}
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/* Generate code to perform an operation specified by UNOPTAB
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on operand OP0, with result having machine-mode MODE.
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|
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UNSIGNEDP is for the case where we have to widen the operands
|
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to perform the operation. It says to use zero-extension.
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|
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If TARGET is nonzero, the value
|
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is generated there, if it is convenient to do so.
|
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In all cases an rtx is returned for the locus of the value;
|
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this may or may not be TARGET. */
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|
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rtx
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expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
|
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/* As expand_unop, but will fail rather than attempt the operation in a
|
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different mode or with a libcall. */
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static rtx
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expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
|
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int unsignedp)
|
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{
|
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enum mode_class class;
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enum machine_mode wider_mode;
|
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rtx temp;
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rtx last = get_last_insn ();
|
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rtx pat;
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|
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class = GET_MODE_CLASS (mode);
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|
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if (optab_handler (unoptab, mode)->insn_code != CODE_FOR_nothing)
|
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{
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int icode = (int) optab_handler (unoptab, mode)->insn_code;
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enum machine_mode mode0 = insn_data[icode].operand[1].mode;
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rtx xop0 = op0;
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rtx last = get_last_insn ();
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rtx pat, temp;
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|
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if (target)
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temp = target;
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|
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@ -2854,16 +2946,49 @@ expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
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else
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delete_insns_since (last);
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}
|
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return 0;
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}
|
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|
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/* Generate code to perform an operation specified by UNOPTAB
|
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on operand OP0, with result having machine-mode MODE.
|
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|
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UNSIGNEDP is for the case where we have to widen the operands
|
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to perform the operation. It says to use zero-extension.
|
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|
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If TARGET is nonzero, the value
|
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is generated there, if it is convenient to do so.
|
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In all cases an rtx is returned for the locus of the value;
|
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this may or may not be TARGET. */
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|
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rtx
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expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
|
||||
int unsignedp)
|
||||
{
|
||||
enum mode_class class = GET_MODE_CLASS (mode);
|
||||
enum machine_mode wider_mode;
|
||||
rtx temp;
|
||||
|
||||
temp = expand_unop_direct (mode, unoptab, op0, target, unsignedp);
|
||||
if (temp)
|
||||
return temp;
|
||||
|
||||
/* It can't be done in this mode. Can we open-code it in a wider mode? */
|
||||
|
||||
/* Widening clz needs special treatment. */
|
||||
/* Widening (or narrowing) clz needs special treatment. */
|
||||
if (unoptab == clz_optab)
|
||||
{
|
||||
temp = widen_clz (mode, op0, target);
|
||||
if (temp)
|
||||
return temp;
|
||||
else
|
||||
|
||||
if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
|
||||
&& optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
|
||||
{
|
||||
temp = expand_doubleword_clz (mode, op0, target);
|
||||
if (temp)
|
||||
return temp;
|
||||
}
|
||||
|
||||
goto try_libcall;
|
||||
}
|
||||
|
||||
|
|
@ -2893,6 +3018,7 @@ expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
|
|||
if (optab_handler (unoptab, wider_mode)->insn_code != CODE_FOR_nothing)
|
||||
{
|
||||
rtx xop0 = op0;
|
||||
rtx last = get_last_insn ();
|
||||
|
||||
/* For certain operations, we need not actually extend
|
||||
the narrow operand, as long as we will truncate the
|
||||
|
|
@ -3052,6 +3178,7 @@ expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
|
|||
|| optab_handler (unoptab, wider_mode)->libfunc)
|
||||
{
|
||||
rtx xop0 = op0;
|
||||
rtx last = get_last_insn ();
|
||||
|
||||
/* For certain operations, we need not actually extend
|
||||
the narrow operand, as long as we will truncate the
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue