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[MIPS][Testsuite] Specify msa-fmadd.c abis.

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gcc/testsuite/

        * gcc.target/mips/mips-fmadd.c: Rename to ... 
        * gcc.target/mips/mips-fmadd-o32.c: ... Here; add abi=32.
        * gcc.target/mips/mips-fmadd-n64.c: New.

From-SVN: r273033
This commit is contained in:
Chenghua Xu 2019-07-04 01:54:02 +00:00 • committed by Chenghua Xu
parent 4c5f7762a9
commit 9c5784fa75
3 changed files with 108 additions and 1 deletions
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6
gcc/testsuite/ChangeLog
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@ -1,3 +1,9 @@
2019-07-04 Chenghua Xu <paul.hua.gm@gmail.com>
* gcc.target/mips/mips-fmadd.c: Rename to ...
* gcc.target/mips/mips-fmadd-o32.c: ... Here; add abi=32.
* gcc.target/mips/mips-fmadd-n64.c: New.
2019-07-03 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.dg/store_merging_27.c: Fix test for Arm.

101
gcc/testsuite/gcc.target/mips/msa-fmadd-n64.c Normal file
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@ -0,0 +1,101 @@
/* { dg-do compile } */
/* { dg-options "-mabi=64 -mfp64 -mhard-float -mmsa -EL -flax-vector-conversions" } */
/* { dg-skip-if "uses global registers" { *-*-* } { "-O0" } { "" } } */
typedef int v4i32 __attribute__ ((vector_size(16)));
typedef float v4f32 __attribute__ ((vector_size(16)));
typedef double v2f64 __attribute__ ((vector_size(16)));
/* Test that MSA FMADD-like intrinsics do not use first operand for multiplication. */
register v4i32 a __asm__("$f24");
register v4i32 b __asm__("$f25");
register v4f32 c __asm__("$f26");
register v4f32 d __asm__("$f27");
register v2f64 e __asm__("$f28");
register v2f64 f __asm__("$f29");
void
maddv_b_msa (void)
{
a = __builtin_msa_maddv_b (a, b, b);
}
/* { dg-final { scan-assembler "maddv\\\.b\t\\\$w24,\\\$w25,\\\$w25" } } */
void
maddv_h_msa (void)
{
a = __builtin_msa_maddv_h (a, b, b);
}
/* { dg-final { scan-assembler "maddv\\\.h\t\\\$w24,\\\$w25,\\\$w25" } } */
void
maddv_w_msa (void)
{
a = __builtin_msa_maddv_w (a, b, b);
}
/* { dg-final { scan-assembler "maddv\\\.w\t\\\$w24,\\\$w25,\\\$w25" } } */
void
maddv_d_msa (void)
{
a = __builtin_msa_maddv_d (a, b, b);
}
/* { dg-final { scan-assembler "maddv\\\.d\t\\\$w24,\\\$w25,\\\$w25" } } */
void
msubv_b_msa (void)
{
a = __builtin_msa_msubv_b (a, b, b);
}
/* { dg-final { scan-assembler "msubv\\\.b\t\\\$w24,\\\$w25,\\\$w25" } } */
void
msubv_h_msa (void)
{
a = __builtin_msa_msubv_h (a, b, b);
}
/* { dg-final { scan-assembler "msubv\\\.h\t\\\$w24,\\\$w25,\\\$w25" } } */
void
msubv_w_msa (void)
{
a = __builtin_msa_msubv_w (a, b, b);
}
/* { dg-final { scan-assembler "msubv\\\.w\t\\\$w24,\\\$w25,\\\$w25" } } */
void
msubv_d_msa (void)
{
a = __builtin_msa_msubv_d (a, b, b);
}
/* { dg-final { scan-assembler "msubv\\\.d\t\\\$w24,\\\$w25,\\\$w25" } } */
void
fmadd_w_msa (void)
{
c = __builtin_msa_fmadd_w (c, d, d);
}
/* { dg-final { scan-assembler "fmadd\\\.w\t\\\$w26,\\\$w27,\\\$w27" } } */
void
fmadd_d_msa (void)
{
e = __builtin_msa_fmadd_d (e, f, f);
}
/* { dg-final { scan-assembler "fmadd\\\.d\t\\\$w28,\\\$w29,\\\$w29" } } */
void
fmsub_w_msa (void)
{
c = __builtin_msa_fmsub_w (c, d, d);
}
/* { dg-final { scan-assembler "fmsub\\\.w\t\\\$w26,\\\$w27,\\\$w27" } } */
void
fmsub_d_msa (void)
{
e = __builtin_msa_fmsub_d (e, f, f);
}
/* { dg-final { scan-assembler "fmsub\\\.d\t\\\$w28,\\\$w29,\\\$w29" } } */

2
gcc/testsuite/gcc.target/mips/msa-fmadd.c → gcc/testsuite/gcc.target/mips/msa-fmadd-o32.c
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@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-mfp64 -mhard-float -mmsa -EL -flax-vector-conversions" } */
/* { dg-options "-mabi=32 -mfp64 -mhard-float -mmsa -EL -flax-vector-conversions" } */
/* { dg-skip-if "uses global registers" { *-*-* } { "-O0" } { "" } } */
typedef int v4i32 __attribute__ ((vector_size(16)));