basic-block.h: Remove the prototypes for can_hoist_insn_p...
* basic-block.h: Remove the prototypes for can_hoist_insn_p, hoist_insn_after, and hoist_insn_to_edge. * rtl.h: Remove the prototypes for reg_referenced_between_p, no_jumps_between_p, and insn_dependent_p. * rtlanal.c (no_jumps_between_p, reg_referenced_between_p, insn_dependent_p, insn_dependent_p_1, hoist_test_store, can_hoist_insn_p, hoist_update_store, hoist_insn_after, hoist_insn_to_edge): Remove. From-SVN: r88860
This commit is contained in:
Kazu Hirata
Kazu Hirata
parent
382c6e2df8
commit
9b1f72c413
4 changed files with 11 additions and 332 deletions
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@ -1,3 +1,14 @@
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2004-10-10 Kazu Hirata <kazu@cs.umass.edu>
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* basic-block.h: Remove the prototypes for can_hoist_insn_p,
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hoist_insn_after, and hoist_insn_to_edge.
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* rtl.h: Remove the prototypes for reg_referenced_between_p,
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no_jumps_between_p, and insn_dependent_p.
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* rtlanal.c (no_jumps_between_p, reg_referenced_between_p,
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insn_dependent_p, insn_dependent_p_1, hoist_test_store,
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can_hoist_insn_p, hoist_update_store, hoist_insn_after,
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hoist_insn_to_edge): Remove.
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2004-10-10 Joseph S. Myers <jsm@polyomino.org.uk>
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PR c/17881
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@ -815,9 +815,6 @@ extern bool mark_dfs_back_edges (void);
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extern void set_edge_can_fallthru_flag (void);
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extern void update_br_prob_note (basic_block);
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extern void fixup_abnormal_edges (void);
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extern bool can_hoist_insn_p (rtx, rtx, regset);
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extern rtx hoist_insn_after (rtx, rtx, rtx, rtx);
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extern rtx hoist_insn_to_edge (rtx, edge, rtx, rtx);
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extern bool inside_basic_block_p (rtx);
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extern bool control_flow_insn_p (rtx);
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@ -1607,16 +1607,13 @@ extern int reg_mentioned_p (rtx, rtx);
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extern int count_occurrences (rtx, rtx, int);
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extern int reg_referenced_p (rtx, rtx);
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extern int reg_used_between_p (rtx, rtx, rtx);
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extern int reg_referenced_between_p (rtx, rtx, rtx);
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extern int reg_set_between_p (rtx, rtx, rtx);
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extern int regs_set_between_p (rtx, rtx, rtx);
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extern int commutative_operand_precedence (rtx);
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extern int swap_commutative_operands_p (rtx, rtx);
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extern int modified_between_p (rtx, rtx, rtx);
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extern int no_labels_between_p (rtx, rtx);
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extern int no_jumps_between_p (rtx, rtx);
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extern int modified_in_p (rtx, rtx);
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extern int insn_dependent_p (rtx, rtx);
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extern int reg_set_p (rtx, rtx);
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extern rtx single_set_2 (rtx, rtx);
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extern int multiple_sets (rtx);
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326
gcc/rtlanal.c
326
gcc/rtlanal.c
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@ -41,12 +41,9 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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/* Forward declarations */
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static int global_reg_mentioned_p_1 (rtx *, void *);
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static void set_of_1 (rtx, rtx, void *);
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static void insn_dependent_p_1 (rtx, rtx, void *);
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static int rtx_referenced_p_1 (rtx *, void *);
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static int computed_jump_p_1 (rtx);
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static void parms_set (rtx, rtx, void *);
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static bool hoist_test_store (rtx, rtx, regset);
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static void hoist_update_store (rtx, rtx *, rtx, rtx);
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static unsigned HOST_WIDE_INT cached_nonzero_bits (rtx, enum machine_mode,
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rtx, enum machine_mode,
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@ -650,19 +647,6 @@ no_labels_between_p (rtx beg, rtx end)
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return 1;
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}
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/* Return 1 if in between BEG and END, exclusive of BEG and END, there is
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no JUMP_INSN insn. */
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int
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no_jumps_between_p (rtx beg, rtx end)
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{
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rtx p;
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for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
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if (JUMP_P (p))
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return 0;
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return 1;
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}
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/* Nonzero if register REG is used in an insn between
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FROM_INSN and TO_INSN (exclusive of those two). */
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@ -760,27 +744,6 @@ reg_referenced_p (rtx x, rtx body)
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return 0;
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}
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}
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/* Nonzero if register REG is referenced in an insn between
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FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do
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not count. */
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int
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reg_referenced_between_p (rtx reg, rtx from_insn, rtx to_insn)
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{
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rtx insn;
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if (from_insn == to_insn)
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return 0;
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for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
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if (INSN_P (insn)
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&& (reg_referenced_p (reg, PATTERN (insn))
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|| (CALL_P (insn)
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&& find_reg_fusage (insn, USE, reg))))
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return 1;
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return 0;
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}
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/* Nonzero if register REG is set or clobbered in an insn between
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FROM_INSN and TO_INSN (exclusive of those two). */
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@ -982,41 +945,6 @@ modified_in_p (rtx x, rtx insn)
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return 0;
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}
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/* Return true if anything in insn X is (anti,output,true) dependent on
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anything in insn Y. */
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int
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insn_dependent_p (rtx x, rtx y)
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{
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rtx tmp;
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gcc_assert (INSN_P (x));
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gcc_assert (INSN_P (y));
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tmp = PATTERN (y);
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note_stores (PATTERN (x), insn_dependent_p_1, &tmp);
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if (tmp == NULL_RTX)
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return 1;
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tmp = PATTERN (x);
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note_stores (PATTERN (y), insn_dependent_p_1, &tmp);
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if (tmp == NULL_RTX)
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return 1;
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return 0;
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}
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/* A helper routine for insn_dependent_p called through note_stores. */
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static void
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insn_dependent_p_1 (rtx x, rtx pat ATTRIBUTE_UNUSED, void *data)
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{
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rtx * pinsn = (rtx *) data;
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if (*pinsn && reg_mentioned_p (x, *pinsn))
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*pinsn = NULL_RTX;
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}
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/* Helper function for set_of. */
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struct set_of_data
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@ -3303,260 +3231,6 @@ keep_with_call_p (rtx insn)
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return false;
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}
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/* Return true when store to register X can be hoisted to the place
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with LIVE registers (can be NULL). Value VAL contains destination
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whose value will be used. */
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static bool
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hoist_test_store (rtx x, rtx val, regset live)
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{
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if (GET_CODE (x) == SCRATCH)
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return true;
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if (rtx_equal_p (x, val))
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return true;
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/* Allow subreg of X in case it is not writing just part of multireg pseudo.
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Then we would need to update all users to care hoisting the store too.
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Caller may represent that by specifying whole subreg as val. */
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if (GET_CODE (x) == SUBREG && rtx_equal_p (SUBREG_REG (x), val))
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{
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if (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD
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&& GET_MODE_BITSIZE (GET_MODE (x)) <
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GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))))
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return false;
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return true;
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}
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if (GET_CODE (x) == SUBREG)
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x = SUBREG_REG (x);
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/* Anything except register store is not hoistable. This includes the
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partial stores to registers. */
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if (!REG_P (x))
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return false;
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/* Pseudo registers can be always replaced by another pseudo to avoid
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the side effect, for hard register we must ensure that they are dead.
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Eventually we may want to add code to try turn pseudos to hards, but it
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is unlikely useful. */
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if (REGNO (x) < FIRST_PSEUDO_REGISTER)
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{
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int regno = REGNO (x);
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int n = hard_regno_nregs[regno][GET_MODE (x)];
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if (!live)
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return false;
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if (REGNO_REG_SET_P (live, regno))
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return false;
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while (--n > 0)
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if (REGNO_REG_SET_P (live, regno + n))
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return false;
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}
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return true;
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}
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/* Return true if INSN can be hoisted to place with LIVE hard registers
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(LIVE can be NULL when unknown). VAL is expected to be stored by the insn
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and used by the hoisting pass. */
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bool
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can_hoist_insn_p (rtx insn, rtx val, regset live)
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{
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rtx pat = PATTERN (insn);
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int i;
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/* It probably does not worth the complexity to handle multiple
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set stores. */
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if (!single_set (insn))
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return false;
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/* We can move CALL_INSN, but we need to check that all caller clobbered
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regs are dead. */
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if (CALL_P (insn))
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return false;
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/* In future we will handle hoisting of libcall sequences, but
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give up for now. */
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if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
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return false;
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switch (GET_CODE (pat))
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{
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case SET:
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if (!hoist_test_store (SET_DEST (pat), val, live))
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return false;
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break;
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case USE:
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/* USES do have sick semantics, so do not move them. */
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return false;
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break;
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case CLOBBER:
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if (!hoist_test_store (XEXP (pat, 0), val, live))
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return false;
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break;
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case PARALLEL:
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for (i = 0; i < XVECLEN (pat, 0); i++)
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{
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rtx x = XVECEXP (pat, 0, i);
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switch (GET_CODE (x))
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{
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case SET:
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if (!hoist_test_store (SET_DEST (x), val, live))
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return false;
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break;
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case USE:
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/* We need to fix callers to really ensure availability
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of all values insn uses, but for now it is safe to prohibit
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hoisting of any insn having such a hidden uses. */
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return false;
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break;
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case CLOBBER:
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if (!hoist_test_store (SET_DEST (x), val, live))
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return false;
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break;
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default:
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break;
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}
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}
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break;
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default:
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gcc_unreachable ();
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}
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return true;
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}
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/* Update store after hoisting - replace all stores to pseudo registers
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by new ones to avoid clobbering of values except for store to VAL that will
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be updated to NEW. */
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static void
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hoist_update_store (rtx insn, rtx *xp, rtx val, rtx new)
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{
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rtx x = *xp;
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if (GET_CODE (x) == SCRATCH)
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return;
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if (GET_CODE (x) == SUBREG && SUBREG_REG (x) == val)
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validate_change (insn, xp,
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simplify_gen_subreg (GET_MODE (x), new, GET_MODE (new),
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SUBREG_BYTE (x)), 1);
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if (rtx_equal_p (x, val))
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{
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validate_change (insn, xp, new, 1);
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return;
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}
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if (GET_CODE (x) == SUBREG)
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{
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xp = &SUBREG_REG (x);
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x = *xp;
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}
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gcc_assert (REG_P (x));
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/* We've verified that hard registers are dead, so we may keep the side
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effect. Otherwise replace it by new pseudo. */
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if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
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validate_change (insn, xp, gen_reg_rtx (GET_MODE (x)), 1);
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REG_NOTES (insn)
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= alloc_EXPR_LIST (REG_UNUSED, *xp, REG_NOTES (insn));
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}
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/* Create a copy of INSN after AFTER replacing store of VAL to NEW
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and each other side effect to pseudo register by new pseudo register. */
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rtx
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hoist_insn_after (rtx insn, rtx after, rtx val, rtx new)
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{
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rtx pat;
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int i;
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rtx note;
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int applied;
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insn = emit_copy_of_insn_after (insn, after);
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pat = PATTERN (insn);
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/* Remove REG_UNUSED notes as we will re-emit them. */
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while ((note = find_reg_note (insn, REG_UNUSED, NULL_RTX)))
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remove_note (insn, note);
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/* To get this working callers must ensure to move everything referenced
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by REG_EQUAL/REG_EQUIV notes too. Lets remove them, it is probably
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easier. */
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while ((note = find_reg_note (insn, REG_EQUAL, NULL_RTX)))
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remove_note (insn, note);
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while ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)))
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remove_note (insn, note);
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/* Remove REG_DEAD notes as they might not be valid anymore in case
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we create redundancy. */
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while ((note = find_reg_note (insn, REG_DEAD, NULL_RTX)))
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remove_note (insn, note);
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switch (GET_CODE (pat))
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{
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case SET:
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hoist_update_store (insn, &SET_DEST (pat), val, new);
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break;
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case USE:
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break;
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case CLOBBER:
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hoist_update_store (insn, &XEXP (pat, 0), val, new);
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break;
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case PARALLEL:
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for (i = 0; i < XVECLEN (pat, 0); i++)
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{
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rtx x = XVECEXP (pat, 0, i);
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switch (GET_CODE (x))
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{
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case SET:
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hoist_update_store (insn, &SET_DEST (x), val, new);
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break;
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case USE:
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break;
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case CLOBBER:
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hoist_update_store (insn, &SET_DEST (x), val, new);
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break;
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default:
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break;
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}
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}
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break;
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default:
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gcc_unreachable ();
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}
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applied = apply_change_group ();
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gcc_assert (applied);
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return insn;
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}
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rtx
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hoist_insn_to_edge (rtx insn, edge e, rtx val, rtx new)
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{
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rtx new_insn;
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/* We cannot insert instructions on an abnormal critical edge.
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It will be easier to find the culprit if we die now. */
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gcc_assert (!(e->flags & EDGE_ABNORMAL) || !EDGE_CRITICAL_P (e));
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/* Do not use emit_insn_on_edge as we want to preserve notes and similar
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stuff. We also emit CALL_INSNS and firends. */
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if (e->insns.r == NULL_RTX)
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{
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start_sequence ();
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emit_note (NOTE_INSN_DELETED);
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}
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else
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push_to_sequence (e->insns.r);
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new_insn = hoist_insn_after (insn, get_last_insn (), val, new);
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e->insns.r = get_insns ();
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end_sequence ();
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return new_insn;
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}
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/* Return true if LABEL is a target of JUMP_INSN. This applies only
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to non-complex jumps. That is, direct unconditional, conditional,
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and tablejumps, but not computed jumps or returns. It also does
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