From 99a9e7218055260c6d3a769daa109dfb756054c2 Mon Sep 17 00:00:00 2001 From: Haochen Jiang Date: Mon, 24 Mar 2025 14:24:27 +0800 Subject: [PATCH] Revert "AVX10.2 ymm rounding: Support vcvtph2p{s,d,sx} and vcvtph2{,u}{dq,qq} intrins" This reverts commit 6f2eac53b6026836f3222961c32312e02c2c7dbc. --- gcc/config/i386/avx10_2roundingintrin.h | 384 ------------------ gcc/config/i386/i386-builtin-types.def | 4 - gcc/config/i386/i386-builtin.def | 7 - gcc/config/i386/i386-expand.cc | 4 - gcc/config/i386/sse.md | 19 +- gcc/config/i386/subst.md | 1 - gcc/testsuite/gcc.target/i386/avx-1.c | 7 - .../gcc.target/i386/avx10_2-rounding-1.c | 57 --- gcc/testsuite/gcc.target/i386/sse-13.c | 7 - gcc/testsuite/gcc.target/i386/sse-14.c | 20 - gcc/testsuite/gcc.target/i386/sse-22.c | 21 - gcc/testsuite/gcc.target/i386/sse-23.c | 7 - 12 files changed, 9 insertions(+), 529 deletions(-) diff --git a/gcc/config/i386/avx10_2roundingintrin.h b/gcc/config/i386/avx10_2roundingintrin.h index bddd0e091ff..1576f17be3b 100644 --- a/gcc/config/i386/avx10_2roundingintrin.h +++ b/gcc/config/i386/avx10_2roundingintrin.h @@ -486,246 +486,6 @@ _mm256_maskz_cvt_roundpd_epu64 (__mmask8 __U, __m256d __A, const int __R) (__mmask8) __U, __R); } - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_cvt_roundph_epi32 (__m128h __A, const int __R) -{ - return - (__m256i) __builtin_ia32_vcvtph2dq256_mask_round ((__v8hf) __A, - (__v8si) - _mm256_setzero_si256 (), - (__mmask8) -1, - __R); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_mask_cvt_roundph_epi32 (__m256i __W, __mmask8 __U, __m128h __A, - const int __R) -{ - return (__m256i) __builtin_ia32_vcvtph2dq256_mask_round ((__v8hf) __A, - (__v8si) __W, - (__mmask8) __U, - __R); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_cvt_roundph_epi32 (__mmask8 __U, __m128h __A, const int __R) -{ - return - (__m256i) __builtin_ia32_vcvtph2dq256_mask_round ((__v8hf) __A, - (__v8si) - _mm256_setzero_si256 (), - (__mmask8) __U, - __R); -} - -extern __inline __m256d -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_cvt_roundph_pd (__m128h __A, const int __R) -{ - return (__m256d) __builtin_ia32_vcvtph2pd256_mask_round ((__v8hf) __A, - (__v4df) - _mm256_setzero_pd (), - (__mmask8) -1, - __R); -} - -extern __inline __m256d -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_mask_cvt_roundph_pd (__m256d __W, __mmask8 __U, __m128h __A, - const int __R) -{ - return (__m256d) __builtin_ia32_vcvtph2pd256_mask_round ((__v8hf) __A, - (__v4df) __W, - (__mmask8) __U, - __R); -} - -extern __inline __m256d -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_cvt_roundph_pd (__mmask8 __U, __m128h __A, const int __R) -{ - return (__m256d) __builtin_ia32_vcvtph2pd256_mask_round ((__v8hf) __A, - (__v4df) - _mm256_setzero_pd (), - (__mmask8) __U, - __R); -} - -extern __inline __m256 -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_cvt_roundph_ps (__m128h __A, const int __R) -{ - return - (__m256) __builtin_ia32_vcvtph2ps256_mask_round ((__v8hf) __A, - (__v8sf) - _mm256_undefined_ps (), - (__mmask8) -1, - __R); -} - -extern __inline __m256 -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_mask_cvt_roundph_ps (__m256 __W, __mmask8 __U, __m128h __A, - const int __R) -{ - return (__m256) __builtin_ia32_vcvtph2ps256_mask_round ((__v8hf) __A, - (__v8sf) __W, - (__mmask8) __U, - __R); -} - -extern __inline __m256 -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_cvt_roundph_ps (__mmask8 __U, __m128h __A, const int __R) -{ - return (__m256) __builtin_ia32_vcvtph2ps256_mask_round ((__v8hf) __A, - (__v8sf) - _mm256_setzero_ps (), - (__mmask8) __U, - __R); -} - -extern __inline __m256 -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_cvtx_roundph_ps (__m128h __A, const int __R) -{ - return (__m256) __builtin_ia32_vcvtph2psx256_mask_round ((__v8hf) __A, - (__v8sf) - _mm256_setzero_ps (), - (__mmask8) -1, - __R); -} - -extern __inline __m256 -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_mask_cvtx_roundph_ps (__m256 __W, __mmask8 __U, __m128h __A, - const int __R) -{ - return (__m256) __builtin_ia32_vcvtph2psx256_mask_round ((__v8hf) __A, - (__v8sf) __W, - (__mmask8) __U, - __R); -} - -extern __inline __m256 -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_cvtx_roundph_ps (__mmask8 __U, __m128h __A, const int __R) -{ - return (__m256) __builtin_ia32_vcvtph2psx256_mask_round ((__v8hf) __A, - (__v8sf) - _mm256_setzero_ps (), - (__mmask8) __U, - __R); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_cvt_roundph_epi64 (__m128h __A, const int __R) -{ - return - (__m256i) __builtin_ia32_vcvtph2qq256_mask_round ((__v8hf) __A, - (__v4di) - _mm256_setzero_si256 (), - (__mmask8) -1, - __R); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_mask_cvt_roundph_epi64 (__m256i __W, __mmask8 __U, __m128h __A, - const int __R) -{ - return (__m256i) __builtin_ia32_vcvtph2qq256_mask_round ((__v8hf) __A, - (__v4di) __W, - (__mmask8) __U, - __R); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_cvt_roundph_epi64 (__mmask8 __U, __m128h __A, const int __R) -{ - return - (__m256i) __builtin_ia32_vcvtph2qq256_mask_round ((__v8hf) __A, - (__v4di) - _mm256_setzero_si256 (), - (__mmask8) __U, - __R); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_cvt_roundph_epu32 (__m128h __A, const int __R) -{ - return - (__m256i) __builtin_ia32_vcvtph2udq256_mask_round ((__v8hf) __A, - (__v8si) - _mm256_setzero_si256 (), - (__mmask8) -1, - __R); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_mask_cvt_roundph_epu32 (__m256i __W, __mmask8 __U, __m128h __A, - const int __R) -{ - return (__m256i) __builtin_ia32_vcvtph2udq256_mask_round ((__v8hf) __A, - (__v8si) __W, - (__mmask8) __U, - __R); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_cvt_roundph_epu32 (__mmask8 __U, __m128h __A, const int __R) -{ - return - (__m256i) __builtin_ia32_vcvtph2udq256_mask_round ((__v8hf) __A, - (__v8si) - _mm256_setzero_si256 (), - (__mmask8) __U, - __R); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_cvt_roundph_epu64 (__m128h __A, const int __R) -{ - return - (__m256i) __builtin_ia32_vcvtph2uqq256_mask_round ((__v8hf) __A, - (__v4di) - _mm256_setzero_si256 (), - (__mmask8) -1, - __R); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_mask_cvt_roundph_epu64 (__m256i __W, __mmask8 __U, __m128h __A, - const int __R) -{ - return (__m256i) __builtin_ia32_vcvtph2uqq256_mask_round ((__v8hf) __A, - (__v4di) __W, - (__mmask8) __U, - __R); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_cvt_roundph_epu64 (__mmask8 __U, __m128h __A, const int __R) -{ - return - (__m256i) __builtin_ia32_vcvtph2uqq256_mask_round ((__v8hf) __A, - (__v4di) - _mm256_setzero_si256 (), - (__mmask8) __U, - __R); -} #else #define _mm256_add_round_pd(A, B, R) \ ((__m256d) __builtin_ia32_addpd256_mask_round ((__v4df) (A), \ @@ -995,150 +755,6 @@ _mm256_maskz_cvt_roundph_epu64 (__mmask8 __U, __m128h __A, const int __R) (_mm256_setzero_si256 ()),\ (__mmask8) (U), \ (R))) - -#define _mm256_cvt_roundph_epi32(A, R) \ - ((__m256i) __builtin_ia32_vcvtph2dq256_mask_round ((__v8hf) (A), \ - (__v8si) \ - (_mm256_setzero_si256 ()),\ - (__mmask8) (-1), \ - (R))) - -#define _mm256_mask_cvt_roundph_epi32(W, U, A, R) \ - ((__m256i) __builtin_ia32_vcvtph2dq256_mask_round ((__v8hf) (A), \ - (__v8si) (W), \ - (__mmask8) (U), \ - (R))) - -#define _mm256_maskz_cvt_roundph_epi32(U, A, R) \ - ((__m256i) __builtin_ia32_vcvtph2dq256_mask_round ((__v8hf) (A), \ - (__v8si) \ - (_mm256_setzero_si256 ()),\ - (__mmask8) (U), \ - (R))) - -#define _mm256_cvt_roundph_pd(A, R) \ - ((__m256d) __builtin_ia32_vcvtph2pd256_mask_round ((__v8hf) (A), \ - (__v4df) \ - (_mm256_setzero_pd ()), \ - (__mmask8) (-1), \ - (R))) - -#define _mm256_mask_cvt_roundph_pd(W, U, A, R) \ - ((__m256d) __builtin_ia32_vcvtph2pd256_mask_round ((__v8hf) (A), \ - (__v4df) (W), \ - (__mmask8) (U), \ - (R))) - -#define _mm256_maskz_cvt_roundph_pd(U, A, R) \ - ((__m256d) __builtin_ia32_vcvtph2pd256_mask_round ((__v8hf) (A), \ - (__v4df) \ - (_mm256_setzero_pd ()), \ - (__mmask8) (U), \ - (R))) - -#define _mm256_cvt_roundph_ps(A, R) \ - ((__m256) __builtin_ia32_vcvtph2ps256_mask_round ((__v8hf) (A), \ - (__v8sf) \ - (_mm256_undefined_ps ()), \ - (__mmask8) (-1), \ - (R))) - -#define _mm256_mask_cvt_roundph_ps(W, U, A, R) \ - ((__m256) __builtin_ia32_vcvtph2ps256_mask_round ((__v8hf) (A), \ - (__v8sf) (W), \ - (__mmask8) (U), \ - (R))) - -#define _mm256_maskz_cvt_roundph_ps(U, A, R) \ - ((__m256) __builtin_ia32_vcvtph2ps256_mask_round ((__v8hf) (A), \ - (__v8sf) \ - (_mm256_setzero_ps ()), \ - (__mmask8) (U), \ - (R))) - -#define _mm256_cvtx_roundph_ps(A, R) \ - ((__m256) __builtin_ia32_vcvtph2psx256_mask_round ((__v8hf) (A), \ - (__v8sf) \ - (_mm256_setzero_ps ()), \ - (__mmask8) (-1), \ - (R))) - -#define _mm256_mask_cvtx_roundph_ps(W, U, A, R) \ - ((__m256) __builtin_ia32_vcvtph2psx256_mask_round ((__v8hf) (A), \ - (__v8sf) (W), \ - (__mmask8) (U), \ - (R))) - -#define _mm256_maskz_cvtx_roundph_ps(U, A, R) \ - ((__m256) __builtin_ia32_vcvtph2psx256_mask_round ((__v8hf) (A), \ - (__v8sf) \ - (_mm256_setzero_ps ()), \ - (__mmask8) (U), \ - (R))) - -#define _mm256_cvt_roundph_epi64(A, R) \ - ((__m256i) __builtin_ia32_vcvtph2qq256_mask_round ((__v8hf) (A), \ - (__v4di) \ - (_mm256_setzero_si256 ()),\ - (__mmask8) (-1), \ - (R))) - -#define _mm256_mask_cvt_roundph_epi64(W, U, A, R) \ - ((__m256i) __builtin_ia32_vcvtph2qq256_mask_round ((__v8hf) (A), \ - (__v4di) (W), \ - (__mmask8) (U), \ - (R))) - -#define _mm256_maskz_cvt_roundph_epi64(U, A, R) \ - ((__m256i) __builtin_ia32_vcvtph2qq256_mask_round ((__v8hf) (A), \ - (__v4di) \ - (_mm256_setzero_si256 ()),\ - (__mmask8) (U), \ - (R))) - -#define _mm256_cvt_roundph_epu32(A, R) \ - ((__m256i) \ - __builtin_ia32_vcvtph2udq256_mask_round ((__v8hf) (A), \ - (__v8si) \ - (_mm256_setzero_si256 ()), \ - (__mmask8) (-1), \ - (R))) - -#define _mm256_mask_cvt_roundph_epu32(W, U, A, R) \ - ((__m256i) __builtin_ia32_vcvtph2udq256_mask_round ((__v8hf) (A), \ - (__v8si) (W), \ - (__mmask8) (U), \ - (R))) - -#define _mm256_maskz_cvt_roundph_epu32(U, A, R) \ - ((__m256i) \ - __builtin_ia32_vcvtph2udq256_mask_round ((__v8hf) (A), \ - (__v8si) \ - (_mm256_setzero_si256 ()), \ - (__mmask8) (U), \ - (R))) - -#define _mm256_cvt_roundph_epu64(A, R) \ - ((__m256i) \ - __builtin_ia32_vcvtph2uqq256_mask_round ((__v8hf) (A), \ - (__v4di) \ - (_mm256_setzero_si256 ()), \ - (__mmask8) (-1), \ - (R))) - -#define _mm256_mask_cvt_roundph_epu64(W, U, A, R) \ - ((__m256i) __builtin_ia32_vcvtph2uqq256_mask_round ((__v8hf) (A), \ - (__v4di) (W), \ - (__mmask8) (U), \ - (R))) - -#define _mm256_maskz_cvt_roundph_epu64(U, A, R) \ - ((__m256i) \ - __builtin_ia32_vcvtph2uqq256_mask_round ((__v8hf) (A), \ - (__v4di) \ - (_mm256_setzero_si256 ()), \ - (__mmask8) (U), \ - (R))) #endif #ifdef __DISABLE_AVX10_2_256__ diff --git a/gcc/config/i386/i386-builtin-types.def b/gcc/config/i386/i386-builtin-types.def index f5e1ee13426..31ab56e9ffa 100644 --- a/gcc/config/i386/i386-builtin-types.def +++ b/gcc/config/i386/i386-builtin-types.def @@ -1428,10 +1428,6 @@ DEF_FUNCTION_TYPE (V8HF, V4DF, V8HF, UQI, INT) DEF_FUNCTION_TYPE (V4SF, V4DF, V4SF, UQI, INT) DEF_FUNCTION_TYPE (V4SI, V4DF, V4SI, UQI, INT) DEF_FUNCTION_TYPE (V4DI, V4DF, V4DI, UQI, INT) -DEF_FUNCTION_TYPE (V8SI, V8HF, V8SI, UQI, INT) -DEF_FUNCTION_TYPE (V4DF, V8HF, V4DF, UQI, INT) -DEF_FUNCTION_TYPE (V8SF, V8HF, V8SF, UQI, INT) -DEF_FUNCTION_TYPE (V4DI, V8HF, V4DI, UQI, INT) DEF_FUNCTION_TYPE (V32HF, V16SF, V16SF, V32HF, USI, INT) DEF_FUNCTION_TYPE (V32HF, V16SF, V16SF, V32HF, USI) DEF_FUNCTION_TYPE (V16HF, V8SF, V8SF, V16HF, UHI) diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def index 29f558c6e37..da3612f104f 100644 --- a/gcc/config/i386/i386-builtin.def +++ b/gcc/config/i386/i386-builtin.def @@ -3674,13 +3674,6 @@ BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx_cvtpd2dq256_mask_round, "__ BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_fix_notruncv4dfv4di2_mask_round, "__builtin_ia32_cvtpd2qq256_mask_round", IX86_BUILTIN_CVTPD2QQ256_MASK_ROUND, UNKNOWN, (int) V4DI_FTYPE_V4DF_V4DI_UQI_INT) BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_fixuns_notruncv4dfv4si2_mask_round, "__builtin_ia32_cvtpd2udq256_mask_round", IX86_BUILTIN_CVTPD2UDQ256_MASK_ROUND, UNKNOWN, (int) V4SI_FTYPE_V4DF_V4SI_UQI_INT) BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_fixuns_notruncv4dfv4di2_mask_round, "__builtin_ia32_cvtpd2uqq256_mask_round", IX86_BUILTIN_CVTPD2UQQ256_MASK_ROUND, UNKNOWN, (int) V4DI_FTYPE_V4DF_V4DI_UQI_INT) -BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512fp16_vcvtph2dq_v8si_mask_round, "__builtin_ia32_vcvtph2dq256_mask_round", IX86_BUILTIN_VCVTPH2DQ256_MASK_ROUND, UNKNOWN, (int) V8SI_FTYPE_V8HF_V8SI_UQI_INT) -BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512fp16_float_extend_phv4df2_mask_round, "__builtin_ia32_vcvtph2pd256_mask_round", IX86_BUILTIN_VCVTPH2PD256_MASK_ROUND, UNKNOWN, (int) V4DF_FTYPE_V8HF_V4DF_UQI_INT) -BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_vcvtph2ps256_mask_round, "__builtin_ia32_vcvtph2ps256_mask_round", IX86_BUILTIN_VCVTPH2PS256_MASK_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8HF_V8SF_UQI_INT) -BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512fp16_float_extend_phv8sf2_mask_round, "__builtin_ia32_vcvtph2psx256_mask_round", IX86_BUILTIN_VCVTPH2PSX256_MASK_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8HF_V8SF_UQI_INT) -BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512fp16_vcvtph2qq_v4di_mask_round, "__builtin_ia32_vcvtph2qq256_mask_round", IX86_BUILTIN_VCVTPH2QQ256_MASK_ROUND, UNKNOWN, (int) V4DI_FTYPE_V8HF_V4DI_UQI_INT) -BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512fp16_vcvtph2udq_v8si_mask_round, "__builtin_ia32_vcvtph2udq256_mask_round", IX86_BUILTIN_VCVTPH2UDQ256_MASK_ROUND, UNKNOWN, (int) V8SI_FTYPE_V8HF_V8SI_UQI_INT) -BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512fp16_vcvtph2uqq_v4di_mask_round, "__builtin_ia32_vcvtph2uqq256_mask_round", IX86_BUILTIN_VCVTPH2UQQ256_MASK_ROUND, UNKNOWN, (int) V4DI_FTYPE_V8HF_V4DI_UQI_INT) BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_cvt2ps2phx_v32hf_mask_round, "__builtin_ia32_vcvt2ps2phx512_mask_round", IX86_BUILTIN_VCVT2PS2PHX_V32HF_MASK_ROUND, UNKNOWN, (int) V32HF_FTYPE_V16SF_V16SF_V32HF_USI_INT) BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_cvtph2ibsv32hf_mask_round, "__builtin_ia32_cvtph2ibs512_mask_round", IX86_BUILTIN_CVTPH2IBS512_MASK_ROUND, UNKNOWN, (int) V32HI_FTYPE_V32HF_V32HI_USI_INT) BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_cvtph2iubsv32hf_mask_round, "__builtin_ia32_cvtph2iubs512_mask_round", IX86_BUILTIN_CVTPH2IUBS512_MASK_ROUND, UNKNOWN, (int) V32HI_FTYPE_V32HF_V32HI_USI_INT) diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index f5a1fc23aac..08f8f80fe25 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -12750,10 +12750,6 @@ ix86_expand_round_builtin (const struct builtin_description *d, case V8DF_FTYPE_V8SF_V8DF_QI_INT: case V16SF_FTYPE_V16HI_V16SF_HI_INT: case V8SF_FTYPE_V8SI_V8SF_UQI_INT: - case V8SF_FTYPE_V8HF_V8SF_UQI_INT: - case V8SI_FTYPE_V8HF_V8SI_UQI_INT: - case V4DF_FTYPE_V8HF_V4DF_UQI_INT: - case V4DI_FTYPE_V8HF_V4DI_UQI_INT: case V4DI_FTYPE_V4DF_V4DI_UQI_INT: case V2DF_FTYPE_V2DF_V2DF_V2DF_INT: case V4SI_FTYPE_V4DF_V4SI_UQI_INT: diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index a960cec7e70..7b6fdcb3da7 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -7627,7 +7627,7 @@ (unspec:VI248_AVX512VL [(match_operand: 1 "" "")] UNSPEC_US_FIX_NOTRUNC))] - "TARGET_AVX512FP16 && " + "TARGET_AVX512FP16" "vcvtph2\t{%1, %0|%0, %1}" [(set_attr "type" "ssecvt") (set_attr "prefix" "evex") @@ -8015,7 +8015,7 @@ [(set (match_operand:VF48H_AVX512VL 0 "register_operand" "=v") (float_extend:VF48H_AVX512VL (match_operand: 1 "" "")))] - "TARGET_AVX512FP16 && " + "TARGET_AVX512FP16" "vcvtph2\t{%1, %0|%0, %1}" [(set_attr "type" "ssecvt") (set_attr "prefix" "evex") @@ -8038,14 +8038,14 @@ } }) -(define_insn "avx512fp16_float_extend_ph2" +(define_insn "avx512fp16_float_extend_ph2" [(set (match_operand:VF4_128_8_256 0 "register_operand" "=v") (float_extend:VF4_128_8_256 (vec_select:V4HF (match_operand:V8HF 1 "register_operand" "v") (parallel [(const_int 0) (const_int 1) (const_int 2) (const_int 3)]))))] - "TARGET_AVX512FP16 && TARGET_AVX512VL && " - "vcvtph2\t{%1, %0|%0, %q1}" + "TARGET_AVX512FP16 && TARGET_AVX512VL" + "vcvtph2\t{%1, %0|%0, %q1}" [(set_attr "type" "ssecvt") (set_attr "prefix" "evex") (set_attr "mode" "")]) @@ -29088,13 +29088,12 @@ (set_attr "prefix" "vex") (set_attr "mode" "V8SF")]) -(define_insn "vcvtph2ps256" +(define_insn "vcvtph2ps256" [(set (match_operand:V8SF 0 "register_operand" "=v") - (unspec:V8SF [(match_operand:V8HI 1 "" "")] + (unspec:V8SF [(match_operand:V8HI 1 "nonimmediate_operand" "vm")] UNSPEC_VCVTPH2PS))] - "(TARGET_F16C || TARGET_AVX512VL) - && (! || TARGET_AVX10_2_256)" - "vcvtph2ps\t{%1, %0|%0, %1}" + "TARGET_F16C || TARGET_AVX512VL" + "vcvtph2ps\t{%1, %0|%0, %1}" [(set_attr "type" "ssecvt") (set_attr "prefix" "vex") (set_attr "btver2_decode" "double") diff --git a/gcc/config/i386/subst.md b/gcc/config/i386/subst.md index a44aa60e0b2..0f538cb45da 100644 --- a/gcc/config/i386/subst.md +++ b/gcc/config/i386/subst.md @@ -272,7 +272,6 @@ || mode == V4DImode || mode == V8SImode || mode == V16HFmode)))") -(define_subst_attr "round_saeonly_applied" "round_saeonly" "false" "true") (define_subst "round_saeonly" diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c index 9a7fa6f1b68..99f2d556676 100644 --- a/gcc/testsuite/gcc.target/i386/avx-1.c +++ b/gcc/testsuite/gcc.target/i386/avx-1.c @@ -857,13 +857,6 @@ #define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8) #define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8) #define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, 8) /* avx10_2-512mediaintrin.h */ #define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1) diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c index 6a2f1214e7a..01579c97893 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c @@ -39,27 +39,6 @@ /* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2dq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2dq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2dq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2qq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2qq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2qq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2udq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2udq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2udq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uqq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uqq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uqq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ #include @@ -146,39 +125,3 @@ avx10_2_test_5 (void) xi = _mm256_mask_cvt_roundpd_epu64 (xi, m8, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); xi = _mm256_maskz_cvt_roundpd_epu64 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } - -void extern -avx10_2_test_6 (void) -{ - xi = _mm256_cvt_roundph_epi32 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epi32 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epi32 (m8, hxh, 11); - - xi = _mm256_cvt_roundph_epi64 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epi64 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epi64 (m8, hxh, 11); - - xi = _mm256_cvt_roundph_epu32 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epu32 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epu32 (m8, hxh, 11); - - xi = _mm256_cvt_roundph_epu64 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epu64 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epu64 (m8, hxh, 11); -} - -void extern -avx10_2_test_7 (void) -{ - xd = _mm256_cvt_roundph_pd (hxh, 4); - xd = _mm256_mask_cvt_roundph_pd (xd, m8, hxh, 8); - xd = _mm256_maskz_cvt_roundph_pd (m8, hxh, 8); - - x = _mm256_cvt_roundph_ps (hxh, _MM_FROUND_NO_EXC); - x = _mm256_mask_cvt_roundph_ps (x, 4, hxh, _MM_FROUND_NO_EXC); - x = _mm256_maskz_cvt_roundph_ps (6, hxh, _MM_FROUND_NO_EXC); - - x = _mm256_cvtx_roundph_ps (hxh, 4); - x = _mm256_mask_cvtx_roundph_ps (x, m8, hxh, 8); - x = _mm256_maskz_cvtx_roundph_ps (m8, hxh, 8); -} diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c index 8ccadd4ac2c..4375ba1b597 100644 --- a/gcc/testsuite/gcc.target/i386/sse-13.c +++ b/gcc/testsuite/gcc.target/i386/sse-13.c @@ -864,13 +864,6 @@ #define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8) #define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8) #define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, 8) /* avx10_2-512mediaintrin.h */ #define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1) diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c index 544f53748a0..7c9d096abc6 100644 --- a/gcc/testsuite/gcc.target/i386/sse-14.c +++ b/gcc/testsuite/gcc.target/i386/sse-14.c @@ -1029,12 +1029,6 @@ test_1 (_mm256_cvt_roundpd_epi32, __m128i, __m256d, 9) test_1 (_mm256_cvt_roundpd_epi64, __m256i, __m256d, 9) test_1 (_mm256_cvt_roundpd_epu32, __m128i, __m256d, 9) test_1 (_mm256_cvt_roundpd_epu64, __m256i, __m256d, 9) -test_1 (_mm256_cvt_roundph_epi32, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_pd, __m256d, __m128h, 8) -test_1 (_mm256_cvt_roundph_ps, __m256, __m128i, 8) -test_1 (_mm256_cvtx_roundph_ps, __m256, __m128h, 8) -test_1 (_mm256_cvt_roundph_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu64, __m256i, __m128h, 8) test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9) test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8) test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9) @@ -1046,13 +1040,6 @@ test_2 (_mm256_maskz_cvt_roundpd_epi32, __m128i, __mmask8, __m256d, 9) test_2 (_mm256_maskz_cvt_roundpd_epi64, __m256i, __mmask8, __m256d, 9) test_2 (_mm256_maskz_cvt_roundpd_epu32, __m128i, __mmask8, __m256d, 9) test_2 (_mm256_maskz_cvt_roundpd_epu64, __m256i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundph_epi32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_pd, __m256d, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_ps, __m256, __mmask8, __m128i, 8) -test_2 (_mm256_maskz_cvtx_roundph_ps, __m256, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu64, __m256i, __mmask8, __m128h, 8) test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8) test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8) test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8) @@ -1067,13 +1054,6 @@ test_3 (_mm256_mask_cvt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 9) test_3 (_mm256_mask_cvt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 9) test_3 (_mm256_mask_cvt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 9) test_3 (_mm256_mask_cvt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundph_epi32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_pd, __m256d, __m256d, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_ps, __m256, __m256, __mmask8, __m128i, 8) -test_3 (_mm256_mask_cvtx_roundph_ps, __m256, __m256, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu64, __m256i, __m256i, __mmask8, __m128h, 8) test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8) test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8) test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8) diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c index 9c14e1f75ab..511c8bc2df4 100644 --- a/gcc/testsuite/gcc.target/i386/sse-22.c +++ b/gcc/testsuite/gcc.target/i386/sse-22.c @@ -1070,13 +1070,6 @@ test_1 (_mm256_cvt_roundpd_epi32, __m128i, __m256d, 9) test_1 (_mm256_cvt_roundpd_epi64, __m256i, __m256d, 9) test_1 (_mm256_cvt_roundpd_epu32, __m128i, __m256d, 9) test_1 (_mm256_cvt_roundpd_epu64, __m256i, __m256d, 9) -test_1 (_mm256_cvt_roundph_epi32, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_pd, __m256d, __m128h, 8) -test_1 (_mm256_cvt_roundph_ps, __m256, __m128i, 8) -test_1 (_mm256_cvtx_roundph_ps, __m256, __m128h, 8) -test_1 (_mm256_cvt_roundph_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu32, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu64, __m256i, __m128h, 8) test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9) test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8) test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9) @@ -1088,13 +1081,6 @@ test_2 (_mm256_maskz_cvt_roundpd_epi32, __m128i, __mmask8, __m256d, 9) test_2 (_mm256_maskz_cvt_roundpd_epi64, __m256i, __mmask8, __m256d, 9) test_2 (_mm256_maskz_cvt_roundpd_epu32, __m128i, __mmask8, __m256d, 9) test_2 (_mm256_maskz_cvt_roundpd_epu64, __m256i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundph_epi32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_pd, __m256d, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_ps, __m256, __mmask8, __m128i, 8) -test_2 (_mm256_maskz_cvtx_roundph_ps, __m256, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu64, __m256i, __mmask8, __m128h, 8) test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8) test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8) test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8) @@ -1109,13 +1095,6 @@ test_3 (_mm256_mask_cvt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 9) test_3 (_mm256_mask_cvt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 9) test_3 (_mm256_mask_cvt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 9) test_3 (_mm256_mask_cvt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundph_epi32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_pd, __m256d, __m256d, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_ps, __m256, __m256, __mmask8, __m128i, 8) -test_3 (_mm256_mask_cvtx_roundph_ps, __m256, __m256, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu64, __m256i, __m256i, __mmask8, __m128h, 8) test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8) test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8) test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8) diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c index 773ee5227fa..ec6dde25105 100644 --- a/gcc/testsuite/gcc.target/i386/sse-23.c +++ b/gcc/testsuite/gcc.target/i386/sse-23.c @@ -839,13 +839,6 @@ #define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8) #define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8) #define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, 8) /* avx10_2-512mediaintrin.h */ #define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)