rs6000-c: The return type of the following built-in functions was implemented as int not...
gcc/ChangeLog: 2017-06-07 Carl Love <cel@us.ibm.com> * config/rs6000/rs6000-c: The return type of the following built-in functions was implemented as int not long long. Fix sign of return value for the unsigned version of vec_mulo and vec_mule. vector unsigned long long vec_bperm (vector unsigned long long, vector unsigned char) vector signed long long vec_mule (vector signed int, vector signed int) vector unsigned long long vec_mule (vector unsigned int, vector unsigned int) vector signed long long vec_mulo (vector signed int, vector signed int) vector unsigned long long vec_mulo (vector unsigned int, vector unsigned int) * doc/extend.texi: Fix the documentation for the built-in functions. gcc/testsuite/ChangeLog: 2017-06-07 Carl Love <cel@us.ibm.com> * gcc.target/powerpc/builtins-3.c: Fix vec_mule, vec_mulo test cases. --- From-SVN: r248998
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Carl Love
Carl Love
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989cc652ee
5 changed files with 51 additions and 25 deletions
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@ -1,3 +1,21 @@
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2017-06-07 Carl Love <cel@us.ibm.com>
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* config/rs6000/rs6000-c: The return type of the following
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built-in functions was implemented as int not long long. Fix sign
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of return value for the unsigned version of vec_mulo and vec_mule.
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vector unsigned long long vec_bperm (vector unsigned long long,
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vector unsigned char)
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vector signed long long vec_mule (vector signed int,
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vector signed int)
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vector unsigned long long vec_mule (vector unsigned int,
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vector unsigned int)
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vector signed long long vec_mulo (vector signed int,
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vector signed int)
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vector unsigned long long vec_mulo (vector unsigned int,
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vector unsigned int)
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* doc/extend.texi: Fix the documentation for the built-in
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functions.
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2017-06-07 Carl Love <cel@us.ibm.com>
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PR target/80982
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@ -2208,9 +2208,9 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH,
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RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
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{ ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH,
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RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH,
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RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
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RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUH,
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RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI,
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RS6000_BTI_unsigned_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VMULEUB, ALTIVEC_BUILTIN_VMULEUB,
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RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
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@ -2227,9 +2227,9 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH,
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RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
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{ ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH,
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RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH,
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RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
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RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH,
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RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI,
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RS6000_BTI_unsigned_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH,
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RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
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@ -16345,10 +16345,10 @@ vector signed short vec_mule (vector signed char,
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vector unsigned int vec_mule (vector unsigned short,
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vector unsigned short);
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vector signed int vec_mule (vector signed short, vector signed short);
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vector unsigned int vec_mule (vector unsigned int,
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vector unsigned int);
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vector signed int vec_mule (vector signed int,
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vector signed int);
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vector unsigned long long vec_mule (vector unsigned int,
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vector unsigned int);
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vector signed long long vec_mule (vector signed int,
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vector signed int);
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vector signed int vec_vmulesh (vector signed short,
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vector signed short);
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@ -16368,7 +16368,10 @@ vector signed short vec_mulo (vector signed char, vector signed char);
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vector unsigned int vec_mulo (vector unsigned short,
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vector unsigned short);
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vector signed int vec_mulo (vector signed short, vector signed short);
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vector unsigned int vec_mulo (vector unsigned short, vector unsigned short);
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vector unsigned long long vec_mulo (vector unsigned int,
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vector unsigned int);
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vector signed long long vec_mulo (vector signed int,
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vector signed int);
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vector signed int vec_vmulosh (vector signed short,
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vector signed short);
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@ -1,3 +1,6 @@
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2017-06-07 Carl Love <cel@us.ibm.com>
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* gcc.target/powerpc/builtins-3.c: Fix vec_mule, vec_mulo test cases.
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2017-06-07 Jonathan Wakely <jwakely@redhat.com>
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PR c++/80990
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@ -112,26 +112,26 @@ test_vull_slo_vull_vuc (vector unsigned long long x, vector unsigned char y)
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return vec_slo (x, y);
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}
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vector signed int
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test_vsi_mule_vsi_vsi (vector signed int x, vector signed int y)
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vector signed long long
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test_vsll_mule_vsi_vsi (vector signed int x, vector signed int y)
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{
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return vec_mule (x, y);
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}
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vector unsigned int
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test_vui_mule_vui_vui (vector unsigned int x, vector unsigned int y)
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vector unsigned long long
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test_vull_mule_vui_vui (vector unsigned int x, vector unsigned int y)
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{
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return vec_mule (x, y);
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}
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vector signed int
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test_vsi_mulo_vsi_vsi (vector signed int x, vector signed int y)
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vector signed long long
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test_vsll_mulo_vsi_vsi (vector signed int x, vector signed int y)
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{
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return vec_mulo (x, y);
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}
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vector unsigned int
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test_vui_mulo_vui_vui (vector unsigned int x, vector unsigned int y)
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vector unsigned long long
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test_vull_mulo_vui_vui (vector unsigned int x, vector unsigned int y)
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{
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return vec_mulo (x, y);
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}
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@ -207,10 +207,10 @@ test_vul_sldw_vul_vul (vector unsigned long long x,
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test_vsll_slo_vsll_vuc 1 vslo
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test_vull_slo_vsll_vsc 1 vslo
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test_vull_slo_vsll_vuc 1 vslo
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test_vsi_mulo_vsi_vsi 1 vmulosh
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test_vui_mulo_vui_vui 1 vmulosh
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test_vsi_mule_vsi_vsi 1 vmulesh
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test_vui_mule_vui_vui 1 vmulesh
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test_vsll_mulo_vsi_vsi 1 vmulosh
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test_vull_mulo_vui_vui 1 vmulouh
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test_vsll_mule_vsi_vsi 1 vmulesh
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test_vull_mule_vui_vui 1 vmuleuh
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test_vsc_mulo_vsc_vsc 1 xxsldwi
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test_vuc_mulo_vuc_vuc 1 xxsldwi
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test_vssi_mulo_vssi_vssi 1 xxsldwi
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@ -236,6 +236,8 @@ test_vul_sldw_vul_vul (vector unsigned long long x,
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/* { dg-final { scan-assembler-times "xvnegsp" 1 } } */
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/* { dg-final { scan-assembler-times "xvnegdp" 1 } } */
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/* { dg-final { scan-assembler-times "vslo" 4 } } */
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/* { dg-final { scan-assembler-times "vmulosh" 2 } } */
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/* { dg-final { scan-assembler-times "vmulesh" 2 } } */
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/* { dg-final { scan-assembler-times "vmulosh" 1 } } */
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/* { dg-final { scan-assembler-times "vmulouh" 1 } } */
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/* { dg-final { scan-assembler-times "vmulesh" 1 } } */
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/* { dg-final { scan-assembler-times "vmuleuh" 1 } } */
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/* { dg-final { scan-assembler-times "xxsldwi" 8 } } */
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