Enable VNNI support [1/5]
gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VNNI_SET, OPTION_MASK_ISA_AVX512VNNI_UNSET): New. (ix86_handle_option): Handle -mavx512vnni. * config/i386/cpuid.h (bit_AVX512VNNI): New bit. * config/i386/driver-i386.c (host_detect_local_cpu): Handle new bit. * config/i386/i386-c (__AVX512VNNI__): New. * config/i386/i386.c (ix86_target_string): Handle new option. (ix86_valid_target_attribute_inner_p): Handle new option. * config/i386/i386.h (TARGET_AVX512VNNI, TARGET_AVX512VNNI_P): New. * config/i386/i386.opt (mavx512vnni): New option. From-SVN: r255401
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ae4bb13f0d
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8 changed files with 45 additions and 1 deletions
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@ -1,3 +1,16 @@
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2017-12-05 Julia Koval <julia.koval@intel.com>
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* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VNNI_SET,
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OPTION_MASK_ISA_AVX512VNNI_UNSET): New.
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(ix86_handle_option): Handle -mavx512vnni.
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* config/i386/cpuid.h (bit_AVX512VNNI): New bit.
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* config/i386/driver-i386.c (host_detect_local_cpu): Handle new bit.
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* config/i386/i386-c (__AVX512VNNI__): New.
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* config/i386/i386.c (ix86_target_string): Handle new option.
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(ix86_valid_target_attribute_inner_p): Handle new option.
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* config/i386/i386.h (TARGET_AVX512VNNI, TARGET_AVX512VNNI_P): New.
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* config/i386/i386.opt (mavx512vnni): New option.
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2017-12-01 Jan Hubicka <hubicka@ucw.cz>
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PR target/81616
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@ -81,6 +81,7 @@ along with GCC; see the file COPYING3. If not see
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#define OPTION_MASK_ISA_AVX5124FMAPS_SET OPTION_MASK_ISA_AVX5124FMAPS
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#define OPTION_MASK_ISA_AVX5124VNNIW_SET OPTION_MASK_ISA_AVX5124VNNIW
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#define OPTION_MASK_ISA_AVX512VBMI2_SET OPTION_MASK_ISA_AVX512VBMI2
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#define OPTION_MASK_ISA_AVX512VNNI_SET OPTION_MASK_ISA_AVX512VNNI
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#define OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET OPTION_MASK_ISA_AVX512VPOPCNTDQ
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#define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
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#define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
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@ -193,6 +194,7 @@ along with GCC; see the file COPYING3. If not see
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#define OPTION_MASK_ISA_AVX5124FMAPS_UNSET OPTION_MASK_ISA_AVX5124FMAPS
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#define OPTION_MASK_ISA_AVX5124VNNIW_UNSET OPTION_MASK_ISA_AVX5124VNNIW
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#define OPTION_MASK_ISA_AVX512VBMI2_UNSET OPTION_MASK_ISA_AVX512VBMI2
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#define OPTION_MASK_ISA_AVX512VNNI_UNSET OPTION_MASK_ISA_AVX512VNNI
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#define OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET OPTION_MASK_ISA_AVX512VPOPCNTDQ
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#define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM
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#define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW
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@ -582,6 +584,21 @@ ix86_handle_option (struct gcc_options *opts,
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}
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return true;
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case OPT_mavx512vnni:
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if (value)
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{
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opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512VNNI_SET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VNNI_SET;
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opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512F_SET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512F_SET;
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}
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else
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{
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opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX512VNNI_UNSET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VNNI_UNSET;
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}
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return true;
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case OPT_mavx512vpopcntdq:
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if (value)
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{
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@ -100,6 +100,7 @@
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#define bit_AVX512VBMI2 (1 << 6)
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#define bit_SHSTK (1 << 7)
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#define bit_GFNI (1 << 8)
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#define bit_AVX512VNNI (1 << 11)
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#define bit_AVX512VPOPCNTDQ (1 << 14)
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#define bit_RDPID (1 << 22)
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@ -417,6 +417,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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unsigned int has_avx5124fmaps = 0, has_avx5124vnniw = 0;
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unsigned int has_gfni = 0, has_avx512vbmi2 = 0;
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unsigned int has_ibt = 0, has_shstk = 0;
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unsigned int has_avx512vnni = 0;
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bool arch;
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@ -506,6 +507,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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has_avx512vbmi = ecx & bit_AVX512VBMI;
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has_pku = ecx & bit_OSPKE;
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has_avx512vbmi2 = ecx & bit_AVX512VBMI2;
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has_avx512vnni = ecx & bit_AVX512VNNI;
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has_rdpid = ecx & bit_RDPID;
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has_gfni = ecx & bit_GFNI;
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@ -1064,6 +1066,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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const char *avx512vbmi = has_avx512vbmi ? " -mavx512vbmi" : " -mno-avx512vbmi";
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const char *avx5124vnniw = has_avx5124vnniw ? " -mavx5124vnniw" : " -mno-avx5124vnniw";
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const char *avx512vbmi2 = has_avx512vbmi2 ? " -mavx512vbmi2" : " -mno-avx512vbmi2";
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const char *avx512vnni = has_avx512vnni ? " -mavx512vnni" : " -mno-avx512vnni";
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const char *avx5124fmaps = has_avx5124fmaps ? " -mavx5124fmaps" : " -mno-avx5124fmaps";
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const char *clwb = has_clwb ? " -mclwb" : " -mno-clwb";
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const char *mwaitx = has_mwaitx ? " -mmwaitx" : " -mno-mwaitx";
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@ -1083,7 +1086,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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xsavec, xsaves, avx512dq, avx512bw, avx512vl,
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avx512ifma, avx512vbmi, avx5124fmaps, avx5124vnniw,
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clwb, mwaitx, clzero, pku, rdpid, gfni, ibt, shstk,
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avx512vbmi2, NULL);
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avx512vbmi2, avx512vnni, NULL);
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}
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done:
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@ -394,6 +394,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
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def_or_undef (parse_in, "__AVX5124VNNIW__");
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if (isa_flag2 & OPTION_MASK_ISA_AVX512VBMI2)
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def_or_undef (parse_in, "__AVX512VBMI2__");
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if (isa_flag2 & OPTION_MASK_ISA_AVX512VNNI)
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def_or_undef (parse_in, "__AVX512VNNI__");
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if (isa_flag2 & OPTION_MASK_ISA_SGX)
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def_or_undef (parse_in, "__SGX__");
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if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS)
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@ -2747,6 +2747,7 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
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{
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{ "-mmpx", OPTION_MASK_ISA_MPX },
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{ "-mavx512vbmi2", OPTION_MASK_ISA_AVX512VBMI2 },
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{ "-mavx512vnni", OPTION_MASK_ISA_AVX512VNNI },
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{ "-mrdpid", OPTION_MASK_ISA_RDPID },
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{ "-msgx", OPTION_MASK_ISA_SGX },
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{ "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW },
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@ -5256,6 +5257,7 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[],
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IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw),
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IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq),
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IX86_ATTR_ISA ("avx512vbmi2", OPT_mavx512vbmi2),
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IX86_ATTR_ISA ("avx512vnni", OPT_mavx512vnni),
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IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
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IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
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@ -89,6 +89,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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#define TARGET_AVX512VBMI2_P(x) TARGET_ISA_AVX512VBMI2_P(x)
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#define TARGET_AVX512VPOPCNTDQ TARGET_ISA_AVX512VPOPCNTDQ
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#define TARGET_AVX512VPOPCNTDQ_P(x) TARGET_ISA_AVX512VPOPCNTDQ_P(x)
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#define TARGET_AVX512VNNI TARGET_ISA_AVX512VNNI
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#define TARGET_AVX512VNNI_P(x) TARGET_ISA_AVX512VNNI_P(x)
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#define TARGET_FMA TARGET_ISA_FMA
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#define TARGET_FMA_P(x) TARGET_ISA_FMA_P(x)
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#define TARGET_SSE4A TARGET_ISA_SSE4A
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@ -741,6 +741,10 @@ mavx512vbmi2
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Target Report Mask(ISA_AVX512VBMI2) Var(ix86_isa_flags2) Save
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Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation.
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mavx512vnni
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Target Report Mask(ISA_AVX512VNNI) Var(ix86_isa_flags2) Save
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Support AVX512VNNI built-in functions and code generation.
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mfma
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Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
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Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation.
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