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re PR target/88418 (ICE in extract_insn, at recog.c:2305 (error: unrecognizable insn))

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PR target/88418
	* config/i386/i386.c (ix86_expand_sse_cmp): For vector modes,
	check operand 1 with vector_operand predicate.
	(ix86_expand_sse_movcc): For vector modes, check op_true with
	vector_operand, not nonimmediate_operand.

testsuite/ChangeLog:

	PR target/88418
	* gcc.target/i386/pr88418.c: New test.

From-SVN: r266958
This commit is contained in:
Uros Bizjak 2018-12-10 16:47:16 +01:00
parent 87e4fbdd9a
commit 98900a0664
4 changed files with 39 additions and 8 deletions
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8
gcc/ChangeLog
View file

@ -1,3 +1,11 @@
2018-12-10 Uros Bizjak <ubizjak@gmail.com>
PR target/88418
* config/i386/i386.c (ix86_expand_sse_cmp): For vector modes,
check operand 1 with vector_operand predicate.
(ix86_expand_sse_movcc): For vector modes, check op_true with
vector_operand, not nonimmediate_operand.
2018-12-10 Richard Biener <rguenther@suse.de>
* tree-affine.c (tree_to_aff_combination): Remove unreachable

11
gcc/config/i386/i386.c
View file

@ -23483,7 +23483,7 @@ ix86_expand_sse_fp_minmax (rtx dest, enum rtx_code code, rtx cmp_op0,
return true;
}
/* Expand an sse vector comparison. Return the register with the result. */
/* Expand an SSE comparison. Return the register with the result. */
static rtx
ix86_expand_sse_cmp (rtx dest, enum rtx_code code, rtx cmp_op0, rtx cmp_op1,
@ -23508,9 +23508,12 @@ ix86_expand_sse_cmp (rtx dest, enum rtx_code code, rtx cmp_op0, rtx cmp_op1,
else
cmp_mode = cmp_ops_mode;
cmp_op0 = force_reg (cmp_ops_mode, cmp_op0);
if (!nonimmediate_operand (cmp_op1, cmp_ops_mode))
int (*op1_predicate)(rtx, machine_mode)
= VECTOR_MODE_P (cmp_ops_mode) ? vector_operand : nonimmediate_operand;
if (!op1_predicate (cmp_op1, cmp_ops_mode))
cmp_op1 = force_reg (cmp_ops_mode, cmp_op1);
if (optimize
@ -23627,7 +23630,7 @@ ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_true, rtx op_false)
rtx (*gen) (rtx, rtx, rtx, rtx) = NULL;
rtx d = dest;
if (!nonimmediate_operand (op_true, mode))
if (!vector_operand (op_true, mode))
op_true = force_reg (mode, op_true);
op_false = force_reg (mode, op_false);

13
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2018-12-10 Uros Bizjak <ubizjak@gmail.com>
PR target/88418
* gcc.target/i386/pr88418.c: New test.
2018-12-10 Richard Biener <rguenther@suse.de>
PR tree-optimization/88427
@ -20,7 +25,7 @@
* gcc.dg/vect/vect-ivdep-2.c: Likewise.
* gcc.dg/vect/nodump-vect-opt-info-1.c: Likewise.
* g++.dg/vect/pr33426-ivdep.cc: Likewise.
* g++.dg/vect/pr33426-ivdep-2.cc: Likewise.
* g++.dg/vect/pr33426-ivdep-2.cc: Likewise.
* g++.dg/vect/pr33426-ivdep-3.cc: Likewise.
* g++.dg/vect/pr33426-ivdep-4.cc: Likewise.
@ -254,7 +259,7 @@
* gcc.dg/tree-ssa/ssa-dom-thread-7.c: Skip the post switch conversion
tests on aarch64.
* gcc.dg/tree-ssa/pr77445-2.c: Similarly.
2018-12-06 David Malcolm <dmalcolm@redhat.com>
PR c++/85110
@ -940,8 +945,8 @@
* lib/target-supports.exp
(check_effective_target_logical_op_short_circuit): Add msp430.
(check_effective_target_int_eq_float): New.
(check_effective_target_ptr_eq_long): New.
(check_effective_target_int_eq_float): New.
(check_effective_target_ptr_eq_long): New.
* c-c++-common/pr41779.c: Require int_eq_float for dg-warning tests.
* c-c++-common/pr57371-2.c: XFAIL optimized dump scan when
sizeof (float) != sizeof (int).

15
gcc/testsuite/gcc.target/i386/pr88418.c Normal file
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@ -0,0 +1,15 @@
/* PR target/88418 */
/* { dg-do compile } */
/* { dg-options "-O1 -fpack-struct -msse4.1" } */
typedef long long v2di __attribute__ ((__vector_size__ (16)));
union df {
v2di se[2];
};
void
qg (union df *jz, union df *pl)
{
jz->se[0] = jz->se[0] == pl->se[0];
}