From 9846b0916c1a9b9f3e9df4657670ef4419617134 Mon Sep 17 00:00:00 2001 From: mayshao Date: Thu, 18 Jul 2024 22:43:00 +0200 Subject: [PATCH] libatomic: Handle AVX+CX16 ZHAOXIN like Intel for 16b atomic [PR104688] PR target/104688 libatomic/ChangeLog: * config/x86/init.c (__libat_feat1_init): Don't clear bit_AVX on ZHAOXIN CPUs. --- libatomic/config/x86/init.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/libatomic/config/x86/init.c b/libatomic/config/x86/init.c index 26168d46832..c6ce997a5af 100644 --- a/libatomic/config/x86/init.c +++ b/libatomic/config/x86/init.c @@ -41,11 +41,15 @@ __libat_feat1_init (void) { /* Intel SDM guarantees that 16-byte VMOVDQA on 16-byte aligned address is atomic, and AMD is going to do something similar soon. - We don't have a guarantee from vendors of other CPUs with AVX, - like Zhaoxin and VIA. */ + Zhaoxin also guarantees this. We don't have a guarantee + from vendors of other CPUs with AVX, like VIA. */ + unsigned int family = (eax >> 8) & 0x0f; unsigned int ecx2; __cpuid (0, eax, ebx, ecx2, edx); - if (ecx2 != signature_INTEL_ecx && ecx2 != signature_AMD_ecx) + if (ecx2 != signature_INTEL_ecx + && ecx2 != signature_AMD_ecx + && !(ecx2 == signature_CENTAUR_ecx && family > 6) + && ecx2 != signature_SHANGHAI_ecx) FEAT1_REGISTER &= ~bit_AVX; } #endif