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config.gcc: Delete stanza for arm-semi-aof and armel-semi-aof targets.

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* config.gcc: Delete stanza for arm-semi-aof and
	armel-semi-aof targets.
	* config/arm/arm-protos.h
	* config/arm/arm.c
	* config/arm/arm.h: Delete all #ifdef AOF_ASSEMBLER blocks;
	make all #ifndef AOF_ASSEMBLER blocks unconditional.  Also
	delete aof_pic_label and remove mention of AOF in comments.
	* config/arm/arm.md: Delete patterns used only for AOF assembly.
	* config/arm/aof.h
	* config/arm/semiaof.h
	* config/arm/t-semi: Delete file.

From-SVN: r128052
This commit is contained in:
Zack Weinberg 2007-09-03 17:11:32 +00:00 • committed by Zack Weinberg
parent b1d5455a5e
commit 96a3900df6
9 changed files with 16 additions and 760 deletions
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14
gcc/ChangeLog
View file

@ -1,3 +1,17 @@
2007-09-03 Zack Weinberg <zack@codesourcery.com>
* config.gcc: Delete stanza for arm-semi-aof and
armel-semi-aof targets.
* config/arm/arm-protos.h
* config/arm/arm.c
* config/arm/arm.h: Delete all #ifdef AOF_ASSEMBLER blocks;
make all #ifndef AOF_ASSEMBLER blocks unconditional. Also
delete aof_pic_label and remove mention of AOF in comments.
* config/arm/arm.md: Delete patterns used only for AOF assembly.
* config/arm/aof.h
* config/arm/semiaof.h
* config/arm/t-semi: Delete file.
2007-09-03 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* system.h (CONST_CAST2, CONST_CAST_TREE, CONST_CAST_RTX,

4
gcc/config.gcc
View file

@ -700,10 +700,6 @@ arm-*-coff* | armel-*-coff*)
tm_file="arm/semi.h arm/aout.h arm/arm.h arm/coff.h dbxcoff.h"
tmake_file="arm/t-arm arm/t-arm-coff"
;;
arm-semi-aof | armel-semi-aof)
tm_file="arm/semiaof.h arm/aof.h arm/arm.h"
tmake_file="arm/t-arm arm/t-semi"
;;
arm-wrs-vxworks)
tm_file="elfos.h arm/elf.h arm/aout.h ${tm_file} vx-common.h vxworks.h arm/vxworks.h"
tmake_file="${tmake_file} arm/t-arm arm/t-vxworks"

339
gcc/config/arm/aof.h
View file

@ -1,339 +0,0 @@
/* Definitions of target machine for GNU compiler, for Advanced RISC Machines
ARM compilation, AOF Assembler.
Copyright (C) 1995, 1996, 1997, 2000, 2003, 2004, 2007
Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rearnsha@armltd.co.uk)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#define AOF_ASSEMBLER
#define LINK_LIBGCC_SPECIAL 1
#define LINK_SPEC "%{aof} %{bin} %{aif} %{ihf} %{shl,*} %{reent*} %{split} \
%{ov*} %{reloc*} -nodebug"
#define STARTFILE_SPEC "crtbegin.o%s"
#define ENDFILE_SPEC "crtend.o%s"
#ifndef ASM_SPEC
#define ASM_SPEC "%{g -g} -arch 4 -apcs 3/32bit"
#endif
#ifndef LIB_SPEC
#define LIB_SPEC "%{Eb: armlib_h.32b%s}%{!Eb: armlib_h.32l%s}"
#endif
#define LIBGCC_SPEC "libgcc.a%s"
#define CTOR_LIST_BEGIN \
asm (CTORS_SECTION_ASM_OP); \
extern func_ptr __CTOR_END__[1]; \
func_ptr __CTOR_LIST__[1] = {__CTOR_END__};
#define CTOR_LIST_END \
asm (CTORS_SECTION_ASM_OP); \
func_ptr __CTOR_END__[1] = { (func_ptr) 0 };
#define DO_GLOBAL_CTORS_BODY \
do \
{ \
func_ptr *ptr = __CTOR_LIST__ + 1; \
\
while (*ptr) \
(*ptr++) (); \
} \
while (0)
#define DTOR_LIST_BEGIN \
asm (DTORS_SECTION_ASM_OP); \
extern func_ptr __DTOR_END__[1]; \
func_ptr __DTOR_LIST__[1] = {__DTOR_END__};
#define DTOR_LIST_END \
asm (DTORS_SECTION_ASM_OP); \
func_ptr __DTOR_END__[1] = { (func_ptr) 0 };
#define DO_GLOBAL_DTORS_BODY \
do \
{ \
func_ptr *ptr = __DTOR_LIST__ + 1; \
\
while (*ptr) \
(*ptr++) (); \
} \
while (0)
/* We really want to put Thumb tables in a read-only data section, but
switching to another section during function output is not
possible. We could however do what the SPARC does and defer the
whole table generation until the end of the function. */
#define JUMP_TABLES_IN_TEXT_SECTION 1
#define TARGET_ASM_INIT_SECTIONS aof_asm_init_sections
/* Some systems use __main in a way incompatible with its use in gcc, in these
cases use the macros NAME__MAIN to give a quoted symbol and SYMBOL__MAIN to
give the same symbol without quotes for an alternative entry point. You
must define both, or neither. */
#define NAME__MAIN "__gccmain"
#define SYMBOL__MAIN __gccmain
#define ASM_COMMENT_START ";"
#define ASM_APP_ON ""
#define ASM_APP_OFF ""
#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
{ \
int i; \
const char *ptr = (PTR); \
fprintf ((STREAM), "\tDCB"); \
for (i = 0; i < (long)(LEN); i++) \
fprintf ((STREAM), " &%02x%s", \
(unsigned ) *(ptr++), \
(i + 1 < (long)(LEN) \
? ((i & 3) == 3 ? "\n\tDCB" : ",") \
: "\n")); \
}
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '\n')
/* Output of Uninitialized Variables. */
#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
(in_section = NULL, \
fprintf ((STREAM), "\tAREA "), \
assemble_name ((STREAM), (NAME)), \
fprintf ((STREAM), ", DATA, COMMON\n\t%% %d\t%s size=%d\n", \
(int)(ROUNDED), ASM_COMMENT_START, (int)(SIZE)))
#define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
(zero_init_section (), \
assemble_name ((STREAM), (NAME)), \
fprintf ((STREAM), "\n"), \
fprintf ((STREAM), "\t%% %d\t%s size=%d\n", \
(int)(ROUNDED), ASM_COMMENT_START, (int)(SIZE)))
/* Output and Generation of Labels */
extern int arm_main_function;
/* Globalizing directive for a label. */
#define GLOBAL_ASM_OP "\tEXPORT\t"
#define ASM_OUTPUT_LABEL(STREAM,NAME) \
do { \
assemble_name (STREAM,NAME); \
fputs ("\n", STREAM); \
} while (0)
#define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
{ \
if (TARGET_POKE_FUNCTION_NAME) \
arm_poke_function_name ((STREAM), (NAME)); \
ASM_OUTPUT_LABEL (STREAM, NAME); \
if (! TREE_PUBLIC (DECL)) \
{ \
fputs ("\tKEEP ", STREAM); \
ASM_OUTPUT_LABEL (STREAM, NAME); \
} \
aof_delete_import ((NAME)); \
}
#define ASM_DECLARE_OBJECT_NAME(STREAM,NAME,DECL) \
{ \
ASM_OUTPUT_LABEL (STREAM, NAME); \
if (! TREE_PUBLIC (DECL)) \
{ \
fputs ("\tKEEP ", STREAM); \
ASM_OUTPUT_LABEL (STREAM, NAME); \
} \
aof_delete_import ((NAME)); \
}
#define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \
aof_add_import ((NAME))
#define ASM_OUTPUT_EXTERNAL_LIBCALL(STREAM,SYMREF) \
(fprintf ((STREAM), "\tIMPORT\t"), \
assemble_name ((STREAM), XSTR ((SYMREF), 0)), \
fputc ('\n', (STREAM)))
#define ASM_OUTPUT_LABELREF(STREAM,NAME) \
fprintf ((STREAM), "|%s|", NAME)
#define ASM_GENERATE_INTERNAL_LABEL(STRING,PREFIX,NUM) \
sprintf ((STRING), "*|%s..%ld|", (PREFIX), (long)(NUM))
/* How initialization functions are handled. */
#define CTORS_SECTION_ASM_OP "\tAREA\t|C$$gnu_ctorsvec|, DATA, READONLY"
#define DTORS_SECTION_ASM_OP "\tAREA\t|C$$gnu_dtorsvec|, DATA, READONLY"
/* Output of Assembler Instructions. Note that the ?xx registers are
there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
(each of which is overlaid on two S registers), although there are no
actual single-precision registers which correspond to D16-D31. */
#define REGISTER_NAMES \
{ \
"a1", "a2", "a3", "a4", \
"v1", "v2", "v3", "v4", \
"v5", "v6", "sl", "fp", \
"ip", "sp", "lr", "pc", \
"f0", "f1", "f2", "f3", \
"f4", "f5", "f6", "f7", \
"cc", "sfp", "afp", \
"mv0", "mv1", "mv2", "mv3", \
"mv4", "mv5", "mv6", "mv7", \
"mv8", "mv9", "mv10", "mv11", \
"mv12", "mv13", "mv14", "mv15", \
"wcgr0", "wcgr1", "wcgr2", "wcgr3", \
"wr0", "wr1", "wr2", "wr3", \
"wr4", "wr5", "wr6", "wr7", \
"wr8", "wr9", "wr10", "wr11", \
"wr12", "wr13", "wr14", "wr15", \
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
"s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", \
"s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
"s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
"d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
"d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
"d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
"d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
"vfpcc" \
}
#define ADDITIONAL_REGISTER_NAMES \
{ \
{"r0", 0}, {"a1", 0}, \
{"r1", 1}, {"a2", 1}, \
{"r2", 2}, {"a3", 2}, \
{"r3", 3}, {"a4", 3}, \
{"r4", 4}, {"v1", 4}, \
{"r5", 5}, {"v2", 5}, \
{"r6", 6}, {"v3", 6}, \
{"r7", 7}, {"wr", 7}, \
{"r8", 8}, {"v5", 8}, \
{"r9", 9}, {"v6", 9}, \
{"r10", 10}, {"sl", 10}, {"v7", 10}, \
{"r11", 11}, {"fp", 11}, \
{"r12", 12}, {"ip", 12}, \
{"r13", 13}, {"sp", 13}, \
{"r14", 14}, {"lr", 14}, \
{"r15", 15}, {"pc", 15}, \
{"d0", 63}, {"q0", 63}, \
{"d1", 65}, \
{"d2", 67}, {"q1", 67}, \
{"d3", 69}, \
{"d4", 71}, {"q2", 71}, \
{"d5", 73}, \
{"d6", 75}, {"q3", 75}, \
{"d7", 77}, \
{"d8", 79}, {"q4", 79}, \
{"d9", 81}, \
{"d10", 83}, {"q5", 83}, \
{"d11", 85}, \
{"d12", 87}, {"q6", 87}, \
{"d13", 89}, \
{"d14", 91}, {"q7", 91}, \
{"d15", 93}, \
{"q8", 95}, \
{"q9", 99}, \
{"q10", 103}, \
{"q11", 107}, \
{"q12", 111}, \
{"q13", 115}, \
{"q14", 119}, \
{"q15", 123} \
}
#define REGISTER_PREFIX "__"
#define USER_LABEL_PREFIX ""
#define LOCAL_LABEL_PREFIX ""
/* AOF does not prefix user function names with an underscore. */
#define ARM_MCOUNT_NAME "_mcount"
/* Output of Dispatch Tables. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
do \
{ \
if (TARGET_ARM) \
fprintf ((STREAM), "\tb\t|L..%d|\n", (VALUE)); \
else if (TARGET_THUMB1) \
fprintf ((STREAM), "\tDCD\t|L..%d| - |L..%d|\n", (VALUE), (REL)); \
else /* Thumb-2 */ \
{ \
switch (GET_MODE(body)) \
{ \
case QImode: /* TBB */ \
asm_fprintf (STREAM, "\tDCB\t(|L..%d| - |L..%d|)/2\n", \
VALUE, REL); \
break; \
case HImode: /* TBH */ \
asm_fprintf (STREAM, "\tDCW\t|L..%d| - |L..%d|)/2\n", \
VALUE, REL); \
break; \
case SImode: \
if (flag_pic) \
asm_fprintf (STREAM, "\tDCD\t|L..%d| + 1 - |L..%d|\n", \
VALUE, REL); \
else \
asm_fprintf (STREAM, "\tDCD\t|L..%d| + 1\n", VALUE); \
break; \
default: \
gcc_unreachable(); \
} \
} \
} \
while (0)
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
do \
{ \
gcc_assert (!TARGET_THUMB2) \
fprintf ((STREAM), "\tDCD\t|L..%d|\n", (VALUE)) \
} \
while (0)
/* A label marking the start of a jump table is a data label. */
#define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
fprintf ((STREAM), "\tALIGN\n|%s..%d|\n", (PREFIX), (NUM))
/* Assembler Commands for Alignment. */
#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
fprintf ((STREAM), "\t%%\t%d\n", (int) (NBYTES))
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
do \
{ \
int amount = 1 << (POWER); \
\
if (amount == 2) \
fprintf ((STREAM), "\tALIGN 2\n"); \
else if (amount == 4) \
fprintf ((STREAM), "\tALIGN\n"); \
else \
fprintf ((STREAM), "\tALIGN %d\n", amount); \
} \
while (0)
#undef DBX_DEBUGGING_INFO

7
gcc/config/arm/arm-protos.h
View file

@ -163,13 +163,6 @@ extern rtx arm_function_value(const_tree, const_tree);
#endif
extern int arm_apply_result_size (void);
#if defined AOF_ASSEMBLER
extern rtx aof_pic_entry (rtx);
extern void aof_add_import (const char *);
extern void aof_delete_import (const char *);
extern void zero_init_section (void);
#endif /* AOF_ASSEMBLER */
#endif /* RTX_CODE */
extern int arm_float_words_big_endian (void);

288
gcc/config/arm/arm.c
View file

@ -76,9 +76,7 @@ static unsigned long thumb1_compute_save_reg_mask (void);
static int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
static rtx emit_sfm (int, int);
static int arm_size_return_regs (void);
#ifndef AOF_ASSEMBLER
static bool arm_assemble_integer (rtx, unsigned int, int);
#endif
static const char *fp_const_from_val (REAL_VALUE_TYPE *);
static arm_cc get_arm_condition_code (rtx);
static HOST_WIDE_INT int_log2 (HOST_WIDE_INT);
@ -158,14 +156,6 @@ static void arm_encode_section_info (tree, rtx, int);
static void arm_file_end (void);
static void arm_file_start (void);
#ifdef AOF_ASSEMBLER
static void aof_globalize_label (FILE *, const char *);
static void aof_dump_imports (FILE *);
static void aof_dump_pic_table (FILE *);
static void aof_file_start (void);
static void aof_file_end (void);
static void aof_asm_init_sections (void);
#endif
static void arm_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode,
tree, int *, int);
static bool arm_pass_by_reference (CUMULATIVE_ARGS *,
@ -213,25 +203,10 @@ static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
#undef TARGET_ASM_FILE_END
#define TARGET_ASM_FILE_END arm_file_end
#ifdef AOF_ASSEMBLER
#undef TARGET_ASM_BYTE_OP
#define TARGET_ASM_BYTE_OP "\tDCB\t"
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\tDCW\t"
#undef TARGET_ASM_ALIGNED_SI_OP
#define TARGET_ASM_ALIGNED_SI_OP "\tDCD\t"
#undef TARGET_ASM_GLOBALIZE_LABEL
#define TARGET_ASM_GLOBALIZE_LABEL aof_globalize_label
#undef TARGET_ASM_FILE_START
#define TARGET_ASM_FILE_START aof_file_start
#undef TARGET_ASM_FILE_END
#define TARGET_ASM_FILE_END aof_file_end
#else
#undef TARGET_ASM_ALIGNED_SI_OP
#define TARGET_ASM_ALIGNED_SI_OP NULL
#undef TARGET_ASM_INTEGER
#define TARGET_ASM_INTEGER arm_assemble_integer
#endif
#undef TARGET_ASM_FUNCTION_PROLOGUE
#define TARGET_ASM_FUNCTION_PROLOGUE arm_output_function_prologue
@ -3433,9 +3408,7 @@ legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
if (GET_CODE (orig) == SYMBOL_REF
|| GET_CODE (orig) == LABEL_REF)
{
#ifndef AOF_ASSEMBLER
rtx pic_ref, address;
#endif
rtx insn;
int subregs = 0;
@ -3450,11 +3423,6 @@ legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
subregs = 1;
}
#ifdef AOF_ASSEMBLER
/* The AOF assembler can generate relocations for these directly, and
understands that the PIC register has to be added into the offset. */
insn = emit_insn (gen_pic_load_addr_based (reg, orig));
#else
if (subregs)
address = gen_reg_rtx (Pmode);
else
@ -3487,7 +3455,7 @@ legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
}
insn = emit_move_insn (reg, pic_ref);
#endif
/* Put a REG_EQUAL note on this insn, so that it can be optimized
by loop. */
set_unique_reg_note (insn, REG_EQUAL, orig);
@ -3616,7 +3584,6 @@ static GTY(()) int pic_labelno;
void
arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED)
{
#ifndef AOF_ASSEMBLER
rtx l1, labelno, pic_tmp, pic_tmp2, pic_rtx, pic_reg;
rtx global_offset_table;
@ -3707,7 +3674,6 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED)
/* Need to emit this whether or not we obey regdecls,
since setjmp/longjmp can cause life info to screw up. */
emit_insn (gen_rtx_USE (VOIDmode, pic_reg));
#endif /* AOF_ASSEMBLER */
}
@ -9105,14 +9071,6 @@ push_minipool_fix (rtx insn, HOST_WIDE_INT address, rtx *loc,
{
Mfix * fix = (Mfix *) obstack_alloc (&minipool_obstack, sizeof (* fix));
#ifdef AOF_ASSEMBLER
/* PIC symbol references need to be converted into offsets into the
based area. */
/* XXX This shouldn't be done here. */
if (flag_pic && GET_CODE (value) == SYMBOL_REF)
value = aof_pic_entry (value);
#endif /* AOF_ASSEMBLER */
fix->insn = insn;
fix->address = address;
fix->loc = loc;
@ -11282,11 +11240,6 @@ arm_output_function_prologue (FILE *f, HOST_WIDE_INT frame_size)
if (current_function_calls_eh_return)
asm_fprintf (f, "\t@ Calls __builtin_eh_return.\n");
#ifdef AOF_ASSEMBLER
if (flag_pic)
asm_fprintf (f, "\tmov\t%r, %r\n", IP_REGNUM, PIC_OFFSET_TABLE_REGNUM);
#endif
return_used_this_function = 0;
}
@ -13115,7 +13068,6 @@ arm_print_operand (FILE *stream, rtx x, int code)
}
}
#ifndef AOF_ASSEMBLER
/* Target hook for assembling integer objects. The ARM version needs to
handle word-sized values specially. */
static bool
@ -13243,7 +13195,6 @@ arm_elf_asm_destructor (rtx symbol, int priority)
{
arm_elf_asm_cdtor (symbol, priority, /*is_ctor=*/false);
}
#endif
/* A finite state machine takes care of noticing whether or not instructions
can be conditionally executed, and thus decrease execution time and code
@ -17629,239 +17580,6 @@ arm_file_end (void)
}
}
rtx aof_pic_label;
#ifdef AOF_ASSEMBLER
/* Special functions only needed when producing AOF syntax assembler. */
struct pic_chain
{
struct pic_chain * next;
const char * symname;
};
static struct pic_chain * aof_pic_chain = NULL;
rtx
aof_pic_entry (rtx x)
{
struct pic_chain ** chainp;
int offset;
if (aof_pic_label == NULL_RTX)
{
aof_pic_label = gen_rtx_SYMBOL_REF (Pmode, "x$adcons");
}
for (offset = 0, chainp = &aof_pic_chain; *chainp;
offset += 4, chainp = &(*chainp)->next)
if ((*chainp)->symname == XSTR (x, 0))
return plus_constant (aof_pic_label, offset);
*chainp = (struct pic_chain *) xmalloc (sizeof (struct pic_chain));
(*chainp)->next = NULL;
(*chainp)->symname = XSTR (x, 0);
return plus_constant (aof_pic_label, offset);
}
void
aof_dump_pic_table (FILE *f)
{
struct pic_chain * chain;
if (aof_pic_chain == NULL)
return;
asm_fprintf (f, "\tAREA |%r$$adcons|, BASED %r\n",
PIC_OFFSET_TABLE_REGNUM,
PIC_OFFSET_TABLE_REGNUM);
fputs ("|x$adcons|\n", f);
for (chain = aof_pic_chain; chain; chain = chain->next)
{
fputs ("\tDCD\t", f);
assemble_name (f, chain->symname);
fputs ("\n", f);
}
}
int arm_text_section_count = 1;
/* A get_unnamed_section callback for switching to the text section. */
static void
aof_output_text_section_asm_op (const void *data ATTRIBUTE_UNUSED)
{
fprintf (asm_out_file, "\tAREA |C$$code%d|, CODE, READONLY",
arm_text_section_count++);
if (flag_pic)
fprintf (asm_out_file, ", PIC, REENTRANT");
fprintf (asm_out_file, "\n");
}
static int arm_data_section_count = 1;
/* A get_unnamed_section callback for switching to the data section. */
static void
aof_output_data_section_asm_op (const void *data ATTRIBUTE_UNUSED)
{
fprintf (asm_out_file, "\tAREA |C$$data%d|, DATA\n",
arm_data_section_count++);
}
/* Implement TARGET_ASM_INIT_SECTIONS.
AOF Assembler syntax is a nightmare when it comes to areas, since once
we change from one area to another, we can't go back again. Instead,
we must create a new area with the same attributes and add the new output
to that. Unfortunately, there is nothing we can do here to guarantee that
two areas with the same attributes will be linked adjacently in the
resulting executable, so we have to be careful not to do pc-relative
addressing across such boundaries. */
static void
aof_asm_init_sections (void)
{
text_section = get_unnamed_section (SECTION_CODE,
aof_output_text_section_asm_op, NULL);
data_section = get_unnamed_section (SECTION_WRITE,
aof_output_data_section_asm_op, NULL);
readonly_data_section = text_section;
}
void
zero_init_section (void)
{
static int zero_init_count = 1;
fprintf (asm_out_file, "\tAREA |C$$zidata%d|,NOINIT\n", zero_init_count++);
in_section = NULL;
}
/* The AOF assembler is religiously strict about declarations of
imported and exported symbols, so that it is impossible to declare
a function as imported near the beginning of the file, and then to
export it later on. It is, however, possible to delay the decision
until all the functions in the file have been compiled. To get
around this, we maintain a list of the imports and exports, and
delete from it any that are subsequently defined. At the end of
compilation we spit the remainder of the list out before the END
directive. */
struct import
{
struct import * next;
const char * name;
};
static struct import * imports_list = NULL;
void
aof_add_import (const char *name)
{
struct import * new;
for (new = imports_list; new; new = new->next)
if (new->name == name)
return;
new = (struct import *) xmalloc (sizeof (struct import));
new->next = imports_list;
imports_list = new;
new->name = name;
}
void
aof_delete_import (const char *name)
{
struct import ** old;
for (old = &imports_list; *old; old = & (*old)->next)
{
if ((*old)->name == name)
{
*old = (*old)->next;
return;
}
}
}
int arm_main_function = 0;
static void
aof_dump_imports (FILE *f)
{
/* The AOF assembler needs this to cause the startup code to be extracted
from the library. Brining in __main causes the whole thing to work
automagically. */
if (arm_main_function)
{
switch_to_section (text_section);
fputs ("\tIMPORT __main\n", f);
fputs ("\tDCD __main\n", f);
}
/* Now dump the remaining imports. */
while (imports_list)
{
fprintf (f, "\tIMPORT\t");
assemble_name (f, imports_list->name);
fputc ('\n', f);
imports_list = imports_list->next;
}
}
static void
aof_globalize_label (FILE *stream, const char *name)
{
default_globalize_label (stream, name);
if (! strcmp (name, "main"))
arm_main_function = 1;
}
static void
aof_file_start (void)
{
fputs ("__r0\tRN\t0\n", asm_out_file);
fputs ("__a1\tRN\t0\n", asm_out_file);
fputs ("__a2\tRN\t1\n", asm_out_file);
fputs ("__a3\tRN\t2\n", asm_out_file);
fputs ("__a4\tRN\t3\n", asm_out_file);
fputs ("__v1\tRN\t4\n", asm_out_file);
fputs ("__v2\tRN\t5\n", asm_out_file);
fputs ("__v3\tRN\t6\n", asm_out_file);
fputs ("__v4\tRN\t7\n", asm_out_file);
fputs ("__v5\tRN\t8\n", asm_out_file);
fputs ("__v6\tRN\t9\n", asm_out_file);
fputs ("__sl\tRN\t10\n", asm_out_file);
fputs ("__fp\tRN\t11\n", asm_out_file);
fputs ("__ip\tRN\t12\n", asm_out_file);
fputs ("__sp\tRN\t13\n", asm_out_file);
fputs ("__lr\tRN\t14\n", asm_out_file);
fputs ("__pc\tRN\t15\n", asm_out_file);
fputs ("__f0\tFN\t0\n", asm_out_file);
fputs ("__f1\tFN\t1\n", asm_out_file);
fputs ("__f2\tFN\t2\n", asm_out_file);
fputs ("__f3\tFN\t3\n", asm_out_file);
fputs ("__f4\tFN\t4\n", asm_out_file);
fputs ("__f5\tFN\t5\n", asm_out_file);
fputs ("__f6\tFN\t6\n", asm_out_file);
fputs ("__f7\tFN\t7\n", asm_out_file);
switch_to_section (text_section);
}
static void
aof_file_end (void)
{
if (flag_pic)
aof_dump_pic_table (asm_out_file);
arm_file_end ();
aof_dump_imports (asm_out_file);
fputs ("\tEND\n", asm_out_file);
}
#endif /* AOF_ASSEMBLER */
#ifndef ARM_PE
/* Symbols in the text segment can be accessed without indirecting via the
constant pool; it may take an extra binary operation, but this is still
@ -17872,12 +17590,8 @@ aof_file_end (void)
static void
arm_encode_section_info (tree decl, rtx rtl, int first)
{
/* This doesn't work with AOF syntax, since the string table may be in
a different AREA. */
#ifndef AOF_ASSEMBLER
if (optimize > 0 && TREE_CONSTANT (decl))
SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
#endif
default_encode_section_info (decl, rtl, first);
}

15
gcc/config/arm/arm.h
View file

@ -132,8 +132,6 @@ extern rtx pool_vector_label;
/* Set to 1 when a return insn is output, this means that the epilogue
is not needed. */
extern int return_used_this_function;
/* Used to produce AOF syntax assembler. */
extern GTY(()) rtx aof_pic_label;
/* Just in case configure has failed to define anything. */
#ifndef TARGET_CPU_DEFAULT
@ -1650,8 +1648,7 @@ typedef struct
/* If your target environment doesn't prefix user functions with an
underscore, you may wish to re-define this to prevent any conflicts.
e.g. AOF may prefix mcount with an underscore. */
underscore, you may wish to re-define this to prevent any conflicts. */
#ifndef ARM_MCOUNT_NAME
#define ARM_MCOUNT_NAME "*mcount"
#endif
@ -1922,22 +1919,12 @@ typedef struct
/* Recognize any constant value that is a valid address. */
/* XXX We can address any constant, eventually... */
#ifdef AOF_ASSEMBLER
#define CONSTANT_ADDRESS_P(X) \
(GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X))
#else
/* ??? Should the TARGET_ARM here also apply to thumb2? */
#define CONSTANT_ADDRESS_P(X) \
(GET_CODE (X) == SYMBOL_REF \
&& (CONSTANT_POOL_ADDRESS_P (X) \
|| (TARGET_ARM && optimize > 0 && SYMBOL_REF_FLAG (X))))
#endif /* AOF_ASSEMBLER */
/* True if SYMBOL + OFFSET constants must refer to something within
SYMBOL's section. */
#define ARM_OFFSETS_MUST_BE_WITHIN_SECTIONS_P 0

33
gcc/config/arm/arm.md
View file

@ -4849,39 +4849,6 @@
(set (attr "pool_range") (const_int 1024))]
)
;; This variant is used for AOF assembly, since it needs to mention the
;; pic register in the rtl.
(define_expand "pic_load_addr_based"
[(set (match_operand:SI 0 "s_register_operand" "")
(unspec:SI [(match_operand 1 "" "") (match_dup 2)] UNSPEC_PIC_SYM))]
"TARGET_ARM && flag_pic"
"operands[2] = cfun->machine->pic_reg;"
)
(define_insn "*pic_load_addr_based_insn"
[(set (match_operand:SI 0 "s_register_operand" "=r")
(unspec:SI [(match_operand 1 "" "")
(match_operand 2 "s_register_operand" "r")]
UNSPEC_PIC_SYM))]
"TARGET_EITHER && flag_pic && operands[2] == cfun->machine->pic_reg"
"*
#ifdef AOF_ASSEMBLER
operands[1] = aof_pic_entry (operands[1]);
#endif
output_asm_insn (\"ldr%?\\t%0, %a1\", operands);
return \"\";
"
[(set_attr "type" "load1")
(set (attr "pool_range")
(if_then_else (eq_attr "is_thumb" "yes")
(const_int 1024)
(const_int 4096)))
(set (attr "neg_pool_range")
(if_then_else (eq_attr "is_thumb" "yes")
(const_int 0)
(const_int 4084)))]
)
(define_insn "pic_add_dot_plus_four"
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "0")

39
gcc/config/arm/semiaof.h
View file

@ -1,39 +0,0 @@
/* Definitions of target machine for GNU compiler. ARM on semi-hosted platform
AOF Syntax assembler.
Copyright (C) 1995, 1996, 1997, 2004, 2007 Free Software Foundation, Inc.
Contributed by Richard Earnshaw (richard.earnshaw@armltd.co.uk)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#define TARGET_OS_CPP_BUILTINS() \
do { \
builtin_define_std ("arm"); \
builtin_define_std ("semi"); \
} while (0)
#define ASM_SPEC "%{g -g} -arch 4 -apcs 3/32bit"
#define LIB_SPEC "%{Eb: armlib_h.32b%s}%{!Eb: armlib_h.32l%s}"
#define TARGET_VERSION fputs (" (ARM/semi-hosted)", stderr);
#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_HARD
#define TARGET_DEFAULT (0)
/* The Norcroft C library defines size_t as "unsigned int". */
#define SIZE_TYPE "unsigned int"

37
gcc/config/arm/t-semi
View file

@ -1,37 +0,0 @@
# Just for these, we omit the frame pointer since it makes such a big
# difference. It is then pointless adding debugging.
TARGET_LIBGCC2_CFLAGS = -fomit-frame-pointer
LIBGCC2_DEBUG_CFLAGS = -g0
LIB1ASMSRC = arm/lib1funcs.asm
LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX _interwork_call_via_rX
# We want fine grained libraries, so use the new code to build the
# floating point emulation libraries.
FPBIT = fp-bit.c
DPBIT = dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#ifdef __SOFTFP__' > fp-bit.c
echo '#define FLOAT' >> fp-bit.c
echo '#ifndef __ARMEB__' >> fp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >> fp-bit.c
echo '#endif' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
echo '#endif' >> fp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
echo '#ifdef __SOFTFP__' > dp-bit.c
echo '#ifndef __ARMEB__' >> dp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >> dp-bit.c
echo '#define FLOAT_WORD_ORDER_MISMATCH' >> dp-bit.c
echo '#endif' >> dp-bit.c
cat $(srcdir)/config/fp-bit.c >> dp-bit.c
echo '#endif' >> dp-bit.c
MULTILIB_OPTIONS = msoft-float mbig-endian mwords-little-endian
MULTILIB_DIRNAMES = soft big wlittle
MULTILIB_EXCEPTIONS = mwords-little-endian msoft-float/mwords-little-endian
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib