From 95831c01a21a2b6aad16f7b6e1aa42a062c2ab4e Mon Sep 17 00:00:00 2001 From: Vladimir Makarov Date: Wed, 3 Feb 2016 17:58:34 +0000 Subject: [PATCH] re PR target/69461 (ICE in lra_set_insn_recog_data, at lra.c:964) 2016-02-03 Vladimir Makarov Alexandre Oliva PR target/69461 * lra-constraints.c (simplify_operand_subreg): Check additionally address validity after potential reloading. (process_address_1): Check insns validity. In case of failure do nothing. 2016-02-03 Vladimir Makarov Alexandre Oliva PR target/69461 * gcc.target/powerpc/pr69461.c: New. Co-Authored-By: Alexandre Oliva From-SVN: r233107 --- gcc/ChangeLog | 9 ++++++ gcc/lra-constraints.c | 34 ++++++++++++++++++++-- gcc/testsuite/ChangeLog | 6 ++++ gcc/testsuite/gcc.target/powerpc/pr69461.c | 15 ++++++++++ 4 files changed, 61 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr69461.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 92db7641443..720dfeb1a92 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2016-02-03 Vladimir Makarov + Alexandre Oliva + + PR target/69461 + * lra-constraints.c (simplify_operand_subreg): Check additionally + address validity after potential reloading. + (process_address_1): Check insns validity. In case of failure do + nothing. + 2016-02-03 Kirill Yukhin PR target/69118 diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index 9a7121fb6af..08cf0aa6c42 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -1411,6 +1411,21 @@ simplify_operand_subreg (int nop, machine_mode reg_mode) || valid_address_p (GET_MODE (subst), XEXP (subst, 0), MEM_ADDR_SPACE (subst))) return true; + else if ((get_constraint_type (lookup_constraint + (curr_static_id->operand[nop].constraint)) + != CT_SPECIAL_MEMORY) + /* We still can reload address and if the address is + valid, we can remove subreg without reloading its + inner memory. */ + && valid_address_p (GET_MODE (subst), + regno_reg_rtx + [ira_class_hard_regs + [base_reg_class (GET_MODE (subst), + MEM_ADDR_SPACE (subst), + ADDRESS, SCRATCH)][0]], + MEM_ADDR_SPACE (subst))) + return true; + /* If the address was valid and became invalid, prefer to reload the memory. Typical case is when the index scale should correspond the memory. */ @@ -2958,6 +2973,8 @@ process_address_1 (int nop, bool check_only_p, { if (ad.index == NULL) { + rtx_insn *insn; + rtx_insn *last = get_last_insn (); int code = -1; enum reg_class cl = base_reg_class (ad.mode, ad.as, SCRATCH, SCRATCH); @@ -2966,9 +2983,6 @@ process_address_1 (int nop, bool check_only_p, new_reg = lra_create_new_reg (Pmode, NULL_RTX, cl, "addr"); if (HAVE_lo_sum) { - rtx_insn *insn; - rtx_insn *last = get_last_insn (); - /* addr => lo_sum (new_base, addr), case (2) above. */ insn = emit_insn (gen_rtx_SET (new_reg, @@ -3004,6 +3018,20 @@ process_address_1 (int nop, bool check_only_p, { /* addr => new_base, case (2) above. */ lra_emit_move (new_reg, addr); + + for (insn = last == NULL_RTX ? get_insns () : NEXT_INSN (last); + insn != NULL_RTX; + insn = NEXT_INSN (insn)) + if (recog_memoized (insn) < 0) + break; + if (insn != NULL_RTX) + { + /* Do nothing if we cannot generate right insns. + This is analogous to reload pass behaviour. */ + delete_insns_since (last); + end_sequence (); + return false; + } *ad.inner = new_reg; } } diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8ad0a6074bb..5bee4474de7 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2016-02-03 Vladimir Makarov + Alexandre Oliva + + PR target/69461 + * gcc.target/powerpc/pr69461.c: New. + 2016-02-03 Uros Bizjak * lib/tsan-dg.exp (tsan_init): Move check if tsan executable diff --git a/gcc/testsuite/gcc.target/powerpc/pr69461.c b/gcc/testsuite/gcc.target/powerpc/pr69461.c new file mode 100644 index 00000000000..406e7049d29 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr69461.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mlra" } */ + +extern void _setjmp (void); +typedef struct { + double real; + double imag; +} Py_complex; +Py_complex a; +Py_complex fn1(); +Py_complex fn2() { return fn1(); } +void fn3() { + _setjmp(); + a = fn2(); +}