rs6000.md (bswapdi2_64bit): Fix unnecessarily stringent constraints.

2009-09-08  Segher Boessenkool  <segher@kernel.crashing.org>

	* config/rs6000/rs6000.md (bswapdi2_64bit): Fix
	unnecessarily stringent constraints.  Fix address
	calculation in the splitters.

From-SVN: r151575
This commit is contained in:
Segher Boessenkool 2009-09-09 21:50:42 +02:00 committed by Segher Boessenkool
parent c13e029be4
commit 93fbf85741
2 changed files with 30 additions and 20 deletions

View file

@ -1,3 +1,9 @@
2009-09-09 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (bswapdi2_64bit): Fix
unnecessarily stringent constraints. Fix address
calculation in the splitters.
2009-09-09 Uros Bizjak <ubizjak@gmail.com>
PR rtl-optimization/39779

View file

@ -2421,8 +2421,8 @@
[(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,??&r")
(bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r")))
(clobber (match_scratch:DI 2 "=&b,&b,&r"))
(clobber (match_scratch:DI 3 "=&b,&r,&r"))
(clobber (match_scratch:DI 4 "=&b,X,&r"))]
(clobber (match_scratch:DI 3 "=&r,&r,&r"))
(clobber (match_scratch:DI 4 "=&r,X,&r"))]
"TARGET_POWERPC64 && !TARGET_LDBRX
&& (REG_P (operands[0]) || REG_P (operands[1]))"
"#"
@ -2454,12 +2454,13 @@
if (GET_CODE (addr1) == PLUS)
{
emit_insn (gen_adddi3 (op2, XEXP (addr1, 0), GEN_INT (4)));
addr1 = XEXP (addr1, 1);
addr2 = gen_rtx_PLUS (DImode, op2, XEXP (addr1, 1));
}
else
emit_move_insn (op2, GEN_INT (4));
addr2 = gen_rtx_PLUS (DImode, op2, addr1);
{
emit_move_insn (op2, GEN_INT (4));
addr2 = gen_rtx_PLUS (DImode, op2, addr1);
}
if (BYTES_BIG_ENDIAN)
{
@ -2484,7 +2485,7 @@
(clobber (match_operand:DI 2 "gpc_reg_operand" ""))
(clobber (match_operand:DI 3 "gpc_reg_operand" ""))
(clobber (match_operand:DI 4 "" ""))]
"TARGET_POWERPC64 && reload_completed && !TARGET_LDBRX"
"TARGET_POWERPC64 && !TARGET_LDBRX && reload_completed"
[(const_int 0)]
"
{
@ -2503,12 +2504,13 @@
if (GET_CODE (addr1) == PLUS)
{
emit_insn (gen_adddi3 (op2, XEXP (addr1, 0), GEN_INT (4)));
addr1 = XEXP (addr1, 1);
addr2 = gen_rtx_PLUS (DImode, op2, XEXP (addr1, 1));
}
else
emit_move_insn (op2, GEN_INT (4));
addr2 = gen_rtx_PLUS (DImode, op2, addr1);
{
emit_move_insn (op2, GEN_INT (4));
addr2 = gen_rtx_PLUS (DImode, op2, addr1);
}
emit_insn (gen_lshrdi3 (op3, src, GEN_INT (32)));
if (BYTES_BIG_ENDIAN)
@ -2582,13 +2584,14 @@
addr1 = XEXP (src, 0);
if (GET_CODE (addr1) == PLUS)
{
emit_insn (gen_adddi3 (op2, XEXP (addr1, 0), GEN_INT (4)));
addr1 = XEXP (addr1, 1);
emit_insn (gen_addsi3 (op2, XEXP (addr1, 0), GEN_INT (4)));
addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1));
}
else
emit_move_insn (op2, GEN_INT (4));
addr2 = gen_rtx_PLUS (DImode, op2, addr1);
{
emit_move_insn (op2, GEN_INT (4));
addr2 = gen_rtx_PLUS (SImode, op2, addr1);
}
if (BYTES_BIG_ENDIAN)
{
@ -2627,12 +2630,13 @@
if (GET_CODE (addr1) == PLUS)
{
emit_insn (gen_addsi3 (op2, XEXP (addr1, 0), GEN_INT (4)));
addr1 = XEXP (addr1, 1);
addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1));
}
else
emit_move_insn (op2, GEN_INT (4));
addr2 = gen_rtx_PLUS (SImode, op2, addr1);
{
emit_move_insn (op2, GEN_INT (4));
addr2 = gen_rtx_PLUS (SImode, op2, addr1);
}
if (BYTES_BIG_ENDIAN)
{