Revert "[PATCH v2] In the pipeline, USE or CLOBBER should delay execution if it starts a new live range."
This reverts commit 85b49ad863
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4b754091be
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1 changed files with 5 additions and 50 deletions
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@ -765,23 +765,6 @@ real_insn_for_shadow (rtx_insn *insn)
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return pair->i1;
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}
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/* Return TRUE if INSN (a USE or CLOBBER) starts a new live
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range, FALSE otherwise. */
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static bool
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use_or_clobber_starts_range_p (rtx_insn *insn)
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{
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gcc_assert (insn);
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if ((GET_CODE (PATTERN (insn)) == CLOBBER
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|| GET_CODE (PATTERN (insn)) == USE)
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&& !sd_lists_empty_p (insn, SD_LIST_FORW)
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&& sd_lists_empty_p (insn, SD_LIST_BACK))
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return true;
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return false;
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}
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/* For a pair P of insns, return the fixed distance in cycles from the first
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insn after which the second must be scheduled. */
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static int
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@ -6337,39 +6320,11 @@ prune_ready_list (state_t temp_state, bool first_cycle_insn_p,
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}
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else if (recog_memoized (insn) < 0)
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{
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if (GET_CODE (PATTERN (insn)) == ASM_INPUT
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|| asm_noperands (PATTERN (insn)) >= 0)
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{
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reason = "asm";
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if (!first_cycle_insn_p)
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cost = 1;
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}
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else if (use_or_clobber_starts_range_p (insn))
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{
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/* If USE or CLOBBER opens an active range, its execution should
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be delayed so as to be closer to the relevant instructions and
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avoid the generation of some redundant mov instructions.
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Otherwise, it should be executed as soon as possible. */
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reason = "unrecog insn";
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if (!first_cycle_insn_p)
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/* If USE or CLOBBER is not in the first cycle, simply delay it
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by one cycle. */
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cost = 1;
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else
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{
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/* If the USE or CLOBBER is in the first cycle and there are no
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other non-USE or non-CLOBBER instructions after it, we need
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to execute it immediately, otherwise we need to execute the
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non-USE or non-CLOBBER instructions first and postpone the
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execution of the USE or CLOBBER instructions. */
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int j = i;
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while (n > ++j)
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if (!use_or_clobber_starts_range_p (ready_element (&ready, j)))
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break;
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cost = (j == n) ? 0 : 1;
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}
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}
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if (!first_cycle_insn_p
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&& (GET_CODE (PATTERN (insn)) == ASM_INPUT
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|| asm_noperands (PATTERN (insn)) >= 0))
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cost = 1;
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reason = "asm";
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}
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else if (sched_pressure != SCHED_PRESSURE_NONE)
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{
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