re PR c/24414 (Old-style asms don't clobber memory)
gcc/ 2016-06-06 Bernd Edlinger <bernd.edlinger@hotmail.de> PR c/24414 * cfgexpand.c (expand_asm_loc): Remove handling for ADDR_EXPR. Implicitly clobber memory for basic asm with non-empty assembler string. Use targetm.md_asm_adjust also here. * compare-elim.c (arithmetic_flags_clobber_p): Use asm_noperands here. * final.c (final_scan_insn): Handle basic asm in PARALLEL block. * gimple.c (gimple_asm_clobbers_memory_p): Handle basic asm with non-empty assembler string. * ira.c (compute_regs_asm_clobbered): Use asm_noperands here. * recog.c (asm_noperands): Handle basic asm in PARALLEL block. (decode_asm_operands): Handle basic asm in PARALLEL block. (extract_insn): Handle basic asm in PARALLEL block. * doc/extend.texi: Mention new behavior of basic asm. * config/ia64/ia64 (rtx_needs_barrier): Handle ASM_INPUT here. * config/pa/pa.c (branch_to_delay_slot_p, branch_needs_nop_p, branch_needs_nop_p): Use asm_noperands. gcc/testsuite/ 2016-06-06 Bernd Edlinger <bernd.edlinger@hotmail.de> PR c/24414 * gcc.target/i386/pr24414.c: New test. From-SVN: r237133
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12 changed files with 111 additions and 14 deletions
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@ -1,3 +1,22 @@
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2016-06-06 Bernd Edlinger <bernd.edlinger@hotmail.de>
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PR c/24414
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* cfgexpand.c (expand_asm_loc): Remove handling for ADDR_EXPR.
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Implicitly clobber memory for basic asm with non-empty assembler
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string. Use targetm.md_asm_adjust also here.
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* compare-elim.c (arithmetic_flags_clobber_p): Use asm_noperands here.
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* final.c (final_scan_insn): Handle basic asm in PARALLEL block.
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* gimple.c (gimple_asm_clobbers_memory_p): Handle basic asm with
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non-empty assembler string.
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* ira.c (compute_regs_asm_clobbered): Use asm_noperands here.
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* recog.c (asm_noperands): Handle basic asm in PARALLEL block.
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(decode_asm_operands): Handle basic asm in PARALLEL block.
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(extract_insn): Handle basic asm in PARALLEL block.
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* doc/extend.texi: Mention new behavior of basic asm.
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* config/ia64/ia64 (rtx_needs_barrier): Handle ASM_INPUT here.
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* config/pa/pa.c (branch_to_delay_slot_p, branch_needs_nop_p,
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branch_needs_nop_p): Use asm_noperands.
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2016-06-06 Jose E. Marchesi <jose.marchesi@oracle.com>
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* config/sparc/sparc.md (cpu): Add niagara7 cpu type.
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@ -2674,15 +2674,40 @@ expand_asm_loc (tree string, int vol, location_t locus)
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{
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rtx body;
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if (TREE_CODE (string) == ADDR_EXPR)
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string = TREE_OPERAND (string, 0);
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body = gen_rtx_ASM_INPUT_loc (VOIDmode,
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ggc_strdup (TREE_STRING_POINTER (string)),
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locus);
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MEM_VOLATILE_P (body) = vol;
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/* Non-empty basic ASM implicitly clobbers memory. */
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if (TREE_STRING_LENGTH (string) != 0)
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{
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rtx asm_op, clob;
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unsigned i, nclobbers;
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auto_vec<rtx> input_rvec, output_rvec;
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auto_vec<const char *> constraints;
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auto_vec<rtx> clobber_rvec;
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HARD_REG_SET clobbered_regs;
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CLEAR_HARD_REG_SET (clobbered_regs);
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clob = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
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clobber_rvec.safe_push (clob);
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if (targetm.md_asm_adjust)
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targetm.md_asm_adjust (output_rvec, input_rvec,
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constraints, clobber_rvec,
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clobbered_regs);
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asm_op = body;
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nclobbers = clobber_rvec.length ();
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body = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (1 + nclobbers));
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XVECEXP (body, 0, 0) = asm_op;
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for (i = 0; i < nclobbers; i++)
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XVECEXP (body, 0, i + 1) = gen_rtx_CLOBBER (VOIDmode, clobber_rvec[i]);
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}
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emit_insn (body);
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}
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@ -162,7 +162,7 @@ arithmetic_flags_clobber_p (rtx_insn *insn)
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if (!NONJUMP_INSN_P (insn))
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return false;
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pat = PATTERN (insn);
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if (extract_asm_operands (pat))
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if (asm_noperands (pat) >= 0)
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return false;
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if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) == 2)
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@ -6558,6 +6558,7 @@ rtx_needs_barrier (rtx x, struct reg_flags flags, int pred)
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case USE:
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case CALL:
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case ASM_OPERANDS:
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case ASM_INPUT:
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need_barrier |= rtx_needs_barrier (pat, flags, pred);
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break;
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@ -6442,7 +6442,7 @@ branch_to_delay_slot_p (rtx_insn *insn)
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the branch is followed by an asm. */
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if (!insn
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|| GET_CODE (PATTERN (insn)) == ASM_INPUT
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|| extract_asm_operands (PATTERN (insn)) != NULL_RTX
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|| asm_noperands (PATTERN (insn)) >= 0
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|| get_attr_length (insn) > 0)
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break;
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}
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@ -6473,7 +6473,7 @@ branch_needs_nop_p (rtx_insn *insn)
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return TRUE;
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if (!(GET_CODE (PATTERN (insn)) == ASM_INPUT
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|| extract_asm_operands (PATTERN (insn)) != NULL_RTX)
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|| asm_noperands (PATTERN (insn)) >= 0)
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&& get_attr_length (insn) > 0)
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break;
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}
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@ -6497,7 +6497,7 @@ use_skip_p (rtx_insn *insn)
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/* We can't rely on the length of asms, so we can't skip asms. */
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if (!insn
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|| GET_CODE (PATTERN (insn)) == ASM_INPUT
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|| extract_asm_operands (PATTERN (insn)) != NULL_RTX)
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|| asm_noperands (PATTERN (insn)) >= 0)
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break;
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if (get_attr_length (insn) == 4
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&& jump_insn == next_active_insn (insn))
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@ -7581,7 +7581,7 @@ means there is no way to communicate to the compiler what is happening
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inside them. GCC has no visibility of symbols in the @code{asm} and may
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discard them as unreferenced. It also does not know about side effects of
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the assembler code, such as modifications to memory or registers. Unlike
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some compilers, GCC assumes that no changes to either memory or registers
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some compilers, GCC assumes that no changes to general purpose registers
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occur. This assumption may change in a future release.
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To avoid complications from future changes to the semantics and the
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@ -7605,6 +7605,10 @@ all basic @code{asm} blocks use the assembler dialect specified by the
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Basic @code{asm} provides no
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mechanism to provide different assembler strings for different dialects.
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For basic @code{asm} with non-empty assembler string GCC assumes
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the assembler block does not change any general purpose registers,
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but it may read or write any globally accessible variable.
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Here is an example of basic @code{asm} for i386:
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@example
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@ -2566,6 +2566,10 @@ final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
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(*debug_hooks->source_line) (last_linenum, last_filename,
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last_discriminator, is_stmt);
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if (GET_CODE (body) == PARALLEL
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&& GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT)
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body = XVECEXP (body, 0, 0);
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if (GET_CODE (body) == ASM_INPUT)
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{
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const char *string = XSTR (body, 0);
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@ -2583,6 +2583,10 @@ gimple_asm_clobbers_memory_p (const gasm *stmt)
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return true;
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}
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/* Non-empty basic ASM implicitly clobbers memory. */
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if (gimple_asm_input_p (stmt) && strlen (gimple_asm_string (stmt)) != 0)
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return true;
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return false;
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}
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@ -2233,7 +2233,7 @@ compute_regs_asm_clobbered (void)
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{
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df_ref def;
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if (NONDEBUG_INSN_P (insn) && extract_asm_operands (PATTERN (insn)))
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if (NONDEBUG_INSN_P (insn) && asm_noperands (PATTERN (insn)) >= 0)
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FOR_EACH_INSN_DEF (def, insn)
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{
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unsigned int dregno = DF_REF_REGNO (def);
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32
gcc/recog.c
32
gcc/recog.c
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@ -1470,22 +1470,34 @@ extract_asm_operands (rtx body)
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/* If BODY is an insn body that uses ASM_OPERANDS,
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return the number of operands (both input and output) in the insn.
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If BODY is an insn body that uses ASM_INPUT with CLOBBERS in PARALLEL,
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return 0.
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Otherwise return -1. */
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int
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asm_noperands (const_rtx body)
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{
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rtx asm_op = extract_asm_operands (CONST_CAST_RTX (body));
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int n_sets = 0;
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int i, n_sets = 0;
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if (asm_op == NULL)
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return -1;
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{
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if (GET_CODE (body) == PARALLEL && XVECLEN (body, 0) >= 2
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&& GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT)
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{
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/* body is [(asm_input ...) (clobber (reg ...))...]. */
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for (i = XVECLEN (body, 0) - 1; i > 0; i--)
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if (GET_CODE (XVECEXP (body, 0, i)) != CLOBBER)
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return -1;
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return 0;
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}
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return -1;
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}
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if (GET_CODE (body) == SET)
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n_sets = 1;
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else if (GET_CODE (body) == PARALLEL)
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{
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int i;
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if (GET_CODE (XVECEXP (body, 0, 0)) == SET)
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{
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/* Multiple output operands, or 1 output plus some clobbers:
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@ -1540,9 +1552,12 @@ asm_noperands (const_rtx body)
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the locations of the operands within the insn into the vector OPERAND_LOCS,
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and the constraints for the operands into CONSTRAINTS.
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Write the modes of the operands into MODES.
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Write the location info into LOC.
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Return the assembler-template.
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If BODY is an insn body that uses ASM_INPUT with CLOBBERS in PARALLEL,
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return the basic assembly string.
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If MODES, OPERAND_LOCS, CONSTRAINTS or OPERANDS is 0,
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If LOC, MODES, OPERAND_LOCS, CONSTRAINTS or OPERANDS is 0,
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we don't store that info. */
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const char *
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}
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nbase = i;
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}
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else if (GET_CODE (asmop) == ASM_INPUT)
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{
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if (loc)
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*loc = ASM_INPUT_SOURCE_LOCATION (asmop);
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return XSTR (asmop, 0);
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}
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break;
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}
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case PARALLEL:
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if ((GET_CODE (XVECEXP (body, 0, 0)) == SET
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&& GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) == ASM_OPERANDS)
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|| GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
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|| GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS
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|| GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT)
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goto asm_insn;
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else
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goto normal_insn;
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@ -1,3 +1,8 @@
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2016-06-06 Bernd Edlinger <bernd.edlinger@hotmail.de>
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PR c/24414
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* gcc.target/i386/pr24414.c: New test.
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2016-06-06 Jose E. Marchesi <jose.marchesi@oracle.com>
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* gcc.target/sparc/vis4misc.c: New file.
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13
gcc/testsuite/gcc.target/i386/pr24414.c
Normal file
13
gcc/testsuite/gcc.target/i386/pr24414.c
Normal file
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/* { dg-do run } */
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/* { dg-options "-O2" } */
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int test;
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int
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main ()
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{
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int x = test;
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asm ("movl $1,test");
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if (x + test != 1)
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__builtin_trap ();
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return 0;
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}
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