diff --git a/gcc/config/riscv/riscv-avlprop.cc b/gcc/config/riscv/riscv-avlprop.cc
index 02f006742f1..a6159816cf7 100644
--- a/gcc/config/riscv/riscv-avlprop.cc
+++ b/gcc/config/riscv/riscv-avlprop.cc
@@ -113,19 +113,34 @@ avl_can_be_propagated_p (rtx_insn *rinsn)
      touching the element with i > AVL.  So, we don't do AVL propagation
      on these following situations:
 
-       - The index of "vrgather dest, source, index" may pick up the
-	 element which has index >= AVL, so we can't strip the elements
-	 that has index >= AVL of source register.
-       - The last element of vslide1down is AVL + 1 according to RVV ISA:
-	 vstart <= i < vl-1    vd[i] = vs2[i+1] if v0.mask[i] enabled
-       - The last multiple elements of vslidedown can be the element
-	 has index >= AVL according to RVV ISA:
-	 0 <= i+OFFSET < VLMAX   src[i] = vs2[i+OFFSET]
-	 vstart <= i < vl vd[i] = src[i] if v0.mask[i] enabled.  */
+       vgather:
+	 - The index of "vrgather dest, source, index" may pick up the
+	   element which has index >= AVL, so we can't strip the elements
+	   that has index >= AVL of source register.
+       vslide1down:
+	 - The last element of vslide1down is AVL + 1 according to RVV ISA:
+	   vstart <= i < vl-1    vd[i] = vs2[i+1] if v0.mask[i] enabled
+	 - The last multiple elements of vslidedown can be the element
+	   has index >= AVL according to RVV ISA:
+	   0 <= i+OFFSET < VLMAX   src[i] = vs2[i+OFFSET]
+	   vstart <= i < vl vd[i] = src[i] if v0.mask[i] enabled.
+       vcompress:
+	 - According to the ISA, the first vl elements of vector register
+	   group vs2 should be extracted and packed for vcompress.  And the
+	   highest element of vs2 vector may be touched by the mask.  For
+	   example, given vlmax = 4 here.
+	   v0 = 0b1000
+	   v1 = {0x1, 0x2, 0x3, 0x4}
+	   v2 = {0x5, 0x6, 0x7, 0x8}
+	   vcompress v1, v2, v0 with avl = 4, v1 = {0x8, 0x2, 0x3, 0x4}.
+	   vcompress v1, v2, v0 with avl = 2, v1 will be unchanged.
+	   Thus, we cannot propagate avl of vcompress because it may has
+	   senmatics change to the result.  */
   return get_attr_type (rinsn) != TYPE_VGATHER
 	 && get_attr_type (rinsn) != TYPE_VSLIDEDOWN
 	 && get_attr_type (rinsn) != TYPE_VISLIDE1DOWN
-	 && get_attr_type (rinsn) != TYPE_VFSLIDE1DOWN;
+	 && get_attr_type (rinsn) != TYPE_VFSLIDE1DOWN
+	 && get_attr_type (rinsn) != TYPE_VCOMPRESS;
 }
 
 static bool
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vcompress-avlprop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vcompress-avlprop-1.c
new file mode 100644
index 00000000000..43f79fe3b7b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vcompress-avlprop-1.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvl512b -mabi=lp64d -O3 --param=riscv-autovec-preference=fixed-vlmax -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+#define MAX     10
+
+struct s { struct s *n; } *p;
+struct s ss;
+struct s sss[MAX];
+
+/*
+** build_linked_list:
+**   ...
+**   vsetivli\s+zero,\s*8,\s*e64,\s*m1,\s*ta,\s*ma
+**   ...
+**   vcompress\.vm\s+v[0-9]+,\s*v[0-9]+,\s*v0
+**   ...
+**   vcompress\.vm\s+v[0-9]+,\s*v[0-9]+,\s*v0
+**   vsetivli\s+zero,\s*2,\s*e64,\s*m1,\s*ta,\s*ma
+**   ...
+*/
+void
+build_linked_list ()
+{
+  int i;
+  struct s *next;
+
+  p = &ss;
+  next = p;
+
+  for (i = 0; i < MAX; i++) {
+      next->n = &sss[i];
+      next = next->n;
+  }
+
+  next->n = 0;
+}