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x86: improve fast bfloat->float conversion

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There's nothing AVX512BW-ish in here, so no reason to use Yw as the
constraints for the AVX alternative. Furthermore by using the 512-bit
form of VPSSLD (in a new alternative) all 32 registers can be used
directly by the insn without AVX512VL needing to be enabled.

Also adjust the originally last alternative's "prefix" attribute to
maybe_evex.

gcc/

	* config/i386/i386.md (extendbfsf2_1): Add new AVX512F
	alternative. Adjust original last alternative's "prefix"
	attribute to maybe_evex.
This commit is contained in:
Jan Beulich 2023-07-12 12:16:08 +02:00
parent 28cdba24a9
commit 8a738ac71d
1 changed files with 14 additions and 8 deletions
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22
gcc/config/i386/i386.md
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@ -5247,21 +5247,27 @@
;; Don't use float_extend since psrlld doesn't raise
;; exceptions and turn a sNaN into a qNaN.
(define_insn "extendbfsf2_1"
[(set (match_operand:SF 0 "register_operand" "=x,Yw")
[(set (match_operand:SF 0 "register_operand" "=x,Yv,v")
(unspec:SF
[(match_operand:BF 1 "register_operand" " 0,Yw")]
[(match_operand:BF 1 "register_operand" " 0,Yv,v")]
UNSPEC_CVTBFSF))]
"TARGET_SSE2"
"@
pslld\t{$16, %0|%0, 16}
vpslld\t{$16, %1, %0|%0, %1, 16}"
[(set_attr "isa" "noavx,avx")
vpslld\t{$16, %1, %0|%0, %1, 16}
vpslld\t{$16, %g1, %g0|%g0, %g1, 16}"
[(set_attr "isa" "noavx,avx,*")
(set_attr "type" "sseishft1")
(set_attr "length_immediate" "1")
(set_attr "prefix_data16" "1,*")
(set_attr "prefix" "orig,vex")
(set_attr "mode" "TI")
(set_attr "memory" "none")])
(set_attr "prefix_data16" "1,*,*")
(set_attr "prefix" "orig,maybe_evex,evex")
(set_attr "mode" "TI,TI,XI")
(set_attr "memory" "none")
(set (attr "enabled")
(if_then_else (eq_attr "alternative" "2")
(symbol_ref "TARGET_AVX512F && !TARGET_AVX512VL
&& !TARGET_PREFER_AVX256")
(const_string "*")))])
(define_expand "extend<mode>xf2"
[(set (match_operand:XF 0 "nonimmediate_operand")