re PR target/51244 ([SH] Inefficient conditional branch and code around T bit)
gcc/ PR target/51244 * config/sh/sh_treg_combine.cc (is_conditional_insn): New function. (cbranch_trace): Add member rtx* condition_rtx_in_insn, initialize it accordingly in constructor. (cbranch_trace::branch_condition_rtx_ref): New function. (cbranch_trace::branch_condition_rtx): Use branch_condition_rtx_ref. (sh_treg_combine::try_invert_branch_condition): Invert condition rtx in insn using reversed_comparison_code and validate_change instead of invert_jump_1. (sh_treg_combine::execute): Look for conditional insns in basic blocks in addition to conditional branches. * config/sh/sh.md (*movsicc_div0s): Remove combine patterns. From-SVN: r218850
This commit is contained in:
Oleg Endo
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3 changed files with 69 additions and 49 deletions
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@ -1,3 +1,18 @@
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2014-12-17 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/51244
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* config/sh/sh_treg_combine.cc (is_conditional_insn): New function.
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(cbranch_trace): Add member rtx* condition_rtx_in_insn, initialize it
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accordingly in constructor.
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(cbranch_trace::branch_condition_rtx_ref): New function.
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(cbranch_trace::branch_condition_rtx): Use branch_condition_rtx_ref.
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(sh_treg_combine::try_invert_branch_condition): Invert condition rtx
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in insn using reversed_comparison_code and validate_change instead of
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invert_jump_1.
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(sh_treg_combine::execute): Look for conditional insns in basic blocks
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in addition to conditional branches.
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* config/sh/sh.md (*movsicc_div0s): Remove combine patterns.
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2014-12-17 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/51244
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@ -1086,47 +1086,6 @@
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(label_ref (match_dup 2))
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(pc)))])
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;; Conditional move combine pattern for div0s comparisons.
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;; This is used when TARGET_PRETEND_CMOVE is in effect.
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(define_insn_and_split "*movsicc_div0s"
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[(set (match_operand:SI 0 "arith_reg_dest" "")
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(if_then_else:SI (ge (xor:SI (match_operand:SI 1 "arith_reg_operand" "")
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(match_operand:SI 2 "arith_reg_operand" ""))
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(const_int 0))
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(match_operand:SI 3 "arith_reg_operand" "")
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(match_operand:SI 4 "general_movsrc_operand" "")))
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(clobber (reg:SI T_REG))]
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"TARGET_PRETEND_CMOVE"
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"#"
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"&& 1"
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[(set (reg:SI T_REG) (lt:SI (xor:SI (match_dup 1) (match_dup 2))
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(const_int 0)))
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(set (match_dup 0)
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(if_then_else (ne (reg:SI T_REG) (const_int 0))
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(match_dup 4)
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(match_dup 3)))])
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(define_insn_and_split "*movsicc_div0s"
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[(set (match_operand:SI 0 "arith_reg_dest")
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(if_then_else:SI (eq (lshiftrt:SI
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(match_operand:SI 1 "arith_reg_operand")
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(const_int 31))
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(lshiftrt:SI
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(match_operand:SI 2 "arith_reg_operand")
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(const_int 31)))
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(match_operand:SI 3 "arith_reg_operand")
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(match_operand:SI 4 "general_movsrc_operand")))
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(clobber (reg:SI T_REG))]
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"TARGET_PRETEND_CMOVE"
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"#"
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"&& 1"
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[(set (reg:SI T_REG) (lt:SI (xor:SI (match_dup 1) (match_dup 2))
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(const_int 0)))
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(set (match_dup 0)
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(if_then_else (ne (reg:SI T_REG) (const_int 0))
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(match_dup 4)
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(match_dup 3)))])
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;; -------------------------------------------------------------------------
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;; SImode unsigned integer comparisons
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;; -------------------------------------------------------------------------
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@ -432,6 +432,16 @@ trace_reg_uses (rtx reg, rtx_insn *start_insn, rtx abort_at_insn)
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return count;
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}
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static bool
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is_conditional_insn (rtx_insn* i)
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{
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if (! (INSN_P (i) && NONDEBUG_INSN_P (i)))
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return false;
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rtx p = PATTERN (i);
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return GET_CODE (p) == SET && GET_CODE (XEXP (p, 1)) == IF_THEN_ELSE;
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}
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// FIXME: Remove dependency on SH predicate function somehow.
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extern int t_reg_operand (rtx, machine_mode);
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extern int negt_reg_operand (rtx, machine_mode);
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@ -484,6 +494,7 @@ private:
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struct cbranch_trace
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{
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rtx_insn *cbranch_insn;
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rtx* condition_rtx_in_insn;
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branch_condition_type_t cbranch_type;
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// The comparison against zero right before the conditional branch.
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@ -495,9 +506,14 @@ private:
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cbranch_trace (rtx_insn *insn)
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: cbranch_insn (insn),
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condition_rtx_in_insn (NULL),
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cbranch_type (unknown_branch_condition),
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setcc ()
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{
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if (is_conditional_insn (cbranch_insn))
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condition_rtx_in_insn = &XEXP (XEXP (PATTERN (cbranch_insn), 1), 0);
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else if (rtx x = pc_set (cbranch_insn))
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condition_rtx_in_insn = &XEXP (XEXP (x, 1), 0);
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}
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basic_block bb (void) const { return BLOCK_FOR_INSN (cbranch_insn); }
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@ -505,8 +521,16 @@ private:
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rtx
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branch_condition_rtx (void) const
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{
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rtx x = pc_set (cbranch_insn);
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return x == NULL_RTX ? NULL_RTX : XEXP (XEXP (x, 1), 0);
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return condition_rtx_in_insn != NULL ? *condition_rtx_in_insn : NULL;
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}
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rtx&
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branch_condition_rtx_ref (void) const
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{
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// Before anything gets to invoke this function, there are other checks
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// in place to make sure that we have a known branch condition and thus
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// the ref to the rtx in the insn.
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gcc_assert (condition_rtx_in_insn != NULL);
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return *condition_rtx_in_insn;
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}
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bool
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@ -1033,8 +1057,18 @@ sh_treg_combine::try_invert_branch_condition (cbranch_trace& trace)
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{
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log_msg ("inverting branch condition\n");
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if (!invert_jump_1 (trace.cbranch_insn, JUMP_LABEL (trace.cbranch_insn)))
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log_return (false, "invert_jump_1 failed\n");
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rtx& comp = trace.branch_condition_rtx_ref ();
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rtx_code rev_cmp_code = reversed_comparison_code (comp, trace.cbranch_insn);
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if (rev_cmp_code == UNKNOWN)
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log_return (false, "reversed_comparison_code = UNKNOWN\n");
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validate_change (trace.cbranch_insn, &comp,
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gen_rtx_fmt_ee (rev_cmp_code,
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GET_MODE (comp), XEXP (comp, 0),
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XEXP (comp, 1)),
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1);
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if (verify_changes (num_validated_changes ()))
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confirm_change_group ();
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@ -1531,14 +1565,26 @@ sh_treg_combine::execute (function *fun)
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log_rtx (m_ccreg);
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log_msg (" STORE_FLAG_VALUE = %d\n", STORE_FLAG_VALUE);
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// Look for basic blocks that end with a conditional branch and try to
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// optimize them.
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// Look for basic blocks that end with a conditional branch or for
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// conditional insns and try to optimize them.
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basic_block bb;
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FOR_EACH_BB_FN (bb, fun)
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{
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rtx_insn *i = BB_END (bb);
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rtx_insn* i = BB_END (bb);
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if (i == NULL || i == PREV_INSN (BB_HEAD (bb)))
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continue;
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// A conditional branch is always the last insn of a basic block.
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if (any_condjump_p (i) && onlyjump_p (i))
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try_optimize_cbranch (i);
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{
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try_optimize_cbranch (i);
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i = PREV_INSN (i);
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}
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// Check all insns in block for conditional insns.
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for (; i != NULL && i != PREV_INSN (BB_HEAD (bb)); i = PREV_INSN (i))
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if (is_conditional_insn (i))
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try_optimize_cbranch (i);
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}
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log_msg ("\n\n");
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