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rs6000: Update instruction counts due to combine changes [PR112103]

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The PR91865 combine fix changed instruction counts slightly for rlwinm-0.c.
Adjust expected instruction counts accordingly.

2024-02-20  Peter Bergner  <bergner@linux.ibm.com>

gcc/testsuite/
	PR target/112103
	* gcc.target/powerpc/rlwinm-0.c: Adjust expected instruction counts.
This commit is contained in:
Peter Bergner 2024-02-20 13:44:43 -06:00
parent 61ab046a32
commit 81e5f276c5
1 changed files with 2 additions and 2 deletions
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4
gcc/testsuite/gcc.target/powerpc/rlwinm-0.c
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@ -4,10 +4,10 @@
/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 6739 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 9716 { target lp64 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+blr} 3375 } } */
/* { dg-final { scan-assembler-times {(?n)^\s+rldicl} 3081 { target lp64 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+rldicl} 3090 { target lp64 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+rlwinm} 3197 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+rlwinm} 3093 { target lp64 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+rlwinm} 3084 { target lp64 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+rotlwi} 154 } } */
/* { dg-final { scan-assembler-times {(?n)^\s+srwi} 13 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+srdi} 13 { target lp64 } } } */