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Fix amdgcn regrename ICE.

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2019-07-02  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn.md (movdi_symbol_save_scc): Convert to define_insn
	with inlined save and restore.

From-SVN: r272932
This commit is contained in:
Andrew Stubbs 2019-07-02 11:57:17 +00:00 • committed by Andrew Stubbs
parent 4887c9e808
commit 8108da8a55
2 changed files with 31 additions and 8 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2019-07-02 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn.md (movdi_symbol_save_scc): Convert to define_insn
with inlined save and restore.
2019-07-02 Eric Botcazou <ebotcazou@adacore.com>
* cfgexpand.c (pass_expand::execute): Deal specially with instructions

34
gcc/config/gcn/gcn.md
View file

@ -830,18 +830,36 @@
[(set_attr "type" "mult")
(set_attr "length" "32")])
(define_insn_and_split "movdi_symbol_save_scc"
(define_insn "movdi_symbol_save_scc"
[(set (match_operand:DI 0 "nonimmediate_operand" "=Sg")
(match_operand:DI 1 "general_operand" "Y"))
(clobber (reg:BI CC_SAVE_REG))]
"GET_CODE (operands[1]) == SYMBOL_REF || GET_CODE (operands[1]) == LABEL_REF
"(GET_CODE (operands[1]) == SYMBOL_REF || GET_CODE (operands[1]) == LABEL_REF)
&& (lra_in_progress || reload_completed)"
"#"
"reload_completed"
[(set (reg:BI CC_SAVE_REG) (reg:BI SCC_REG))
(parallel [(set (match_dup 0) (match_dup 1))
(clobber (reg:BI SCC_REG))])
(set (reg:BI SCC_REG) (reg:BI CC_SAVE_REG))])
{
/* !!! These sequences clobber CC_SAVE_REG. */
if (SYMBOL_REF_P (operands[1])
&& SYMBOL_REF_WEAK (operands[1]))
return "; s_mov_b32\ts22, scc is not supported by the assembler.\;"
".long\t0xbe9600fd\;"
"s_getpc_b64\t%0\;"
"s_add_u32\t%L0, %L0, %1@gotpcrel32@lo+4\;"
"s_addc_u32\t%H0, %H0, %1@gotpcrel32@hi+4\;"
"s_load_dwordx2\t%0, %0\;"
"s_cmpk_lg_u32\ts22, 0\;"
"s_waitcnt\tlgkmcnt(0)";
return "; s_mov_b32\ts22, scc is not supported by the assembler.\;"
".long\t0xbe9600fd\;"
"s_getpc_b64\t%0\;"
"s_add_u32\t%L0, %L0, %1@rel32@lo+4\;"
"s_addc_u32\t%H0, %H0, %1@rel32@hi+4\;"
"s_cmpk_lg_u32\ts22, 0";
}
[(set_attr "type" "mult")
(set_attr "length" "40")])
(define_insn "gcn_indirect_call"
[(call (mem (match_operand:DI 0 "register_operand" "Sg"))