aarch64: Extend aarch64-autovec-preference==2 to 128-bit SVE
When compiling with -msve-vector-bits=128, aarch64_preferred_simd_mode would pass the same vector width to aarch64_simd_container_mode for both SVE and Advanced SIMD, and so Advanced SIMD would always “win”. This patch instead makes it choose directly between SVE and Advanced SIMD modes, so that aarch64-autovec-preference==2 and aarch64-autovec-preference==4 work for this configuration. (aarch64-autovec-preference shouldn't affect aarch64_simd_container_mode because that would have an ABI impact for things like GNU vectors.) gcc/ * config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Use aarch64_full_sve_mode and aarch64_vq_mode directly, instead of going via aarch64_simd_container_mode.
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@ -17421,10 +17421,11 @@ aarch64_preferred_simd_mode (scalar_mode mode)
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{
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/* Take into account explicit auto-vectorization ISA preferences through
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aarch64_cmp_autovec_modes. */
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poly_int64 bits
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= (TARGET_SVE && aarch64_cmp_autovec_modes (VNx16QImode, V16QImode))
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? BITS_PER_SVE_VECTOR : 128;
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return aarch64_simd_container_mode (mode, bits);
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if (TARGET_SVE && aarch64_cmp_autovec_modes (VNx16QImode, V16QImode))
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return aarch64_full_sve_mode (mode).else_mode (word_mode);
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if (TARGET_SIMD)
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return aarch64_vq_mode (mode).else_mode (word_mode);
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return word_mode;
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}
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/* Return a list of possible vector sizes for the vectorizer
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