[AArch64] Revert wrong commit of "Improve TLS Descriptor pattern to release RTL loop IV opt"
Revert the wrong commit of 2015-08-06 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> Jiong Wang <jiong.wang@arm.com> * config/aarch64/aarch64.d (tlsdesc_small_pseudo_<mode>): New pattern. * config/aarch64/aarch64.h (reg_class): New enumeration FIXED_REG0. (REG_CLASS_NAMES): Likewise. (REG_CLASS_CONTENTS): Likewise. * config/aarch64/aarch64.c (aarch64_class_max_nregs): Likewise. (aarch64_register_move_cost): Likewise. (aarch64_load_symref_appropriately): Invoke the new added pattern if possible. * config/aarch64/constraints.md (Uc0): New constraint. From-SVN: r226756
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3 changed files with 5 additions and 58 deletions
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@ -1048,26 +1048,12 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
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gcc_assert (mode == Pmode || mode == ptr_mode);
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if (can_create_pseudo_p ())
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{
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rtx reg = gen_reg_rtx (mode);
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if (TARGET_ILP32)
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emit_insn (gen_tlsdesc_small_pseudo_si (imm, reg));
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else
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emit_insn (gen_tlsdesc_small_pseudo_di (imm, reg));
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emit_use (reg);
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}
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/* In ILP32, the got entry is always of SImode size. Unlike
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small GOT, the dest is fixed at reg 0. */
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if (TARGET_ILP32)
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emit_insn (gen_tlsdesc_small_si (imm));
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else
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{
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/* In ILP32, the got entry is always of SImode size. Unlike
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small GOT, the dest is fixed at reg 0. */
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if (TARGET_ILP32)
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emit_insn (gen_tlsdesc_small_si (imm));
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else
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emit_insn (gen_tlsdesc_small_di (imm));
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}
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emit_insn (gen_tlsdesc_small_di (imm));
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tp = aarch64_load_tp (NULL);
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if (mode != Pmode)
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@ -4549,23 +4549,6 @@
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[(set_attr "type" "call")
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(set_attr "length" "16")])
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;; The same as tlsdesc_small_<mode> except that we don't expose hard register X0
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;; as the destination of set as it will cause trouble for RTL loop iv.
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;; RTL loop iv will abort ongoing optimization once it finds there is hard reg
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;; as destination of set. This pattern thus could help these tlsdesc
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;; instruction sequences hoisted out of loop.
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(define_insn "tlsdesc_small_pseudo_<mode>"
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[(set (match_operand:PTR 1 "register_operand" "=r")
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(unspec:PTR [(match_operand 0 "aarch64_valid_symref" "S")]
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UNSPEC_TLSDESC))
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(clobber (reg:DI R0_REGNUM))
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(clobber (reg:DI LR_REGNUM))
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(clobber (reg:CC CC_REGNUM))]
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"TARGET_TLS_DESC"
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"adrp\\tx0, %A0\;ldr\\t%<w>1, [x0, #%L0]\;add\\t<w>0, <w>0, %L0\;.tlsdesccall\\t%0\;blr\\t%1"
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[(set_attr "type" "call")
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(set_attr "length" "16")])
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(define_insn "stack_tie"
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[(set (mem:BLK (scratch))
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(unspec:BLK [(match_operand:DI 0 "register_operand" "rk")
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@ -1,22 +0,0 @@
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/* { dg-do compile } */
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/* { dg-require-effective-target tls_native } */
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/* { dg-options "-O2 -fpic -fdump-rtl-loop2_invariant" } */
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/* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* } { "-mcmodel=large" } { "" } } */
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int cal (int, int);
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__thread int tls_data;
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int
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foo (int bound)
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{
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int i = 0;
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int sum = 0;
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for (i; i < bound; i++)
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sum = cal (sum, tls_data);
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return sum;
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}
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/* Insn sequences for TLS descriptor should be hoisted out of the loop. */
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/* { dg-final { scan-rtl-dump "Decided" "loop2_invariant" } } */
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