i386.h: Clarify CCNOmode description in comment.
* config/i386/i386.h: Clarify CCNOmode description in comment. (EXTRA_CC_MODES): Remove CCRCmode. * config/i386/i386.c (ix86_comparison_operator): Remove CCRCmode. (put_condition_code, ix86_match_ccmode): Likewise. (ix86_cc_mode): Likewise. Fix comment. (ix86_expand_strlensi_unroll_1): *rc patterns are gone. * config/i386/i386.md: Add unspec 12 description. (adddi3 split): Use unspec 12 instead of CCRCmode. (addsi3_carry_rc): Remove. (addsi3_cc, addqi3_cc): New patterns. (addsi_3): Swap operands, match CCZmode. (addsi_4): Rewritten. (addsi_5): Renamed from addsi_6. (addsi_6): Removed. (addhi_3): Swap operands, match CCZmode. (addhi_4): Rewritten. (addhi_5): Renamed from addhi_6. (addhi_6): Removed. (addqi_3): Swap operands, match CCZmode. (addqi_4): Rewritten. (addqi_5): Renamed from addqi_6. Use =q constraint for clobber. (subsi3_carry_rc): Removed. (iorqi_3): Use =q constraint for clobber. (xorqi_cc_2): Likewise. (negdi2_1 split): Don't use CCRCmode, use ltu instead of gtu. (x86_movsicc_0_m1_rc): Removed. (cmp?i peepholes): Remove neg. Use CCGCmode instead of CCRCmode. Co-Authored-By: Jakub Jelinek <jakub@redhat.com> From-SVN: r37166
This commit is contained in:
Jan Hubicka
Jakub Jelinek
parent
99fa3f5edd
commit
7e08e19030
4 changed files with 216 additions and 189 deletions
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@ -1,3 +1,34 @@
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2000-10-31 Jan Hubicka <jh@suse.cz>
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Jakub Jelinek <jakub@redhat.com>
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* config/i386/i386.h: Clarify CCNOmode description in comment.
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(EXTRA_CC_MODES): Remove CCRCmode.
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* config/i386/i386.c (ix86_comparison_operator): Remove CCRCmode.
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(put_condition_code, ix86_match_ccmode): Likewise.
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(ix86_cc_mode): Likewise. Fix comment.
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(ix86_expand_strlensi_unroll_1): *rc patterns are gone.
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* config/i386/i386.md: Add unspec 12 description.
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(adddi3 split): Use unspec 12 instead of CCRCmode.
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(addsi3_carry_rc): Remove.
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(addsi3_cc, addqi3_cc): New patterns.
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(addsi_3): Swap operands, match CCZmode.
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(addsi_4): Rewritten.
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(addsi_5): Renamed from addsi_6.
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(addsi_6): Removed.
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(addhi_3): Swap operands, match CCZmode.
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(addhi_4): Rewritten.
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(addhi_5): Renamed from addhi_6.
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(addhi_6): Removed.
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(addqi_3): Swap operands, match CCZmode.
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(addqi_4): Rewritten.
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(addqi_5): Renamed from addqi_6. Use =q constraint for clobber.
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(subsi3_carry_rc): Removed.
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(iorqi_3): Use =q constraint for clobber.
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(xorqi_cc_2): Likewise.
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(negdi2_1 split): Don't use CCRCmode, use ltu instead of gtu.
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(x86_movsicc_0_m1_rc): Removed.
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(cmp?i peepholes): Remove neg. Use CCGCmode instead of CCRCmode.
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2000-10-31 Joseph S. Myers <jsm28@cam.ac.uk>
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* c-typeck.c (build_unary_op): If pedantic, pedwarn for increment
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@ -1305,22 +1305,18 @@ ix86_comparison_operator (op, mode)
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return 1;
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case LT: case GE:
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inmode = GET_MODE (XEXP (op, 0));
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if (inmode == CCmode || inmode == CCGCmode || inmode == CCRCmode
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if (inmode == CCmode || inmode == CCGCmode
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|| inmode == CCGOCmode || inmode == CCNOmode)
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return 1;
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return 0;
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case LTU: case GTU:
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case LTU: case GTU: case LEU: case ORDERED: case UNORDERED: case GEU:
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inmode = GET_MODE (XEXP (op, 0));
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return inmode == CCmode;
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case LEU: case ORDERED: case UNORDERED: case GEU:
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inmode = GET_MODE (XEXP (op, 0));
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if (inmode == CCmode || inmode == CCRCmode)
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if (inmode == CCmode)
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return 1;
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return 0;
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case GT: case LE:
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inmode = GET_MODE (XEXP (op, 0));
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if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode
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|| inmode == CCRCmode)
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if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode)
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return 1;
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return 0;
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default:
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@ -3112,22 +3108,21 @@ put_condition_code (code, mode, reverse, fp, file)
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suffix = "ne";
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break;
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case GT:
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if (mode != CCmode && mode != CCNOmode && mode != CCGCmode
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&& mode != CCRCmode)
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if (mode != CCmode && mode != CCNOmode && mode != CCGCmode)
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abort ();
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suffix = "g";
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break;
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case GTU:
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/* ??? Use "nbe" instead of "a" for fcmov losage on some assemblers.
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Those same assemblers have the same but opposite losage on cmov. */
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if (mode != CCmode && mode != CCRCmode)
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if (mode != CCmode)
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abort ();
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suffix = fp ? "nbe" : "a";
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break;
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case LT:
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if (mode == CCNOmode || mode == CCGOCmode)
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suffix = "s";
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else if (mode == CCmode || mode == CCGCmode || mode == CCRCmode)
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else if (mode == CCmode || mode == CCGCmode)
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suffix = "l";
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else
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abort ();
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@ -3140,33 +3135,26 @@ put_condition_code (code, mode, reverse, fp, file)
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case GE:
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if (mode == CCNOmode || mode == CCGOCmode)
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suffix = "ns";
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else if (mode == CCmode || mode == CCGCmode || mode == CCRCmode)
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else if (mode == CCmode || mode == CCGCmode)
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suffix = "ge";
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else
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abort ();
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break;
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case GEU:
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/* ??? As above. */
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if (mode != CCmode && mode != CCRCmode)
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if (mode != CCmode)
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abort ();
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if (mode == CCRCmode)
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suffix = "be";
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else
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suffix = fp ? "nb" : "ae";
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suffix = fp ? "nb" : "ae";
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break;
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case LE:
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if (mode != CCmode && mode != CCGCmode && mode != CCNOmode
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&& mode != CCRCmode)
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if (mode != CCmode && mode != CCGCmode && mode != CCNOmode)
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abort ();
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suffix = "le";
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break;
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case LEU:
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if (mode != CCmode)
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abort ();
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if (mode == CCRCmode)
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suffix = fp ? "nb" : "ae";
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else
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suffix = "be";
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suffix = "be";
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break;
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case UNORDERED:
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suffix = "p";
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@ -4594,13 +4582,6 @@ ix86_match_ccmode (insn, req_mode)
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return 0;
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break;
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case CCmode:
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if (req_mode == CCRCmode)
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return 0;
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goto no_carry;
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case CCRCmode:
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if (req_mode == CCmode)
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return 0;
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no_carry:
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if (req_mode == CCGCmode)
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return 0;
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/* FALLTHRU */
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@ -4732,18 +4713,15 @@ ix86_cc_mode (code, op0, op1)
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case NE: /* ZF!=0 */
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return CCZmode;
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/* Codes needing carry flag. */
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case LTU: /* CF=1 */
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case LEU: /* CF=1 | ZF=1 */
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return CCmode;
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case GEU: /* CF=0 */
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case GTU: /* CF=0 & ZF=0 */
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if (GET_CODE (op1) == NEG)
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return CCRCmode;
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case LTU: /* CF=1 */
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case LEU: /* CF=1 | ZF=1 */
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return CCmode;
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/* Codes possibly doable only with sign flag when
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comparing against zero. */
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case GE: /* SF=OF or SF=0 */
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case LT: /* SF<>OF or SF=0 */
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case LT: /* SF<>OF or SF=1 */
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if (op1 == const0_rtx)
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return CCGOCmode;
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else
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@ -6197,8 +6175,8 @@ ix86_expand_strlensi_unroll_1 (out, align_rtx, scratch)
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/* Avoid branch in fixing the byte. */
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tmpreg = gen_lowpart (QImode, tmpreg);
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emit_insn (gen_addqi3_ccrc (tmpreg, tmpreg, tmpreg));
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emit_insn (gen_subsi3_carry_rc (out, out, GEN_INT (3)));
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emit_insn (gen_addqi3_cc (tmpreg, tmpreg, tmpreg));
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emit_insn (gen_subsi3_carry (out, out, GEN_INT (3)));
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emit_label (end_0_label);
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}
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@ -2478,8 +2478,8 @@ while (0)
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equality comparisons are being done.
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Add CCNO to indicate comparisons against zero that requires
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No Overflow. Sign bit test is used instead and thus
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can be used to form "a&b>0" type of tests.
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Overflow flag to be unset. Sign bit test is used instead and
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thus can be used to form "a&b>0" type of tests.
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Add CCGC to indicate comparisons agains zero that allows
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unspecified garbage in the Carry flag. This mode is used
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@ -2490,14 +2490,10 @@ while (0)
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mode is used to simulate comparisons of (a-b) and (a+b)
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against zero using sub/cmp/add operations.
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Add CCZ to indicate that only the Zero flag is valid.
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Add CCRC to indicate that carry flag is valid, but reversed.
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*/
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Add CCZ to indicate that only the Zero flag is valid. */
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#define EXTRA_CC_MODES \
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CC(CCGCmode, "CCGC") \
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CC(CCRCmode, "CCRC") \
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CC(CCGOCmode, "CCGOC") \
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CC(CCNOmode, "CCNO") \
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CC(CCZmode, "CCZ") \
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@ -71,6 +71,7 @@
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;; 9 This is an `fnstsw' operation.
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;; 10 This is a `sahf' operation.
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;; 11 This is a `fstcw' operation
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;; 12 This is behaviour of add when setting carry flag.
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;; For SSE/MMX support:
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;; 30 This is `fix', guaranteed to be truncating.
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@ -3738,11 +3739,10 @@
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(match_operand:DI 2 "general_operand" "")))
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(clobber (reg:CC 17))]
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"reload_completed"
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[(parallel [(set (reg:CCRC 17)
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(compare:CCRC (match_dup 1) (neg:SI (match_dup 2))))
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[(parallel [(set (reg:CC 17) (unspec:CC [(match_dup 1) (match_dup 2)] 12))
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(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
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(parallel [(set (match_dup 3)
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(plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
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(plus:SI (plus:SI (ltu:SI (reg:CC 17) (const_int 0))
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(match_dup 4))
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(match_dup 5)))
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(clobber (reg:CC 17))])]
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@ -3763,18 +3763,25 @@
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(set_attr "mode" "SI")
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(set_attr "ppro_uops" "few")])
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(define_insn "*addsi3_carry_rc"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
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(plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
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(match_operand:SI 1 "nonimmediate_operand" "%0,0"))
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(match_operand:SI 2 "general_operand" "ri,rm")))
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(clobber (reg:CC 17))]
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(define_insn "*addsi3_cc"
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[(set (reg:CC 17) (unspec:CC [(match_operand:SI 1 "nonimmediate_operand" "%0,0")
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(match_operand:SI 2 "general_operand" "ri,rm")] 12))
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(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
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(plus:SI (match_dup 1) (match_dup 2)))]
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"ix86_binary_operator_ok (PLUS, SImode, operands)"
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"adc{l}\\t{%2, %0|%0, %2}"
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"add{l}\\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "pent_pair" "pu")
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(set_attr "mode" "SI")
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(set_attr "ppro_uops" "few")])
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(set_attr "mode" "SI")])
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(define_insn "addqi3_cc"
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[(set (reg:CC 17) (unspec:CC [(match_operand:QI 1 "nonimmediate_operand" "%0,0")
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(match_operand:QI 2 "general_operand" "qi,qm")] 12))
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(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q")
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(plus:QI (match_dup 1) (match_dup 2)))]
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"ix86_binary_operator_ok (PLUS, QImode, operands)"
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"add{b}\\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "mode" "QI")])
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(define_expand "addsi3"
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[(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "")
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@ -4020,10 +4027,10 @@
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(define_insn "*addsi_3"
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[(set (reg 17)
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(compare (match_operand:SI 1 "nonimmediate_operand" "%0")
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(neg:SI (match_operand:SI 2 "general_operand" "rmni"))))
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(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
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(match_operand:SI 1 "nonimmediate_operand" "%0")))
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(clobber (match_scratch:SI 0 "=r"))]
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"ix86_match_ccmode (insn, CCGCmode)
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"ix86_match_ccmode (insn, CCZmode)
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&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
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/* Current assemblers are broken and do not allow @GOTOFF in
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ought but a memory context. */
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@ -4064,36 +4071,53 @@
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(const_string "alu")))
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(set_attr "mode" "SI")])
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; For comparisons agains 1, -1 and 128, we may generate better code
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; by converting cmp to add, inc or dec as done by peephole2. This pattern
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; is matched then. We can't accept general immediate, because for
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; case of overflows, the result is messed up.
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; This pattern also don't hold of 0x80000000, since the value overflows
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; when negated.
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; Also carry flag is reversed compared to cmp, so this converison is valid
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; only for comparisons not depending on it.
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(define_insn "*addsi_4"
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[(set (reg 17)
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(compare (match_operand:SI 1 "nonimmediate_operand" "%0,0")
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(neg:SI (match_operand:SI 2 "general_operand" "rmni,rni"))))
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(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
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(plus:SI (match_dup 1) (match_dup 2)))]
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"ix86_binary_operator_ok (PLUS, SImode, operands)
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&& ix86_match_ccmode (insn, CCRCmode)
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/* Current assemblers are broken and do not allow @GOTOFF in
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ought but a memory context. */
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&& ! pic_symbolic_operand (operands[2], VOIDmode)"
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"add{l}\\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(compare (match_operand:SI 1 "nonimmediate_operand" "0")
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(match_operand:SI 2 "const_int_operand" "n")))
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(clobber (match_scratch:SI 0 "=rm"))]
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"ix86_match_ccmode (insn, CCGCmode)
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&& (INTVAL (operands[2]) & 0xffffffff) != 0x80000000"
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"*
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{
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switch (get_attr_type (insn))
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{
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case TYPE_INCDEC:
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if (operands[2] == constm1_rtx)
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return \"inc{l}\\t%0\";
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else if (operands[2] == const1_rtx)
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return \"dec{l}\\t%0\";
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else
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abort();
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default:
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if (! rtx_equal_p (operands[0], operands[1]))
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abort ();
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/* Make things pretty and `subl $4,%eax' rather than `addl $-4, %eax'.
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Exceptions: -128 encodes smaller than 128, so swap sign and op. */
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if ((INTVAL (operands[2]) == -128
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|| (INTVAL (operands[2]) > 0
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&& INTVAL (operands[2]) != 128)))
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return \"sub{l}\\t{%2, %0|%0, %2}\";
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operands[2] = GEN_INT (-INTVAL (operands[2]));
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return \"add{l}\\t{%2, %0|%0, %2}\";
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}
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}"
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[(set (attr "type")
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(if_then_else (match_operand:SI 2 "incdec_operand" "")
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(const_string "incdec")
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(const_string "alu")))
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(set_attr "mode" "SI")])
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(define_insn "*addsi_5"
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[(set (reg 17)
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(compare (match_operand:SI 1 "nonimmediate_operand" "%0")
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(neg:SI (match_operand:SI 2 "general_operand" "rmni"))))
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(clobber (match_scratch:SI 0 "=r"))]
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"(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
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&& ix86_match_ccmode (insn, CCRCmode)
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/* Current assemblers are broken and do not allow @GOTOFF in
|
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ought but a memory context. */
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&& ! pic_symbolic_operand (operands[2], VOIDmode)"
|
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"add{l}\\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "mode" "SI")])
|
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|
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(define_insn "*addsi_6"
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[(set (reg 17)
|
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(compare
|
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(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
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|
|
@ -4282,10 +4306,10 @@
|
|||
|
||||
(define_insn "*addhi_3"
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[(set (reg 17)
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(compare (match_operand:HI 1 "nonimmediate_operand" "%0")
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(neg:HI (match_operand:HI 2 "general_operand" "rmni"))))
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(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
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(match_operand:HI 1 "nonimmediate_operand" "%0")))
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(clobber (match_scratch:HI 0 "=r"))]
|
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"ix86_match_ccmode (insn, CCGCmode)
|
||||
"ix86_match_ccmode (insn, CCZmode)
|
||||
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
|
||||
"*
|
||||
{
|
||||
|
|
@ -4320,30 +4344,49 @@
|
|||
(const_string "alu")))
|
||||
(set_attr "mode" "HI")])
|
||||
|
||||
; See comments above addsi_3_imm for details.
|
||||
(define_insn "*addhi_4"
|
||||
[(set (reg 17)
|
||||
(compare (match_operand:HI 1 "nonimmediate_operand" "%0,0")
|
||||
(neg:HI (match_operand:HI 2 "general_operand" "rmni,rni"))))
|
||||
(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
|
||||
(plus:HI (match_dup 1) (match_dup 2)))]
|
||||
"ix86_match_ccmode (insn, CCRCmode)
|
||||
&& ix86_binary_operator_ok (PLUS, HImode, operands)"
|
||||
"add{w}\\t{%2, %0|%0, %2}"
|
||||
[(set_attr "type" "alu")
|
||||
(set_attr "mode" "HI")])
|
||||
(compare (match_operand:HI 1 "nonimmediate_operand" "0")
|
||||
(match_operand:HI 2 "const_int_operand" "n")))
|
||||
(clobber (match_scratch:HI 0 "=rm"))]
|
||||
"ix86_match_ccmode (insn, CCGCmode)
|
||||
&& (INTVAL (operands[2]) & 0xffff) != 0x8000"
|
||||
"*
|
||||
{
|
||||
switch (get_attr_type (insn))
|
||||
{
|
||||
case TYPE_INCDEC:
|
||||
if (operands[2] == constm1_rtx
|
||||
|| (GET_CODE (operands[2]) == CONST_INT
|
||||
&& INTVAL (operands[2]) == 65535))
|
||||
return \"inc{w}\\t%0\";
|
||||
else if (operands[2] == const1_rtx)
|
||||
return \"dec{w}\\t%0\";
|
||||
else
|
||||
abort();
|
||||
|
||||
default:
|
||||
if (! rtx_equal_p (operands[0], operands[1]))
|
||||
abort ();
|
||||
/* Make things pretty and `subl $4,%eax' rather than `addl $-4, %eax'.
|
||||
Exceptions: -128 encodes smaller than 128, so swap sign and op. */
|
||||
if ((INTVAL (operands[2]) == -128
|
||||
|| (INTVAL (operands[2]) > 0
|
||||
&& INTVAL (operands[2]) != 128)))
|
||||
return \"sub{w}\\t{%2, %0|%0, %2}\";
|
||||
operands[2] = GEN_INT (-INTVAL (operands[2]));
|
||||
return \"add{w}\\t{%2, %0|%0, %2}\";
|
||||
}
|
||||
}"
|
||||
[(set (attr "type")
|
||||
(if_then_else (match_operand:HI 2 "incdec_operand" "")
|
||||
(const_string "incdec")
|
||||
(const_string "alu")))
|
||||
(set_attr "mode" "SI")])
|
||||
|
||||
|
||||
(define_insn "*addhi_5"
|
||||
[(set (reg 17)
|
||||
(compare (match_operand:HI 1 "nonimmediate_operand" "%0")
|
||||
(neg:HI (match_operand:HI 2 "general_operand" "rmni"))))
|
||||
(clobber (match_scratch:HI 0 "=r"))]
|
||||
"ix86_match_ccmode (insn, CCRCmode)
|
||||
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
|
||||
"add{w}\\t{%2, %0|%0, %2}"
|
||||
[(set_attr "type" "alu")
|
||||
(set_attr "mode" "HI")])
|
||||
|
||||
(define_insn "*addhi_6"
|
||||
[(set (reg 17)
|
||||
(compare
|
||||
(plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0")
|
||||
|
|
@ -4534,10 +4577,10 @@
|
|||
|
||||
(define_insn "*addqi_3"
|
||||
[(set (reg 17)
|
||||
(compare (match_operand:QI 1 "nonimmediate_operand" "%0")
|
||||
(neg:QI (match_operand:QI 2 "general_operand" "qmni"))))
|
||||
(clobber (match_scratch:QI 0 "=r"))]
|
||||
"ix86_match_ccmode (insn, CCGCmode)
|
||||
(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
|
||||
(match_operand:QI 1 "nonimmediate_operand" "%0")))
|
||||
(clobber (match_scratch:QI 0 "=q"))]
|
||||
"ix86_match_ccmode (insn, CCZmode)
|
||||
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
|
||||
"*
|
||||
{
|
||||
|
|
@ -4569,45 +4612,53 @@
|
|||
(const_string "alu")))
|
||||
(set_attr "mode" "QI")])
|
||||
|
||||
; See comments above addsi_3_imm for details.
|
||||
(define_insn "*addqi_4"
|
||||
[(set (reg 17)
|
||||
(compare (match_operand:QI 1 "nonimmediate_operand" "%0,0")
|
||||
(neg:QI (match_operand:QI 2 "general_operand" "qmni,qni"))))
|
||||
(set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
|
||||
(plus:QI (match_dup 1) (match_dup 2)))]
|
||||
"ix86_match_ccmode (insn, CCRCmode)
|
||||
&& ix86_binary_operator_ok (PLUS, QImode, operands)"
|
||||
"add{b}\\t{%2, %0|%0, %2}"
|
||||
[(set_attr "type" "alu")
|
||||
(compare (match_operand:QI 1 "nonimmediate_operand" "0")
|
||||
(match_operand:QI 2 "const_int_operand" "n")))
|
||||
(clobber (match_scratch:QI 0 "=qm"))]
|
||||
"ix86_match_ccmode (insn, CCGCmode)
|
||||
&& (INTVAL (operands[2]) & 0xff) != 0x80"
|
||||
"*
|
||||
{
|
||||
switch (get_attr_type (insn))
|
||||
{
|
||||
case TYPE_INCDEC:
|
||||
if (operands[2] == constm1_rtx
|
||||
|| (GET_CODE (operands[2]) == CONST_INT
|
||||
&& INTVAL (operands[2]) == 255))
|
||||
return \"inc{b}\\t%0\";
|
||||
else if (operands[2] == const1_rtx)
|
||||
return \"dec{b}\\t%0\";
|
||||
else
|
||||
abort();
|
||||
|
||||
default:
|
||||
if (! rtx_equal_p (operands[0], operands[1]))
|
||||
abort ();
|
||||
if (INTVAL (operands[2]) < 0)
|
||||
{
|
||||
operands[2] = GEN_INT (-INTVAL (operands[2]));
|
||||
return \"add{b}\\t{%2, %0|%0, %2}\";
|
||||
}
|
||||
return \"sub{b}\\t{%2, %0|%0, %2}\";
|
||||
}
|
||||
}"
|
||||
[(set (attr "type")
|
||||
(if_then_else (match_operand:HI 2 "incdec_operand" "")
|
||||
(const_string "incdec")
|
||||
(const_string "alu")))
|
||||
(set_attr "mode" "QI")])
|
||||
|
||||
(define_expand "addqi3_ccrc"
|
||||
[(parallel [
|
||||
(set (reg:CCRC 17)
|
||||
(compare:CCRC (match_operand:QI 1 "nonimmediate_operand" "")
|
||||
(neg:QI (match_operand:QI 2 "general_operand" ""))))
|
||||
(clobber (match_scratch:QI 0 ""))])]
|
||||
""
|
||||
"")
|
||||
|
||||
(define_insn "*addqi_5"
|
||||
[(set (reg 17)
|
||||
(compare (match_operand:QI 1 "nonimmediate_operand" "%0")
|
||||
(neg:QI (match_operand:QI 2 "general_operand" "qmni"))))
|
||||
(clobber (match_scratch:QI 0 "=r"))]
|
||||
"ix86_match_ccmode (insn, CCRCmode)
|
||||
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
|
||||
"add{b}\\t{%2, %0|%0, %2}"
|
||||
[(set_attr "type" "alu")
|
||||
(set_attr "mode" "QI")])
|
||||
|
||||
(define_insn "*addqi_6"
|
||||
[(set (reg 17)
|
||||
(compare
|
||||
(plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0")
|
||||
(match_operand:QI 2 "general_operand" "qmni"))
|
||||
(const_int 0)))
|
||||
(clobber (match_scratch:QI 0 "=r"))]
|
||||
(clobber (match_scratch:QI 0 "=q"))]
|
||||
"ix86_match_ccmode (insn, CCGOCmode)
|
||||
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
|
||||
"*
|
||||
|
|
@ -4748,7 +4799,7 @@
|
|||
split_di (operands+1, 1, operands+1, operands+4);
|
||||
split_di (operands+2, 1, operands+2, operands+5);")
|
||||
|
||||
(define_insn "*subsi3_carry"
|
||||
(define_insn "subsi3_carry"
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
|
||||
(minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
|
||||
(plus:SI (ltu:SI (reg:CC 17) (const_int 0))
|
||||
|
|
@ -4761,19 +4812,6 @@
|
|||
(set_attr "ppro_uops" "few")
|
||||
(set_attr "mode" "SI")])
|
||||
|
||||
(define_insn "subsi3_carry_rc"
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
|
||||
(minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
|
||||
(plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
|
||||
(match_operand:SI 2 "general_operand" "ri,rm"))))
|
||||
(clobber (reg:CC 17))]
|
||||
"ix86_binary_operator_ok (MINUS, SImode, operands)"
|
||||
"sbb{l}\\t{%2, %0|%0, %2}"
|
||||
[(set_attr "type" "alu")
|
||||
(set_attr "pent_pair" "pu")
|
||||
(set_attr "ppro_uops" "few")
|
||||
(set_attr "mode" "SI")])
|
||||
|
||||
(define_expand "subsi3"
|
||||
[(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "")
|
||||
(minus:SI (match_operand:SI 1 "nonimmediate_operand" "")
|
||||
|
|
@ -5933,7 +5971,7 @@
|
|||
(compare (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0")
|
||||
(match_operand:QI 2 "general_operand" "qim"))
|
||||
(const_int 0)))
|
||||
(clobber (match_scratch:QI 0 "=r"))]
|
||||
(clobber (match_scratch:QI 0 "=q"))]
|
||||
"ix86_match_ccmode (insn, CCNOmode)
|
||||
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
|
||||
"or{b}\\t{%2, %0|%0, %2}"
|
||||
|
|
@ -6092,7 +6130,7 @@
|
|||
(xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0")
|
||||
(match_operand:QI 2 "general_operand" "qim"))
|
||||
(const_int 0)))
|
||||
(clobber (match_scratch:QI 0 "=r"))]
|
||||
(clobber (match_scratch:QI 0 "=q"))]
|
||||
"ix86_match_ccmode (insn, CCNOmode)
|
||||
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
|
||||
"xor{b}\\t{%2, %0|%0, %2}"
|
||||
|
|
@ -6169,7 +6207,7 @@
|
|||
(set (match_dup 0) (neg:SI (match_dup 2)))])
|
||||
(parallel
|
||||
[(set (match_dup 1)
|
||||
(plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
|
||||
(plus:SI (plus:SI (ltu:SI (reg:CC 17) (const_int 0))
|
||||
(match_dup 3))
|
||||
(const_int 0)))
|
||||
(clobber (reg:CC 17))])
|
||||
|
|
@ -10603,22 +10641,6 @@
|
|||
(set_attr "mode" "SI")
|
||||
(set_attr "length_immediate" "0")])
|
||||
|
||||
(define_insn "x86_movsicc_0_m1_rc"
|
||||
[(set (match_operand:SI 0 "register_operand" "=r")
|
||||
(if_then_else:SI (gtu (reg:CCRC 17) (const_int 0))
|
||||
(const_int -1)
|
||||
(const_int 0)))
|
||||
(clobber (reg:CC 17))]
|
||||
""
|
||||
"sbb{l}\\t%0, %0"
|
||||
; Since we don't have the proper number of operands for an alu insn,
|
||||
; fill in all the blanks.
|
||||
[(set_attr "type" "alu")
|
||||
(set_attr "memory" "none")
|
||||
(set_attr "imm_disp" "false")
|
||||
(set_attr "mode" "SI")
|
||||
(set_attr "length_immediate" "0")])
|
||||
|
||||
(define_insn "*movsicc_noc"
|
||||
[(set (match_operand:SI 0 "register_operand" "=r,r")
|
||||
(if_then_else:SI (match_operator 1 "ix86_comparison_operator"
|
||||
|
|
@ -11457,9 +11479,9 @@
|
|||
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
|
||||
[(parallel [(set (reg:CCGC 17)
|
||||
(compare:CCGC (match_dup 0)
|
||||
(neg:SI (match_dup 1))))
|
||||
(match_dup 1)))
|
||||
(clobber (match_dup 0))])]
|
||||
"operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
|
||||
"")
|
||||
|
||||
(define_peephole2
|
||||
[(set (reg 17)
|
||||
|
|
@ -11469,9 +11491,9 @@
|
|||
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
|
||||
[(parallel [(set (reg:CCGC 17)
|
||||
(compare:CCGC (match_dup 0)
|
||||
(neg:HI (match_dup 1))))
|
||||
(match_dup 1)))
|
||||
(clobber (match_dup 0))])]
|
||||
"operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
|
||||
"")
|
||||
|
||||
(define_peephole2
|
||||
[(set (reg 17)
|
||||
|
|
@ -11481,20 +11503,20 @@
|
|||
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
|
||||
[(parallel [(set (reg:CCGC 17)
|
||||
(compare:CCGC (match_dup 0)
|
||||
(neg:QI (match_dup 1))))
|
||||
(match_dup 1)))
|
||||
(clobber (match_dup 0))])]
|
||||
"operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
|
||||
"")
|
||||
|
||||
;; Convert compares with 128 to shorter add -128
|
||||
(define_peephole2
|
||||
[(set (reg 17)
|
||||
(compare (match_operand:SI 0 "register_operand" "")
|
||||
(const_int 128)))]
|
||||
"ix86_match_ccmode (insn, CCRCmode)
|
||||
"ix86_match_ccmode (insn, CCGCmode)
|
||||
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
|
||||
[(parallel [(set (reg:CCRC 17)
|
||||
(compare:CCRC (match_dup 0)
|
||||
(neg:SI (const_int -128))))
|
||||
[(parallel [(set (reg:CCGC 17)
|
||||
(compare:CCGC (match_dup 0)
|
||||
(const_int 128)))
|
||||
(clobber (match_dup 0))])]
|
||||
"")
|
||||
|
||||
|
|
@ -11502,11 +11524,11 @@
|
|||
[(set (reg 17)
|
||||
(compare (match_operand:HI 0 "register_operand" "")
|
||||
(const_int 128)))]
|
||||
"ix86_match_ccmode (insn, CCRCmode)
|
||||
"ix86_match_ccmode (insn, CCGCmode)
|
||||
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
|
||||
[(parallel [(set (reg:CCRC 17)
|
||||
(compare:CCRC (match_dup 0)
|
||||
(neg:HI (const_int -128))))
|
||||
[(parallel [(set (reg:CCGC 17)
|
||||
(compare:CCGC (match_dup 0)
|
||||
(const_int 128)))
|
||||
(clobber (match_dup 0))])]
|
||||
"")
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue