[MIPS] Disable -mbranch-likely for -Os when targetting generic arch
gcc/ * config/mips/mips-cpus.def: Replace PTF_AVOID_BRANCHLIKELY with PTF_AVOID_BRANCHLIKELY_ALWAYS for generic architecture and with PTF_AVOID_BRANCHLIKELY_SPEED for others. (mips2, mips3, mips4): Add PTF_AVOID_BRANCHLIKELY_SIZE to tune flags. * config/mips/mips.c (mips_option_override): Enable the branch likely depending on the tune flags and optimization level. * config/mips/mips.h (PTF_AVOID_BRANCHLIKELY): Remove. (PTF_AVOID_BRANCHLIKELY_SPEED): Define. (PTF_AVOID_BRANCHLIKELY_SIZE): Likewise. (PTF_AVOID_BRANCHLIKELY_ALWAYS): Likewise. From-SVN: r240965
This commit is contained in:
Robert Suchanek
Robert Suchanek
parent
ec1db2a994
commit
7c50766489
4 changed files with 66 additions and 35 deletions
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@ -1,3 +1,17 @@
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2016-10-11 Robert Suchanek <robert.suchanek@imgtec.com>
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* config/mips/mips-cpus.def: Replace PTF_AVOID_BRANCHLIKELY with
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PTF_AVOID_BRANCHLIKELY_ALWAYS for generic architecture and with
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PTF_AVOID_BRANCHLIKELY_SPEED for others.
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(mips2, mips3, mips4): Add PTF_AVOID_BRANCHLIKELY_SIZE to tune
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flags.
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* config/mips/mips.c (mips_option_override): Enable the branch
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likely depending on the tune flags and optimization level.
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* config/mips/mips.h (PTF_AVOID_BRANCHLIKELY): Remove.
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(PTF_AVOID_BRANCHLIKELY_SPEED): Define.
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(PTF_AVOID_BRANCHLIKELY_SIZE): Likewise.
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(PTF_AVOID_BRANCHLIKELY_ALWAYS): Likewise.
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2016-10-11 Richard Biener <rguenther@suse.de>
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* lto-streamer-out.c (collect_block_tree_leafs): New helper.
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@ -34,25 +34,25 @@ along with GCC; see the file COPYING3. If not see
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/* Entries for generic ISAs. */
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MIPS_CPU ("mips1", PROCESSOR_R3000, 1, 0)
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MIPS_CPU ("mips2", PROCESSOR_R6000, 2, 0)
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MIPS_CPU ("mips3", PROCESSOR_R4000, 3, 0)
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MIPS_CPU ("mips4", PROCESSOR_R10000, 4, 0)
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MIPS_CPU ("mips2", PROCESSOR_R6000, 2, PTF_AVOID_BRANCHLIKELY_SIZE)
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MIPS_CPU ("mips3", PROCESSOR_R4000, 3, PTF_AVOID_BRANCHLIKELY_SIZE)
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MIPS_CPU ("mips4", PROCESSOR_R10000, 4, PTF_AVOID_BRANCHLIKELY_SIZE)
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/* Prefer not to use branch-likely instructions for generic MIPS32rX
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and MIPS64rX code. The instructions were officially deprecated
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in revisions 2 and earlier, but revision 3 is likely to downgrade
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that to a recommendation to avoid the instructions in code that
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isn't tuned to a specific processor. */
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MIPS_CPU ("mips32", PROCESSOR_4KC, 32, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips32r2", PROCESSOR_74KF2_1, 33, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips32", PROCESSOR_4KC, 32, PTF_AVOID_BRANCHLIKELY_ALWAYS)
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MIPS_CPU ("mips32r2", PROCESSOR_74KF2_1, 33, PTF_AVOID_BRANCHLIKELY_ALWAYS)
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/* mips32r3 is micromips hense why it uses the M4K processor. */
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MIPS_CPU ("mips32r3", PROCESSOR_M4K, 34, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips32r5", PROCESSOR_P5600, 36, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips32r3", PROCESSOR_M4K, 34, PTF_AVOID_BRANCHLIKELY_ALWAYS)
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MIPS_CPU ("mips32r5", PROCESSOR_P5600, 36, PTF_AVOID_BRANCHLIKELY_ALWAYS)
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MIPS_CPU ("mips32r6", PROCESSOR_I6400, 37, 0)
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MIPS_CPU ("mips64", PROCESSOR_5KC, 64, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips64", PROCESSOR_5KC, 64, PTF_AVOID_BRANCHLIKELY_ALWAYS)
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/* ??? For now just tune the generic MIPS64r2 and above for 5KC as well. */
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MIPS_CPU ("mips64r2", PROCESSOR_5KC, 65, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips64r3", PROCESSOR_5KC, 66, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips64r5", PROCESSOR_5KC, 68, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips64r2", PROCESSOR_5KC, 65, PTF_AVOID_BRANCHLIKELY_ALWAYS)
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MIPS_CPU ("mips64r3", PROCESSOR_5KC, 66, PTF_AVOID_BRANCHLIKELY_ALWAYS)
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MIPS_CPU ("mips64r5", PROCESSOR_5KC, 68, PTF_AVOID_BRANCHLIKELY_ALWAYS)
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MIPS_CPU ("mips64r6", PROCESSOR_I6400, 69, 0)
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/* MIPS I processors. */
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@ -77,8 +77,8 @@ MIPS_CPU ("r4650", PROCESSOR_R4650, 3, 0)
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MIPS_CPU ("r4700", PROCESSOR_R4700, 3, 0)
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MIPS_CPU ("r5900", PROCESSOR_R5900, 3, 0)
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/* ST Loongson 2E/2F processors. */
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MIPS_CPU ("loongson2e", PROCESSOR_LOONGSON_2E, 3, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("loongson2f", PROCESSOR_LOONGSON_2F, 3, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("loongson2e", PROCESSOR_LOONGSON_2E, 3, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("loongson2f", PROCESSOR_LOONGSON_2F, 3, PTF_AVOID_BRANCHLIKELY_SPEED)
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/* MIPS IV processors. */
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MIPS_CPU ("r8000", PROCESSOR_R8000, 4, 0)
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@ -88,7 +88,7 @@ MIPS_CPU ("r14000", PROCESSOR_R10000, 4, 0)
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MIPS_CPU ("r16000", PROCESSOR_R10000, 4, 0)
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MIPS_CPU ("vr5000", PROCESSOR_R5000, 4, 0)
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MIPS_CPU ("vr5400", PROCESSOR_R5400, 4, 0)
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MIPS_CPU ("vr5500", PROCESSOR_R5500, 4, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("vr5500", PROCESSOR_R5500, 4, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("rm7000", PROCESSOR_R7000, 4, 0)
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MIPS_CPU ("rm9000", PROCESSOR_R9000, 4, 0)
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@ -147,27 +147,27 @@ MIPS_CPU ("1004kf1_1", PROCESSOR_24KF1_1, 33, 0)
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MIPS_CPU ("interaptiv", PROCESSOR_24KF2_1, 33, 0)
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/* MIPS32 Release 5 processors. */
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MIPS_CPU ("p5600", PROCESSOR_P5600, 36, (PTF_AVOID_BRANCHLIKELY
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MIPS_CPU ("p5600", PROCESSOR_P5600, 36, (PTF_AVOID_BRANCHLIKELY_SPEED
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| PTF_AVOID_IMADD))
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MIPS_CPU ("m5100", PROCESSOR_M5100, 36, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("m5101", PROCESSOR_M5100, 36, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("m5100", PROCESSOR_M5100, 36, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("m5101", PROCESSOR_M5100, 36, PTF_AVOID_BRANCHLIKELY_SPEED)
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/* MIPS64 processors. */
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MIPS_CPU ("5kc", PROCESSOR_5KC, 64, 0)
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MIPS_CPU ("5kf", PROCESSOR_5KF, 64, 0)
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MIPS_CPU ("20kc", PROCESSOR_20KC, 64, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("sb1", PROCESSOR_SB1, 64, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("sb1a", PROCESSOR_SB1A, 64, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("sr71000", PROCESSOR_SR71000, 64, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("xlr", PROCESSOR_XLR, 64, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("20kc", PROCESSOR_20KC, 64, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("sb1", PROCESSOR_SB1, 64, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("sb1a", PROCESSOR_SB1A, 64, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("sr71000", PROCESSOR_SR71000, 64, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("xlr", PROCESSOR_XLR, 64, PTF_AVOID_BRANCHLIKELY_SPEED)
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/* MIPS64 Release 2 processors. */
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MIPS_CPU ("loongson3a", PROCESSOR_LOONGSON_3A, 65, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("octeon", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("octeon+", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("octeon2", PROCESSOR_OCTEON2, 65, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("octeon3", PROCESSOR_OCTEON3, 65, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("xlp", PROCESSOR_XLP, 65, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("loongson3a", PROCESSOR_LOONGSON_3A, 65, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("octeon", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("octeon+", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("octeon2", PROCESSOR_OCTEON2, 65, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("octeon3", PROCESSOR_OCTEON3, 65, PTF_AVOID_BRANCHLIKELY_SPEED)
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MIPS_CPU ("xlp", PROCESSOR_XLP, 65, PTF_AVOID_BRANCHLIKELY_SPEED)
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/* MIPS64 Release 6 processors. */
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MIPS_CPU ("i6400", PROCESSOR_I6400, 69, 0)
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@ -19652,8 +19652,15 @@ mips_option_override (void)
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if ((target_flags_explicit & MASK_BRANCHLIKELY) == 0)
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{
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if (ISA_HAS_BRANCHLIKELY
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&& (optimize_size
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|| (mips_tune_info->tune_flags & PTF_AVOID_BRANCHLIKELY) == 0))
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&& ((optimize_size
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&& (mips_tune_info->tune_flags
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& PTF_AVOID_BRANCHLIKELY_SIZE) == 0)
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|| (!optimize_size
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&& optimize > 0
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&& (mips_tune_info->tune_flags
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& PTF_AVOID_BRANCHLIKELY_SPEED) == 0)
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|| (mips_tune_info->tune_flags
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& PTF_AVOID_BRANCHLIKELY_ALWAYS) == 0))
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target_flags |= MASK_BRANCHLIKELY;
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else
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target_flags &= ~MASK_BRANCHLIKELY;
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@ -44,18 +44,28 @@ extern int target_flags_explicit;
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/* Masks that affect tuning.
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PTF_AVOID_BRANCHLIKELY
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PTF_AVOID_BRANCHLIKELY_SPEED
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Set if it is usually not profitable to use branch-likely instructions
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for this target, typically because the branches are always predicted
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taken and so incur a large overhead when not taken.
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for this target when optimizing code for speed, typically because
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the branches are always predicted taken and so incur a large overhead
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when not taken.
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PTF_AVOID_BRANCHLIKELY_SIZE
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As above but when optimizing for size.
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PTF_AVOID_BRANCHLIKELY_ALWAYS
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As above but regardless of whether we optimize for speed or size.
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PTF_AVOID_IMADD
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Set if it is usually not profitable to use the integer MADD or MSUB
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instructions because of the overhead of getting the result out of
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the HI/LO registers. */
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#define PTF_AVOID_BRANCHLIKELY 0x1
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#define PTF_AVOID_IMADD 0x2
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#define PTF_AVOID_BRANCHLIKELY_SPEED 0x1
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#define PTF_AVOID_BRANCHLIKELY_SIZE 0x2
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#define PTF_AVOID_BRANCHLIKELY_ALWAYS (PTF_AVOID_BRANCHLIKELY_SPEED | \
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PTF_AVOID_BRANCHLIKELY_SIZE)
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#define PTF_AVOID_IMADD 0x4
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/* Information about one recognized processor. Defined here for the
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benefit of TARGET_CPU_CPP_BUILTINS. */
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