mips.c (mips_classify_symbol, [...]): (mips_restore_gp, mips_set_return_address, mips_expand_prologue)
* config/mips/mips.c (mips_classify_symbol, mips_fetch_insns): (mips_restore_gp, mips_set_return_address, mips_expand_prologue) (mips16_fp_args, mips_avoid_hazard): Replace abort with gcc_assert. (build_mips16_call_stub): Likewise. Remove daft CALL_INSN checks. (mips_issue_rate): Remove unreachable abort. (mips_symbolic_constant_p, mips_symbolic_address_p, mips_symbol_insns) (mips_output_move, mips_relational_operand_ok_p, mips_arg_info) (mips_block_move_straight, print_operand_address, mips_file_start) (mips_initial_elimination_offset, mips16_fp_args, dump_constants_1) (mips_output_conditional_branch, mips_expand_builtin_direct) (mips_expand_builtin_compare): Replace abort with gcc_unreachable. * config/mips/mips.md (rotr<mode>3, consttable_float): Replace abort with gcc_assert. From-SVN: r86977
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
4c97f95a5b
commit
7ad769fed7
3 changed files with 46 additions and 50 deletions
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@ -1,3 +1,19 @@
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2004-09-02 Richard Sandiford <rsandifo@redhat.com>
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* config/mips/mips.c (mips_classify_symbol, mips_fetch_insns):
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(mips_restore_gp, mips_set_return_address, mips_expand_prologue)
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(mips16_fp_args, mips_avoid_hazard): Replace abort with gcc_assert.
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(build_mips16_call_stub): Likewise. Remove daft CALL_INSN checks.
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(mips_issue_rate): Remove unreachable abort.
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(mips_symbolic_constant_p, mips_symbolic_address_p, mips_symbol_insns)
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(mips_output_move, mips_relational_operand_ok_p, mips_arg_info)
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(mips_block_move_straight, print_operand_address, mips_file_start)
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(mips_initial_elimination_offset, mips16_fp_args, dump_constants_1)
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(mips_output_conditional_branch, mips_expand_builtin_direct)
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(mips_expand_builtin_compare): Replace abort with gcc_unreachable.
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* config/mips/mips.md (rotr<mode>3, consttable_float): Replace abort
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with gcc_assert.
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2004-09-02 Richard Sandiford <rsandifo@redhat.com>
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* config/mips/mips.md (*lea_high64): Change split condition to
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@ -810,8 +810,7 @@ mips_classify_symbol (rtx x)
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return SYMBOL_GENERAL;
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}
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if (GET_CODE (x) != SYMBOL_REF)
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abort ();
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gcc_assert (GET_CODE (x) == SYMBOL_REF);
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if (CONSTANT_POOL_ADDRESS_P (x))
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{
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@ -973,7 +972,7 @@ mips_symbolic_constant_p (rtx x, enum mips_symbol_type *symbol_type)
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case SYMBOL_GOTOFF_LOADGP:
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return false;
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}
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abort ();
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gcc_unreachable ();
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}
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@ -1077,7 +1076,7 @@ mips_symbolic_address_p (enum mips_symbol_type symbol_type,
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case SYMBOL_64_LOW:
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return true;
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}
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abort ();
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gcc_unreachable ();
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}
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@ -1204,7 +1203,7 @@ mips_symbol_insns (enum mips_symbol_type type)
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/* Check whether the offset is a 16- or 32-bit value. */
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return mips_split_p[type] ? 2 : 1;
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}
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abort ();
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gcc_unreachable ();
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}
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/* Return true if X is a legitimate $sp-based address for mode MDOE. */
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@ -1362,9 +1361,7 @@ mips_const_insns (rtx x)
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int
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mips_fetch_insns (rtx x)
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{
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if (GET_CODE (x) != MEM)
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abort ();
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gcc_assert (GET_CODE (x) == MEM);
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return mips_address_insns (XEXP (x, 0), GET_MODE (x));
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}
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@ -2407,7 +2404,7 @@ mips_output_move (rtx dest, rtx src)
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retval[3] = COPNUM_AS_CHAR_FROM_REGNUM (REGNO (src));
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return retval;
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}
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abort ();
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gcc_unreachable ();
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}
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/* Restore $gp from its save slot. Valid only when using o32 or
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@ -2418,8 +2415,7 @@ mips_restore_gp (void)
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{
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rtx address, slot;
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if (!TARGET_ABICALLS || !TARGET_OLDABI)
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abort ();
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gcc_assert (TARGET_ABICALLS && TARGET_OLDABI);
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address = mips_add_offset (pic_offset_table_rtx,
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frame_pointer_needed
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@ -2469,7 +2465,7 @@ mips_relational_operand_ok_p (enum rtx_code code, rtx cmp1)
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return sleu_operand (cmp1, VOIDmode);
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default:
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abort ();
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gcc_unreachable ();
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}
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}
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@ -2839,8 +2835,7 @@ mips_set_return_address (rtx address, rtx scratch)
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rtx slot_address;
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compute_frame_size (get_frame_size ());
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if (((cfun->machine->frame.mask >> 31) & 1) == 0)
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abort ();
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gcc_assert ((cfun->machine->frame.mask >> 31) & 1);
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slot_address = mips_add_offset (scratch, stack_pointer_rtx,
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cfun->machine->frame.gp_sp_offset);
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@ -2887,7 +2882,7 @@ mips_block_move_straight (rtx dest, rtx src, HOST_WIDE_INT length)
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{
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rtx part = adjust_address (src, BLKmode, offset);
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if (!mips_expand_unaligned_load (regs[i], part, bits, 0))
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abort ();
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gcc_unreachable ();
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}
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}
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@ -2899,7 +2894,7 @@ mips_block_move_straight (rtx dest, rtx src, HOST_WIDE_INT length)
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{
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rtx part = adjust_address (dest, BLKmode, offset);
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if (!mips_expand_unaligned_store (part, regs[i], bits, 0))
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abort ();
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gcc_unreachable ();
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}
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/* Mop up any left-over bytes. */
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@ -3115,7 +3110,7 @@ mips_arg_info (const CUMULATIVE_ARGS *cum, enum machine_mode mode,
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break;
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default:
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abort ();
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gcc_unreachable ();
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}
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/* Now decide whether the argument must go in an even-numbered register.
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@ -4998,7 +4993,7 @@ print_operand_address (FILE *file, rtx x)
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output_addr_const (file, x);
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return;
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}
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abort ();
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gcc_unreachable ();
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}
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/* When using assembler macros, keep track of all of small-data externs
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@ -5215,7 +5210,7 @@ mips_file_start (void)
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case ABI_O64: abi_string = "abiO64"; break;
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case ABI_EABI: abi_string = TARGET_64BIT ? "eabi64" : "eabi32"; break;
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default:
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abort ();
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gcc_unreachable ();
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}
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/* Note - we use fprintf directly rather than called named_section()
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because in this way we can avoid creating an allocated section. We
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@ -5845,7 +5840,7 @@ mips_initial_elimination_offset (int from, int to)
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break;
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default:
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abort ();
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gcc_unreachable ();
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}
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if (TARGET_MIPS16 && to == HARD_FRAME_POINTER_REGNUM)
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@ -6155,9 +6150,7 @@ mips_expand_prologue (void)
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from the stack pointer, so use the frame pointer as a
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temporary. We should always be using a frame pointer
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in this case anyway. */
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if (!frame_pointer_needed)
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abort ();
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gcc_assert (frame_pointer_needed);
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emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
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emit_insn (gen_sub3_insn (hard_frame_pointer_rtx,
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hard_frame_pointer_rtx,
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@ -7088,8 +7081,7 @@ mips16_fp_args (FILE *file, int fp_code, int from_fp_p)
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unsigned int f;
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/* This code only works for the original 32 bit ABI and the O64 ABI. */
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if (!TARGET_OLDABI)
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abort ();
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gcc_assert (TARGET_OLDABI);
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if (from_fp_p)
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s = "mfc1";
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@ -7128,7 +7120,7 @@ mips16_fp_args (FILE *file, int fp_code, int from_fp_p)
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}
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}
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else
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abort ();
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gcc_unreachable ();
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++gparg;
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++fparg;
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@ -7285,13 +7277,12 @@ build_mips16_call_stub (rtx retval, rtx fn, rtx arg_size, int fp_code)
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/* This code will only work for o32 and o64 abis. The other ABI's
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require more sophisticated support. */
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if (!TARGET_OLDABI)
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abort ();
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gcc_assert (TARGET_OLDABI);
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/* We can only handle SFmode and DFmode floating point return
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values. */
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if (fpret && GET_MODE (retval) != SFmode && GET_MODE (retval) != DFmode)
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abort ();
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if (fpret)
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gcc_assert (GET_MODE (retval) == SFmode || GET_MODE (retval) == DFmode);
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/* If we're calling via a function pointer, then we must always call
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via a stub. There are magic stubs provided in libgcc.a for each
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@ -7324,8 +7315,6 @@ build_mips16_call_stub (rtx retval, rtx fn, rtx arg_size, int fp_code)
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insn = emit_call_insn (insn);
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/* Put the register usage information on the CALL. */
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if (GET_CODE (insn) != CALL_INSN)
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abort ();
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CALL_INSN_FUNCTION_USAGE (insn) =
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gen_rtx_EXPR_LIST (VOIDmode,
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gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode, 2)),
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@ -7526,9 +7515,6 @@ build_mips16_call_stub (rtx retval, rtx fn, rtx arg_size, int fp_code)
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insn = gen_call_value_internal (retval, fn, arg_size);
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insn = emit_call_insn (insn);
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if (GET_CODE (insn) != CALL_INSN)
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abort ();
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CALL_INSN_FUNCTION_USAGE (insn) =
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gen_rtx_EXPR_LIST (VOIDmode,
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gen_rtx_USE (VOIDmode, gen_rtx_REG (word_mode, 18)),
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@ -7648,7 +7634,7 @@ dump_constants_1 (enum machine_mode mode, rtx value, rtx insn)
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}
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default:
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abort ();
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gcc_unreachable ();
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}
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}
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@ -8211,8 +8197,7 @@ mips_avoid_hazard (rtx after, rtx insn, int *hilo_delay,
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case HAZARD_DELAY:
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set = single_set (insn);
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if (set == 0)
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abort ();
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gcc_assert (set != 0);
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*delayed_reg = SET_DEST (set);
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break;
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}
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@ -8706,7 +8691,7 @@ mips_output_conditional_branch (rtx insn, rtx *operands, int two_operands_p,
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}
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default:
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abort ();
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gcc_unreachable ();
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}
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/* NOTREACHED */
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@ -9241,9 +9226,6 @@ mips_issue_rate (void)
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default:
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return 1;
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}
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abort ();
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}
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/* Implements TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD. This should
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@ -9591,7 +9573,7 @@ mips_expand_builtin_direct (enum insn_code icode, rtx target, tree arglist)
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break;
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default:
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abort ();
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gcc_unreachable ();
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}
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return target;
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}
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@ -9665,7 +9647,7 @@ mips_expand_builtin_compare (enum mips_builtin_type builtin_type,
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break;
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default:
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abort ();
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gcc_unreachable ();
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}
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/* If the comparison sets more than one register, we define the result
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@ -4272,10 +4272,9 @@ beq\t%2,%.,1b\;\
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(match_operand:SI 2 "arith_operand" "dI")))]
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"ISA_HAS_ROTR_<MODE>"
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{
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if ((GET_CODE (operands[2]) == CONST_INT)
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&& (INTVAL (operands[2]) < 0
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|| INTVAL (operands[2]) >= GET_MODE_BITSIZE (<MODE>mode)))
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abort ();
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if (GET_CODE (operands[2]) == CONST_INT)
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gcc_assert (INTVAL (operands[2]) >= 0
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&& INTVAL (operands[2]) < GET_MODE_BITSIZE (<MODE>mode));
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return "<d>ror\t%0,%1,%2";
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}
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@ -5479,8 +5478,7 @@ beq\t%2,%.,1b\;\
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{
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REAL_VALUE_TYPE d;
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if (GET_CODE (operands[0]) != CONST_DOUBLE)
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abort ();
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gcc_assert (GET_CODE (operands[0]) == CONST_DOUBLE);
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REAL_VALUE_FROM_CONST_DOUBLE (d, operands[0]);
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assemble_real (d, GET_MODE (operands[0]),
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GET_MODE_BITSIZE (GET_MODE (operands[0])));
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