procyberian/gcc
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

[RS6000] Fix typos

Browse source 
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Correct
	rs6000_vector_mem init.  Correct wI and wJ comment

From-SVN: r269932
This commit is contained in:
Alan Modra 2019-03-26 15:46:14 +10:30 • committed by Alan Modra
parent 4d7e3ed93d
commit 7a03cad76c
2 changed files with 8 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
gcc/ChangeLog
View file

@ -1,3 +1,8 @@
2019-03-26 Alan Modra <amodra@gmail.com>
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Correct
rs6000_vector_mem init. Correct wI and wJ comment.
2019-03-25 Alexander Monakov <amonakov@ispras.ru>
PR rtl-optimization/88347

6
gcc/config/rs6000/rs6000.c
View file

@ -3050,7 +3050,7 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
below. */
gcc_assert ((int)VECTOR_NONE == 0);
memset ((void *) &rs6000_vector_unit[0], '\0', sizeof (rs6000_vector_unit));
memset ((void *) &rs6000_vector_mem[0], '\0', sizeof (rs6000_vector_unit));
memset ((void *) &rs6000_vector_mem[0], '\0', sizeof (rs6000_vector_mem));
gcc_assert ((int)CODE_FOR_nothing == 0);
memset ((void *) &reg_addr[0], '\0', sizeof (reg_addr));
@ -3204,8 +3204,8 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
wy - Register class to do ISA 2.07 SF operations.
wz - Float register if we can do 32-bit unsigned int loads.
wH - Altivec register if SImode is allowed in VSX registers.
wI - VSX register if SImode is allowed in VSX registers.
wJ - VSX register if QImode/HImode are allowed in VSX registers.
wI - Float register if SImode is allowed in VSX registers.
wJ - Float register if QImode/HImode are allowed in VSX registers.
wK - Altivec register if QImode/HImode are allowed in VSX registers. */
if (TARGET_HARD_FLOAT)