* config/mcore/mcore.h (target_flags, HARDLIT_BIT, ALIGN8_BIT, DIV_BIT)
(RELAX_IMM_BIT, W_FIELD_BIT, OVERALIGN_FUNC_BIT, CGDATA_BIT) (SLOW_BYTES_BIT, LITTLE_END_BIT, M340_BIT, TARGET_HARDLIT) (TARGET_DIV, TARGET_RELAX_IMM, TARGET_W_FIELD, TARGET_OVERALIGN_FUNC) (TARGET_CG_DATA, TARGET_SLOW_BYTES, TARGET_LITTLE_END, TARGET_M340) (TARGET_SWITCHES, mcore_stack_increment_string) (TARGET_OPTIONS): Delete. (TARGET_DEFAULT, OPTIMIZATION_OPTIONS): Use MASK_* constants rather than *_BIT constants. (TARGET_8ALIGN): #undef old definition before redefining to 1. * config/mcore/mcore.c (mcore_stack_increment_string): Delete. (TARGET_DEFAULT_TARGET_FLAGS): Override default to TARGET_DEFAULT. (mcore_override_options): Delete mcore_stack_increment code. Change use of M340_BIT to MASK_M340. * config/mcore/mcore.opt: New file. From-SVN: r97544
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
09c3c5dce7
commit
78fb803804
4 changed files with 113 additions and 105 deletions
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@ -1,3 +1,21 @@
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2005-04-04 Richard Sandiford <rsandifo@redhat.com>
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* config/mcore/mcore.h (target_flags, HARDLIT_BIT, ALIGN8_BIT, DIV_BIT)
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(RELAX_IMM_BIT, W_FIELD_BIT, OVERALIGN_FUNC_BIT, CGDATA_BIT)
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(SLOW_BYTES_BIT, LITTLE_END_BIT, M340_BIT, TARGET_HARDLIT)
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(TARGET_DIV, TARGET_RELAX_IMM, TARGET_W_FIELD, TARGET_OVERALIGN_FUNC)
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(TARGET_CG_DATA, TARGET_SLOW_BYTES, TARGET_LITTLE_END, TARGET_M340)
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(TARGET_SWITCHES, mcore_stack_increment_string)
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(TARGET_OPTIONS): Delete.
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(TARGET_DEFAULT, OPTIMIZATION_OPTIONS): Use MASK_* constants rather
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than *_BIT constants.
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(TARGET_8ALIGN): #undef old definition before redefining to 1.
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* config/mcore/mcore.c (mcore_stack_increment_string): Delete.
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(TARGET_DEFAULT_TARGET_FLAGS): Override default to TARGET_DEFAULT.
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(mcore_override_options): Delete mcore_stack_increment code.
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Change use of M340_BIT to MASK_M340.
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* config/mcore/mcore.opt: New file.
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2005-04-04 Ian Lance Taylor <ian@airs.com>
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* config/arm/arm.c (replace_symbols_in_block): Remove static
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@ -49,8 +49,7 @@
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/* Maximum size we are allowed to grow the stack in a single operation.
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If we want more, we must do it in increments of at most this size.
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If this value is 0, we don't check at all. */
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const char * mcore_stack_increment_string = 0;
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int mcore_stack_increment = STACK_UNITS_MAXSTEP;
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int mcore_stack_increment = STACK_UNITS_MAXSTEP;
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/* For dumping information about frame sizes. */
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char * mcore_current_function_name = 0;
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@ -176,6 +175,8 @@ static int mcore_arg_partial_bytes (CUMULATIVE_ARGS *,
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#define TARGET_ASM_UNIQUE_SECTION mcore_unique_section
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#undef TARGET_ASM_FUNCTION_RODATA_SECTION
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#define TARGET_ASM_FUNCTION_RODATA_SECTION default_no_function_rodata_section
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#undef TARGET_DEFAULT_TARGET_FLAGS
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#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
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#undef TARGET_ENCODE_SECTION_INFO
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#define TARGET_ENCODE_SECTION_INFO mcore_encode_section_info
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#undef TARGET_STRIP_NAME_ENCODING
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@ -2981,21 +2982,9 @@ mcore_is_same_reg (rtx x, rtx y)
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void
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mcore_override_options (void)
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{
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if (mcore_stack_increment_string)
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{
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mcore_stack_increment = atoi (mcore_stack_increment_string);
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if (mcore_stack_increment < 0
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|| (mcore_stack_increment == 0
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&& (mcore_stack_increment_string[0] != '0'
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|| mcore_stack_increment_string[1] != 0)))
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error ("invalid option %<-mstack-increment=%s%>",
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mcore_stack_increment_string);
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}
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/* Only the m340 supports little endian code. */
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if (TARGET_LITTLE_END && ! TARGET_M340)
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target_flags |= M340_BIT;
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target_flags |= MASK_M340;
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}
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/* Compute the number of word sized registers needed to
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@ -66,105 +66,26 @@
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#undef LINK_SPEC
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#define LINK_SPEC "%{mbig-endian:-EB} %{m210:-EB} -X"
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/* Can only count on 16 bits of availability; change to long would affect
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many architecture specific files (other architectures...). */
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extern int target_flags;
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#define HARDLIT_BIT (1 << 0) /* Build in-line literals using 2 insns. */
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#define ALIGN8_BIT (1 << 1) /* Max alignment goes to 8 instead of 4. */
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#define DIV_BIT (1 << 2) /* Generate divide instructions. */
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#define RELAX_IMM_BIT (1 << 3) /* Arbitrary immediates in and, or, tst. */
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#define W_FIELD_BIT (1 << 4) /* Generate bit insv/extv using SImode. */
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#define OVERALIGN_FUNC_BIT (1 << 5) /* Align functions to 4 byte boundary. */
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#define CGDATA_BIT (1 << 6) /* Generate callgraph data. */
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#define SLOW_BYTES_BIT (1 << 7) /* Slow byte access. */
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#define LITTLE_END_BIT (1 << 8) /* Generate little endian code. */
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#define M340_BIT (1 << 9) /* Generate code for the m340. */
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#define TARGET_DEFAULT \
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(HARDLIT_BIT | ALIGN8_BIT | DIV_BIT | RELAX_IMM_BIT | M340_BIT | LITTLE_END_BIT)
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#define TARGET_DEFAULT \
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(MASK_HARDLIT \
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| MASK_8ALIGN \
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| MASK_DIV \
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| MASK_RELAX_IMM \
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| MASK_M340 \
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| MASK_LITTLE_END)
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#ifndef MULTILIB_DEFAULTS
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#define MULTILIB_DEFAULTS { "mlittle-endian", "m340" }
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#endif
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#define TARGET_HARDLIT (target_flags & HARDLIT_BIT)
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/* The ability to have 4 byte alignment is being suppressed for now.
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If this ability is reenabled, you must enable the definition below
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If this ability is reenabled, you must disable the definition below
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*and* edit t-mcore to enable multilibs for 4 byte alignment code. */
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#if 0
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#define TARGET_8ALIGN (target_flags & ALIGN8_BIT)
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#else
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#define TARGET_8ALIGN 1
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#endif
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#define TARGET_DIV (target_flags & DIV_BIT)
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#define TARGET_RELAX_IMM (target_flags & RELAX_IMM_BIT)
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#define TARGET_W_FIELD (target_flags & W_FIELD_BIT)
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#define TARGET_OVERALIGN_FUNC (target_flags & OVERALIGN_FUNC_BIT)
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#define TARGET_CG_DATA (target_flags & CGDATA_BIT)
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#define TARGET_CG_DATA (target_flags & CGDATA_BIT)
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#define TARGET_SLOW_BYTES (target_flags & SLOW_BYTES_BIT)
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#define TARGET_LITTLE_END (target_flags & LITTLE_END_BIT)
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#define TARGET_M340 (target_flags & M340_BIT)
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#define TARGET_SWITCHES \
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{ {"hardlit", HARDLIT_BIT, \
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N_("Inline constants if it can be done in 2 insns or less") }, \
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{"no-hardlit", - HARDLIT_BIT, \
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N_("Inline constants if it only takes 1 instruction") }, \
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{"4align", - ALIGN8_BIT, \
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N_("Set maximum alignment to 4") }, \
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{"8align", ALIGN8_BIT, \
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N_("Set maximum alignment to 8") }, \
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{"div", DIV_BIT, \
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"" }, \
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{"no-div", - DIV_BIT, \
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N_("Do not use the divide instruction") }, \
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{"relax-immediates", RELAX_IMM_BIT, \
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"" }, \
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{"no-relax-immediates", - RELAX_IMM_BIT, \
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N_("Do not arbitrary sized immediates in bit operations") }, \
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{"wide-bitfields", W_FIELD_BIT, \
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N_("Always treat bit-field as int-sized") }, \
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{"no-wide-bitfields", - W_FIELD_BIT, \
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"" }, \
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{"4byte-functions", OVERALIGN_FUNC_BIT, \
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N_("Force functions to be aligned to a 4 byte boundary") }, \
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{"no-4byte-functions", - OVERALIGN_FUNC_BIT, \
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N_("Force functions to be aligned to a 2 byte boundary") }, \
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{"callgraph-data", CGDATA_BIT, \
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N_("Emit call graph information") }, \
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{"no-callgraph-data", - CGDATA_BIT, \
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"" }, \
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{"slow-bytes", SLOW_BYTES_BIT, \
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N_("Prefer word accesses over byte accesses") }, \
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{"no-slow-bytes", - SLOW_BYTES_BIT, \
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"" }, \
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{ "no-lsim", 0, "" }, \
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{"little-endian", LITTLE_END_BIT, \
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N_("Generate little endian code") }, \
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{"big-endian", - LITTLE_END_BIT, \
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"" }, \
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{"210", - M340_BIT, \
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"" }, \
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{"340", M340_BIT, \
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N_("Generate code for the M*Core M340") }, \
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{"", TARGET_DEFAULT, \
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"" } \
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}
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#undef TARGET_8ALIGN
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#define TARGET_8ALIGN 1
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extern char * mcore_current_function_name;
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/* Target specific options (as opposed to the switches above). */
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extern const char * mcore_stack_increment_string;
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#define TARGET_OPTIONS \
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{ \
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{"stack-increment=", & mcore_stack_increment_string, \
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N_("Maximum amount for a single stack increment operation"), 0} \
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}
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/* The MCore ABI says that bitfields are unsigned by default. */
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#define CC1_SPEC "-funsigned-bitfields"
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@ -189,7 +110,7 @@ extern const char * mcore_stack_increment_string;
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} \
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if (SIZE) \
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{ \
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target_flags &= ~ HARDLIT_BIT; \
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target_flags &= ~MASK_HARDLIT; \
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} \
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}
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80
gcc/config/mcore/mcore.opt
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80
gcc/config/mcore/mcore.opt
Normal file
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@ -0,0 +1,80 @@
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; Options for the Motorola MCore port of the compiler.
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; Copyright (C) 2005 Free Software Foundation, Inc.
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;
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; This file is part of GCC.
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;
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; GCC is free software; you can redistribute it and/or modify it under
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; the terms of the GNU General Public License as published by the Free
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; Software Foundation; either version 2, or (at your option) any later
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; version.
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;
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; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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; WARRANTY; without even the implied warranty of MERCHANTABILITY or
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; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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; for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with GCC; see the file COPYING. If not, write to the Free
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; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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; 02111-1307, USA.
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m210
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Target RejectNegative Report InverseMask(M340)
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Generate code for the M*Core M210
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m340
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Target RejectNegative Report Mask(M340)
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Generate code for the M*Core M340
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m4align
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Target RejectNegative Report InverseMask(8ALIGN)
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Set maximum alignment to 4
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m4byte-functions
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Target Report Mask(OVERALIGN_FUNC)
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Force functions to be aligned to a 4 byte boundary
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m8align
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Target RejectNegative Report Mask(8ALIGN)
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Set maximum alignment to 8
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mbig-endian
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Target RejectNegative Report InverseMask(LITTLE_END)
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Generate big-endian code
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mcallgraph-data
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Target Report Mask(CG_DATA)
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Emit call graph information
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mdiv
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Target Report Mask(DIV)
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Use the divide instruction
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mhardlit
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Target Report Mask(HARDLIT)
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Inline constants if it can be done in 2 insns or less
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mlittle-endian
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Target RejectNegative Report Mask(LITTLE_END)
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Generate little-endian code
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; Not used by the compiler proper.
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mno-lsim
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Target RejectNegative Undocumented
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mrelax-immediates
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Target Report Mask(RELAX_IMM)
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Use arbitrary sized immediates in bit operations
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mslow-bytes
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Target Report Mask(SLOW_BYTES)
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Prefer word accesses over byte accesses
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mstack-increment=
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Target RejectNegative Joined UInteger Var(mcore_stack_increment) VarExists
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Set the maximum amount for a single stack increment operation
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mwide-bitfields
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Target Report Mask(W_FIELD)
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Always treat bitfields as int-sized
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