diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 30e59fce7c5..c0019d2179f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2006-11-25  Uros Bizjak  <ubizjak@gmail.com>
+
+	config/i386/i386.md (fpremxf4): Rename to fpremxf4_i387.
+	(fprem1xf4): Rename to fprem1xf4_i387.
+
+	(fmodsf3, fmoddf3): Macroize patterns using X87MODEF12 mode macro.
+	Rename patterns to fmod<mode>3.  Use general_operand operand
+	constraint for operands 1 and 2.  Use SSE_FLOAT_MODE_P to disable
+	patterns for SSE math.
+	(remaindersf3, remainderdf3): Ditto.
+
 2006-11-25  Joseph Myers  <joseph@codesourcery.com>
 
 	* function.c (instantiate_virtual_regs_in_insn): Call force_reg
@@ -252,7 +263,7 @@
 	(erase_self_graph_edge): Ditto.
 	(add_graph_edge): Removed.
 	(get_graph_weights): Ditto.
-	(allocate_graph_weights): Ditto.	(
+	(allocate_graph_weights): Ditto.
 	(valid_weighted_graph_edge): Ditto
 	(bitmap_other_than_zero_bit_set): Ditto.
 	(int_add_graph_edge): Renamed to add_graph_edge.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index f9242fb44fa..4caeda664d6 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -15549,7 +15549,7 @@
    (set_attr "mode" "XF")
    (set_attr "athlon_decode" "direct")])
 
-(define_insn "sqrt<mode>xf2_i387"
+(define_insn "sqrt_extend<mode>xf2_i387"
   [(set (match_operand:XF 0 "register_operand" "=f")
 	(sqrt:XF
 	  (float_extend:XF
@@ -15582,13 +15582,13 @@
       rtx op0 = gen_reg_rtx (XFmode);
       rtx op1 = force_reg (<MODE>mode, operands[1]);
 
-      emit_insn (gen_sqrt<mode>xf2_i387 (op0, op1));
+      emit_insn (gen_sqrt_extend<mode>xf2_i387 (op0, op1));
       emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op0));
       DONE;
    }
 })
 
-(define_insn "fpremxf4"
+(define_insn "fpremxf4_i387"
   [(set (match_operand:XF 0 "register_operand" "=f")
 	(unspec:XF [(match_operand:XF 2 "register_operand" "0")
 		    (match_operand:XF 3 "register_operand" "1")]
@@ -15603,54 +15603,6 @@
   [(set_attr "type" "fpspc")
    (set_attr "mode" "XF")])
 
-(define_expand "fmodsf3"
-  [(use (match_operand:SF 0 "register_operand" ""))
-   (use (match_operand:SF 1 "register_operand" ""))
-   (use (match_operand:SF 2 "register_operand" ""))]
-  "TARGET_USE_FANCY_MATH_387
-   && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)"
-{
-  rtx label = gen_label_rtx ();
-
-  rtx op1 = gen_reg_rtx (XFmode);
-  rtx op2 = gen_reg_rtx (XFmode);
-
-  emit_insn(gen_extendsfxf2 (op1, operands[1]));
-  emit_insn(gen_extendsfxf2 (op2, operands[2]));
-
-  emit_label (label);
-
-  emit_insn (gen_fpremxf4 (op1, op2, op1, op2));
-  ix86_emit_fp_unordered_jump (label);
-
-  emit_insn (gen_truncxfsf2_i387_noop_unspec (operands[0], op1));
-  DONE;
-})
-
-(define_expand "fmoddf3"
-  [(use (match_operand:DF 0 "register_operand" ""))
-   (use (match_operand:DF 1 "register_operand" ""))
-   (use (match_operand:DF 2 "register_operand" ""))]
-  "TARGET_USE_FANCY_MATH_387
-   && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)"
-{
-  rtx label = gen_label_rtx ();
-
-  rtx op1 = gen_reg_rtx (XFmode);
-  rtx op2 = gen_reg_rtx (XFmode);
-
-  emit_insn (gen_extenddfxf2 (op1, operands[1]));
-  emit_insn (gen_extenddfxf2 (op2, operands[2]));
-
-  emit_label (label);
-
-  emit_insn (gen_fpremxf4 (op1, op2, op1, op2));
-  ix86_emit_fp_unordered_jump (label);
-
-  emit_insn (gen_truncxfdf2_i387_noop_unspec (operands[0], op1));
-  DONE;
-})
-
 (define_expand "fmodxf3"
   [(use (match_operand:XF 0 "register_operand" ""))
    (use (match_operand:XF 1 "register_operand" ""))
@@ -15661,15 +15613,39 @@
 
   emit_label (label);
 
-  emit_insn (gen_fpremxf4 (operands[1], operands[2],
-			   operands[1], operands[2]));
+  emit_insn (gen_fpremxf4_i387 (operands[1], operands[2],
+				operands[1], operands[2]));
   ix86_emit_fp_unordered_jump (label);
 
   emit_move_insn (operands[0], operands[1]);
   DONE;
 })
 
-(define_insn "fprem1xf4"
+(define_expand "fmod<mode>3"
+  [(use (match_operand:X87MODEF12 0 "register_operand" ""))
+   (use (match_operand:X87MODEF12 1 "general_operand" ""))
+   (use (match_operand:X87MODEF12 2 "general_operand" ""))]
+  "TARGET_USE_FANCY_MATH_387
+   && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
+       || TARGET_MIX_SSE_I387)"
+{
+  rtx label = gen_label_rtx ();
+
+  rtx op1 = gen_reg_rtx (XFmode);
+  rtx op2 = gen_reg_rtx (XFmode);
+
+  emit_insn(gen_extend<mode>xf2 (op1, operands[1]));
+  emit_insn(gen_extend<mode>xf2 (op2, operands[2]));
+
+  emit_label (label);
+  emit_insn (gen_fpremxf4_i387 (op1, op2, op1, op2));
+  ix86_emit_fp_unordered_jump (label);
+
+  emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
+  DONE;
+})
+
+(define_insn "fprem1xf4_i387"
   [(set (match_operand:XF 0 "register_operand" "=f")
 	(unspec:XF [(match_operand:XF 2 "register_operand" "0")
 		    (match_operand:XF 3 "register_operand" "1")]
@@ -15684,54 +15660,6 @@
   [(set_attr "type" "fpspc")
    (set_attr "mode" "XF")])
 
-(define_expand "remaindersf3"
-  [(use (match_operand:SF 0 "register_operand" ""))
-   (use (match_operand:SF 1 "register_operand" ""))
-   (use (match_operand:SF 2 "register_operand" ""))]
-  "TARGET_USE_FANCY_MATH_387
-   && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)"
-{
-  rtx label = gen_label_rtx ();
-
-  rtx op1 = gen_reg_rtx (XFmode);
-  rtx op2 = gen_reg_rtx (XFmode);
-
-  emit_insn(gen_extendsfxf2 (op1, operands[1]));
-  emit_insn(gen_extendsfxf2 (op2, operands[2]));
-
-  emit_label (label);
-
-  emit_insn (gen_fprem1xf4 (op1, op2, op1, op2));
-  ix86_emit_fp_unordered_jump (label);
-
-  emit_insn (gen_truncxfsf2_i387_noop_unspec (operands[0], op1));
-  DONE;
-})
-
-(define_expand "remainderdf3"
-  [(use (match_operand:DF 0 "register_operand" ""))
-   (use (match_operand:DF 1 "register_operand" ""))
-   (use (match_operand:DF 2 "register_operand" ""))]
-  "TARGET_USE_FANCY_MATH_387
-   && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)"
-{
-  rtx label = gen_label_rtx ();
-
-  rtx op1 = gen_reg_rtx (XFmode);
-  rtx op2 = gen_reg_rtx (XFmode);
-
-  emit_insn (gen_extenddfxf2 (op1, operands[1]));
-  emit_insn (gen_extenddfxf2 (op2, operands[2]));
-
-  emit_label (label);
-
-  emit_insn (gen_fprem1xf4 (op1, op2, op1, op2));
-  ix86_emit_fp_unordered_jump (label);
-
-  emit_insn (gen_truncxfdf2_i387_noop_unspec (operands[0], op1));
-  DONE;
-})
-
 (define_expand "remainderxf3"
   [(use (match_operand:XF 0 "register_operand" ""))
    (use (match_operand:XF 1 "register_operand" ""))
@@ -15742,14 +15670,39 @@
 
   emit_label (label);
 
-  emit_insn (gen_fprem1xf4 (operands[1], operands[2],
-			    operands[1], operands[2]));
+  emit_insn (gen_fprem1xf4_i387 (operands[1], operands[2],
+				 operands[1], operands[2]));
   ix86_emit_fp_unordered_jump (label);
 
   emit_move_insn (operands[0], operands[1]);
   DONE;
 })
 
+(define_expand "remainder<mode>3"
+  [(use (match_operand:X87MODEF12 0 "register_operand" ""))
+   (use (match_operand:X87MODEF12 1 "general_operand" ""))
+   (use (match_operand:X87MODEF12 2 "general_operand" ""))]
+  "TARGET_USE_FANCY_MATH_387
+   && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
+       || TARGET_MIX_SSE_I387)"
+{
+  rtx label = gen_label_rtx ();
+
+  rtx op1 = gen_reg_rtx (XFmode);
+  rtx op2 = gen_reg_rtx (XFmode);
+
+  emit_insn(gen_extend<mode>xf2 (op1, operands[1]));
+  emit_insn(gen_extend<mode>xf2 (op2, operands[2]));
+
+  emit_label (label);
+
+  emit_insn (gen_fprem1xf4_i387 (op1, op2, op1, op2));
+  ix86_emit_fp_unordered_jump (label);
+
+  emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
+  DONE;
+})
+
 (define_insn "*sindf2"
   [(set (match_operand:DF 0 "register_operand" "=f")
 	(unspec:DF [(match_operand:DF 1 "register_operand" "0")] UNSPEC_SIN))]