Update SVE tests for recent XPASSes
Recent target-independent patches mean that several SVE tests now produce the code that we'd originally wanted them to produce. Really nice to see :-) This patch therefore updates the expected baseline, so that hopefully we don't regress from this point in future. 2019-10-25 Richard Sandiford <richard.sandiford@arm.com> gcc/testsuite/ * gcc.target/aarch64/sve/loop_add_5.c: Remove XFAILs for tests that now pass. * gcc.target/aarch64/sve/reduc_1.c: Likewise. * gcc.target/aarch64/sve/reduc_2.c: Likewise. * gcc.target/aarch64/sve/reduc_5.c: Likewise. * gcc.target/aarch64/sve/reduc_8.c: Likewise. * gcc.target/aarch64/sve/slp_13.c: Likewise. * gcc.target/aarch64/sve/slp_5.c: Likewise. Update expected WHILELO counts. * gcc.target/aarch64/sve/slp_7.c: Likewise. From-SVN: r277441
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
f88b78ae37
commit
7815eaa869
9 changed files with 47 additions and 58 deletions
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@ -1,3 +1,16 @@
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2019-10-25 Richard Sandiford <richard.sandiford@arm.com>
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* gcc.target/aarch64/sve/loop_add_5.c: Remove XFAILs for tests
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that now pass.
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* gcc.target/aarch64/sve/reduc_1.c: Likewise.
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* gcc.target/aarch64/sve/reduc_2.c: Likewise.
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* gcc.target/aarch64/sve/reduc_5.c: Likewise.
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* gcc.target/aarch64/sve/reduc_8.c: Likewise.
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* gcc.target/aarch64/sve/slp_13.c: Likewise.
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* gcc.target/aarch64/sve/slp_5.c: Likewise. Update expected
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WHILELO counts.
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* gcc.target/aarch64/sve/slp_7.c: Likewise.
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2019-10-25 Richard Sandiford <richard.sandiford@arm.com>
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* gcc.dg/vect/pr65947-1.c: No longer expect doubled dump lines
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@ -3,11 +3,11 @@
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#include "loop_add_4.c"
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #-16\n} 1 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #-15\n} 1 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #-16\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #-15\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #1\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #15\n} 1 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, w[0-9]+\n} 3 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #15\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, w[0-9]+\n} 3 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.b, p[0-7]+/z, \[x[0-9]+, x[0-9]+\]} 8 } } */
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/* { dg-final { scan-assembler-times {\tst1b\tz[0-9]+\.b, p[0-7]+, \[x[0-9]+, x[0-9]+\]} 8 } } */
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@ -16,11 +16,11 @@
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/* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.b, z[0-9]+\.b, #} 6 } } */
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/* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b\n} 8 } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, #-16\n} 1 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, #-15\n} 1 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, #-16\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, #-15\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, #1\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, #15\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, w[0-9]+\n} 3 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, w[0-9]+\n} 3 } } */
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.h, p[0-7]+/z, \[x[0-9]+, x[0-9]+, lsl 1\]} 8 } } */
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/* { dg-final { scan-assembler-times {\tst1h\tz[0-9]+\.h, p[0-7]+, \[x[0-9]+, x[0-9]+, lsl 1\]} 8 } } */
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@ -105,8 +105,8 @@ reduc_##NAME##_##TYPE (TYPE *a, int n) \
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TEST_BITWISE (DEF_REDUC_BITWISE)
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/* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.b, p[0-7]/m, z[0-9]+\.b, z[0-9]+\.b\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.b, p[0-7]/m, z[0-9]+\.b, z[0-9]+\.b\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */
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@ -157,8 +157,8 @@ TEST_BITWISE (DEF_REDUC_BITWISE)
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/* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */
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/* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.s\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.d\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tfaddv\th[0-9]+, p[0-7], z[0-9]+\.h\n} 1 } } */
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@ -116,8 +116,8 @@ reduc_##NAME##TYPE (TYPE (*restrict a)[NUM_ELEMS(TYPE)], \
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TEST_BITWISE (DEF_REDUC_BITWISE)
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.s\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.d\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tfaddv\th[0-9]+, p[0-7], z[0-9]+\.h\n} 1 } } */
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@ -23,16 +23,12 @@ REDUC (uint64_t)
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REDUC (float)
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REDUC (double)
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/* XFAILed until we support sub-int reductions for signed types. */
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/* { dg-final { scan-assembler-times {\tsub\tz[0-9]+\.b, p[0-7]/m} 2 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tsub\tz[0-9]+\.h, p[0-7]/m} 2 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tsub\tz[0-9]+\.b, p[0-7]/m} 1 } } */
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/* { dg-final { scan-assembler-times {\tsub\tz[0-9]+\.h, p[0-7]/m} 1 } } */
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/* { dg-final { scan-assembler-times {\tsub\tz[0-9]+\.b, p[0-7]/m} 2 } } */
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/* { dg-final { scan-assembler-times {\tsub\tz[0-9]+\.h, p[0-7]/m} 2 } } */
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/* { dg-final { scan-assembler-times {\tsub\tz[0-9]+\.s, p[0-7]/m} 2 } } */
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/* { dg-final { scan-assembler-times {\tsub\tz[0-9]+\.d, p[0-7]/m} 2 } } */
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/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m} 1 } } */
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/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.d, p[0-7]/m} 1 } } */
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/* XFAILed until we support sub-int reductions for signed types. */
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/* { dg-final { scan-assembler-times {\tsub\t} 8 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tsub\t} 8 } } */
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/* { dg-final { scan-assembler-times {\tfsub\t} 2 } } */
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@ -15,6 +15,5 @@ reduc (int *restrict a, int *restrict b, int *restrict c)
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}
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/* { dg-final { scan-assembler-times {\tcmpne\tp[0-9]+\.s, } 1 } } */
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/* We ought to use the CMPNE result for the SEL too. */
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/* { dg-final { scan-assembler-not {\tcmpeq\tp[0-9]+\.s, } { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-not {\tcmpeq\tp[0-9]+\.s, } } } */
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/* { dg-final { scan-assembler-times {\tsel\tz[0-9]+\.s, } 1 } } */
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@ -32,7 +32,6 @@ vec_slp_##TYPE (TYPE *restrict a, int n) \
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TEST_ALL (VEC_PERM)
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/* ??? We don't treat the int8_t and int16_t loops as reductions. */
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/* ??? We don't treat the uint loops as SLP. */
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/* The loop should be fully-masked. */
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/* { dg-final { scan-assembler-times {\tld1b\t} 2 { xfail *-*-* } } } */
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@ -41,15 +40,15 @@ TEST_ALL (VEC_PERM)
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/* { dg-final { scan-assembler-times {\tld1w\t} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1d\t} 3 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tld1d\t} 2 } } */
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/* { dg-final { scan-assembler-not {\tldr} { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-not {\tldr} } } */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 4 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 6 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 4 } } */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 6 } } */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s} 6 } } */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d} 6 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b\n} 2 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h\n} 2 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.s\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.d\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tfadda\th[0-9]+, p[0-7], h[0-9]+, z[0-9]+\.h\n} 1 } } */
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@ -33,34 +33,24 @@ vec_slp_##TYPE (TYPE *restrict a, TYPE *restrict b, int n) \
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TEST_ALL (VEC_PERM)
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/* ??? We don't think it's worth using SLP for the 64-bit loops and fall
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back to the less efficient non-SLP implementation instead. */
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/* ??? At present we don't treat the int8_t and int16_t loops as
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reductions. */
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/* { dg-final { scan-assembler-times {\tld1b\t} 2 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tld1h\t} 3 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tld1b\t} 1 } } */
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/* { dg-final { scan-assembler-times {\tld1h\t} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1b\t} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1h\t} 3 } } */
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/* { dg-final { scan-assembler-times {\tld1w\t} 3 } } */
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/* { dg-final { scan-assembler-times {\tld1d\t} 3 } } */
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/* { dg-final { scan-assembler-not {\tld2b\t} } } */
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/* { dg-final { scan-assembler-not {\tld2h\t} } } */
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/* { dg-final { scan-assembler-not {\tld2w\t} } } */
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/* { dg-final { scan-assembler-not {\tld2d\t} } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b} 4 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h} 4 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h} 2 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b} 4 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h} 4 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.s} 4 } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.d} 4 } } */
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/* { dg-final { scan-assembler-times {\tfaddv\th[0-9]+, p[0-7], z[0-9]+\.h} 2 } } */
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/* { dg-final { scan-assembler-times {\tfaddv\ts[0-9]+, p[0-7], z[0-9]+\.s} 2 } } */
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/* { dg-final { scan-assembler-times {\tfaddv\td[0-9]+, p[0-7], z[0-9]+\.d} 2 } } */
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/* Should be 4 and 6 respectively, if we used reductions for int8_t and
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int16_t. */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 2 } } */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 4 } } */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 4 } } */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 6 } } */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s} 6 } } */
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/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d} 6 } } */
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@ -43,32 +43,24 @@ TEST_ALL (VEC_PERM)
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results might be greater than the number of elements in the vector.
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Otherwise we have two loads per loop, one for the initial vector
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and one for the loop body. */
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/* ??? At present we don't treat the int8_t and int16_t loops as
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reductions. */
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/* { dg-final { scan-assembler-times {\tld1b\t} 2 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tld1h\t} 3 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tld1b\t} 1 } } */
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/* { dg-final { scan-assembler-times {\tld1h\t} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1b\t} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1h\t} 3 } } */
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/* { dg-final { scan-assembler-times {\tld1w\t} 3 } } */
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/* { dg-final { scan-assembler-times {\tld4d\t} 3 } } */
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/* { dg-final { scan-assembler-not {\tld4b\t} } } */
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/* { dg-final { scan-assembler-not {\tld4h\t} } } */
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/* { dg-final { scan-assembler-not {\tld4w\t} } } */
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/* { dg-final { scan-assembler-not {\tld1d\t} } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b} 8 { xfail *-*-* } } } */
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/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h} 8 { xfail *-*-* } } } */
|
||||
/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b} 4 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h} 4 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b} 8 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h} 8 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.s} 8 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.d} 8 } } */
|
||||
/* { dg-final { scan-assembler-times {\tfaddv\th[0-9]+, p[0-7], z[0-9]+\.h} 4 } } */
|
||||
/* { dg-final { scan-assembler-times {\tfaddv\ts[0-9]+, p[0-7], z[0-9]+\.s} 4 } } */
|
||||
/* { dg-final { scan-assembler-times {\tfaddv\td[0-9]+, p[0-7], z[0-9]+\.d} 4 } } */
|
||||
|
||||
/* Should be 4 and 6 respectively, if we used reductions for int8_t and
|
||||
int16_t. */
|
||||
/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 4 } } */
|
||||
/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 4 } } */
|
||||
/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 6 } } */
|
||||
/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s} 6 } } */
|
||||
/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d} 6 } } */
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue