[AArch64] Fix possible wrong code generation when comparing DImode values.
gcc/ * config/aarch64/aarch64-simd.md (aarch64_cm<optab>di): Add clobber of CC_REGNUM to unsplit pattern. From-SVN: r199241
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2 changed files with 15 additions and 32 deletions
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@ -1,3 +1,8 @@
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2013-05-23 James Greenhalgh <james.greenhalgh@arm.com>
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* config/aarch64/aarch64-simd.md
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(aarch64_cm<optab>di): Add clobber of CC_REGNUM to unsplit pattern.
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2013-05-23 Richard Biener <rguenther@suse.de>
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PR middle-end/57381
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@ -3280,7 +3280,8 @@
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(COMPARISONS:DI
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(match_operand:DI 1 "register_operand" "w,w,r")
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(match_operand:DI 2 "aarch64_simd_reg_or_zero" "w,ZDz,r")
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)))]
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)))
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(clobber (reg:CC CC_REGNUM))]
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"TARGET_SIMD"
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"@
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cm<n_optab>\t%d0, %d<cmp_1>, %d<cmp_2>
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@ -3291,15 +3292,7 @@
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happening in the 'w' constraint cases. */
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&& GP_REGNUM_P (REGNO (operands[0]))
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&& GP_REGNUM_P (REGNO (operands[1]))"
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[(set (reg:CC CC_REGNUM)
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(compare:CC
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(match_dup 1)
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(match_dup 2)))
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(set (match_dup 0)
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(neg:DI
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(COMPARISONS:DI
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(match_operand 3 "cc_register" "")
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(const_int 0))))]
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[(const_int 0)]
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{
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enum machine_mode mode = SELECT_CC_MODE (<CMP>, operands[1], operands[2]);
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rtx cc_reg = aarch64_gen_compare_reg (<CMP>, operands[1], operands[2]);
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@ -3332,7 +3325,8 @@
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(UCOMPARISONS:DI
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(match_operand:DI 1 "register_operand" "w,r")
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(match_operand:DI 2 "aarch64_simd_reg_or_zero" "w,r")
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)))]
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)))
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(clobber (reg:CC CC_REGNUM))]
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"TARGET_SIMD"
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"@
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cm<n_optab>\t%d0, %d<cmp_1>, %d<cmp_2>
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@ -3342,17 +3336,9 @@
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happening in the 'w' constraint cases. */
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&& GP_REGNUM_P (REGNO (operands[0]))
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&& GP_REGNUM_P (REGNO (operands[1]))"
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[(set (reg:CC CC_REGNUM)
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(compare:CC
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(match_dup 1)
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(match_dup 2)))
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(set (match_dup 0)
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(neg:DI
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(UCOMPARISONS:DI
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(match_operand 3 "cc_register" "")
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(const_int 0))))]
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[(const_int 0)]
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{
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enum machine_mode mode = SELECT_CC_MODE (<CMP>, operands[1], operands[2]);
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enum machine_mode mode = CCmode;
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rtx cc_reg = aarch64_gen_compare_reg (<CMP>, operands[1], operands[2]);
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rtx comparison = gen_rtx_<CMP> (mode, operands[1], operands[2]);
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emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));
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@ -3385,7 +3371,8 @@
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(and:DI
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(match_operand:DI 1 "register_operand" "w,r")
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(match_operand:DI 2 "register_operand" "w,r"))
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(const_int 0))))]
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(const_int 0))))
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(clobber (reg:CC CC_REGNUM))]
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"TARGET_SIMD"
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"@
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cmtst\t%d0, %d1, %d2
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@ -3395,16 +3382,7 @@
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happening in the 'w' constraint cases. */
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&& GP_REGNUM_P (REGNO (operands[0]))
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&& GP_REGNUM_P (REGNO (operands[1]))"
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[(set (reg:CC_NZ CC_REGNUM)
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(compare:CC_NZ
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(and:DI (match_dup 1)
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(match_dup 2))
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(const_int 0)))
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(set (match_dup 0)
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(neg:DI
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(ne:DI
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(match_operand 3 "cc_register" "")
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(const_int 0))))]
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[(const_int 0)]
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{
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rtx and_tree = gen_rtx_AND (DImode, operands[1], operands[2]);
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enum machine_mode mode = SELECT_CC_MODE (NE, and_tree, const0_rtx);
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