diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ecfbbaa2a07..325db543904 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2007-08-19 Jan Hubicka + + * i386.md: Replace "rim" and "mri" constraints by "g". + 2007-08-19 Joseph Myers * dwarf2out.c (text_section_used, cold_text_section_used, diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index b49e9a94264..751d46b9ac6 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -4973,7 +4973,7 @@ (zero_extend:DI (plus:SI (plus:SI (match_operand:SI 3 "ix86_carry_flag_operator" "") (match_operand:SI 1 "nonimmediate_operand" "%0")) - (match_operand:SI 2 "general_operand" "rim")))) + (match_operand:SI 2 "general_operand" "g")))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)" "adc{l}\t{%2, %k0|%k0, %2}" @@ -6726,7 +6726,7 @@ (zero_extend:DI (minus:SI (match_operand:SI 1 "register_operand" "0") (plus:SI (match_operand:SI 3 "ix86_carry_flag_operator" "") - (match_operand:SI 2 "general_operand" "rim"))))) + (match_operand:SI 2 "general_operand" "g"))))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)" "sbb{l}\t{%2, %k0|%k0, %2}" @@ -6756,7 +6756,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (minus:SI (match_operand:SI 1 "register_operand" "0") - (match_operand:SI 2 "general_operand" "rim")))) + (match_operand:SI 2 "general_operand" "g")))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)" "sub{l}\t{%2, %k0|%k0, %2}" @@ -6781,7 +6781,7 @@ [(set (reg FLAGS_REG) (compare (minus:SI (match_operand:SI 1 "register_operand" "0") - (match_operand:SI 2 "general_operand" "rim")) + (match_operand:SI 2 "general_operand" "g")) (const_int 0))) (set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI @@ -6808,7 +6808,7 @@ (define_insn "*subsi_3_zext" [(set (reg FLAGS_REG) (compare (match_operand:SI 1 "register_operand" "0") - (match_operand:SI 2 "general_operand" "rim"))) + (match_operand:SI 2 "general_operand" "g"))) (set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (minus:SI (match_dup 1) @@ -8351,7 +8351,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0") - (match_operand:SI 2 "general_operand" "rim")))) + (match_operand:SI 2 "general_operand" "g")))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && ix86_binary_operator_ok (AND, SImode, operands)" "and{l}\t{%2, %k0|%k0, %2}" @@ -8361,7 +8361,7 @@ (define_insn "*andsi_2" [(set (reg FLAGS_REG) (compare (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0") - (match_operand:SI 2 "general_operand" "rim,ri")) + (match_operand:SI 2 "general_operand" "g,ri")) (const_int 0))) (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm") (and:SI (match_dup 1) (match_dup 2)))] @@ -8375,7 +8375,7 @@ (define_insn "*andsi_2_zext" [(set (reg FLAGS_REG) (compare (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0") - (match_operand:SI 2 "general_operand" "rim")) + (match_operand:SI 2 "general_operand" "g")) (const_int 0))) (set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (and:SI (match_dup 1) (match_dup 2))))] @@ -8420,7 +8420,7 @@ (define_insn "*andhi_2" [(set (reg FLAGS_REG) (compare (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0") - (match_operand:HI 2 "general_operand" "rim,ri")) + (match_operand:HI 2 "general_operand" "g,ri")) (const_int 0))) (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm") (and:HI (match_dup 1) (match_dup 2)))] @@ -8729,7 +8729,7 @@ (define_insn "*iorsi_1" [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0") - (match_operand:SI 2 "general_operand" "ri,rmi"))) + (match_operand:SI 2 "general_operand" "ri,g"))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (IOR, SImode, operands)" "or{l}\t{%2, %0|%0, %2}" @@ -8741,7 +8741,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0") - (match_operand:SI 2 "general_operand" "rim")))) + (match_operand:SI 2 "general_operand" "g")))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && ix86_binary_operator_ok (IOR, SImode, operands)" "or{l}\t{%2, %k0|%k0, %2}" @@ -8761,7 +8761,7 @@ (define_insn "*iorsi_2" [(set (reg FLAGS_REG) (compare (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0") - (match_operand:SI 2 "general_operand" "rim,ri")) + (match_operand:SI 2 "general_operand" "g,ri")) (const_int 0))) (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm") (ior:SI (match_dup 1) (match_dup 2)))] @@ -8776,7 +8776,7 @@ (define_insn "*iorsi_2_zext" [(set (reg FLAGS_REG) (compare (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0") - (match_operand:SI 2 "general_operand" "rim")) + (match_operand:SI 2 "general_operand" "g")) (const_int 0))) (set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (ior:SI (match_dup 1) (match_dup 2))))] @@ -8802,7 +8802,7 @@ (define_insn "*iorsi_3" [(set (reg FLAGS_REG) (compare (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0") - (match_operand:SI 2 "general_operand" "rim")) + (match_operand:SI 2 "general_operand" "g")) (const_int 0))) (clobber (match_scratch:SI 0 "=r"))] "ix86_match_ccmode (insn, CCNOmode) @@ -8822,7 +8822,7 @@ (define_insn "*iorhi_1" [(set (match_operand:HI 0 "nonimmediate_operand" "=r,m") (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0") - (match_operand:HI 2 "general_operand" "rmi,ri"))) + (match_operand:HI 2 "general_operand" "g,ri"))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (IOR, HImode, operands)" "or{w}\t{%2, %0|%0, %2}" @@ -8832,7 +8832,7 @@ (define_insn "*iorhi_2" [(set (reg FLAGS_REG) (compare (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0") - (match_operand:HI 2 "general_operand" "rim,ri")) + (match_operand:HI 2 "general_operand" "g,ri")) (const_int 0))) (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm") (ior:HI (match_dup 1) (match_dup 2)))] @@ -8845,7 +8845,7 @@ (define_insn "*iorhi_3" [(set (reg FLAGS_REG) (compare (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0") - (match_operand:HI 2 "general_operand" "rim")) + (match_operand:HI 2 "general_operand" "g")) (const_int 0))) (clobber (match_scratch:HI 0 "=r"))] "ix86_match_ccmode (insn, CCNOmode) @@ -9118,7 +9118,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0") - (match_operand:SI 2 "general_operand" "rim")))) + (match_operand:SI 2 "general_operand" "g")))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && ix86_binary_operator_ok (XOR, SImode, operands)" "xor{l}\t{%2, %k0|%k0, %2}" @@ -9138,7 +9138,7 @@ (define_insn "*xorsi_2" [(set (reg FLAGS_REG) (compare (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0") - (match_operand:SI 2 "general_operand" "rim,ri")) + (match_operand:SI 2 "general_operand" "g,ri")) (const_int 0))) (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm") (xor:SI (match_dup 1) (match_dup 2)))] @@ -9153,7 +9153,7 @@ (define_insn "*xorsi_2_zext" [(set (reg FLAGS_REG) (compare (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0") - (match_operand:SI 2 "general_operand" "rim")) + (match_operand:SI 2 "general_operand" "g")) (const_int 0))) (set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (xor:SI (match_dup 1) (match_dup 2))))] @@ -9179,7 +9179,7 @@ (define_insn "*xorsi_3" [(set (reg FLAGS_REG) (compare (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0") - (match_operand:SI 2 "general_operand" "rim")) + (match_operand:SI 2 "general_operand" "g")) (const_int 0))) (clobber (match_scratch:SI 0 "=r"))] "ix86_match_ccmode (insn, CCNOmode) @@ -9199,7 +9199,7 @@ (define_insn "*xorhi_1" [(set (match_operand:HI 0 "nonimmediate_operand" "=r,m") (xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0") - (match_operand:HI 2 "general_operand" "rmi,ri"))) + (match_operand:HI 2 "general_operand" "g,ri"))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (XOR, HImode, operands)" "xor{w}\t{%2, %0|%0, %2}" @@ -9209,7 +9209,7 @@ (define_insn "*xorhi_2" [(set (reg FLAGS_REG) (compare (xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0") - (match_operand:HI 2 "general_operand" "rim,ri")) + (match_operand:HI 2 "general_operand" "g,ri")) (const_int 0))) (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm") (xor:HI (match_dup 1) (match_dup 2)))] @@ -9222,7 +9222,7 @@ (define_insn "*xorhi_3" [(set (reg FLAGS_REG) (compare (xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0") - (match_operand:HI 2 "general_operand" "rim")) + (match_operand:HI 2 "general_operand" "g")) (const_int 0))) (clobber (match_scratch:HI 0 "=r"))] "ix86_match_ccmode (insn, CCNOmode)