pru: Optimize DI shifts
If the number of shift positions is a constant, then the DI shift operation is expanded to a sequence of 2 to 4 machine instructions. That is more efficient than the default action to call libgcc. gcc/ChangeLog: * config/pru/pru.md (lshrdi3): New expand pattern. (ashldi3): Ditto. gcc/testsuite/ChangeLog: * gcc.target/pru/ashiftdi-1.c: New test. * gcc.target/pru/lshiftrtdi-1.c: New test. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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Dimitar Dimitrov
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3 changed files with 302 additions and 0 deletions
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@ -703,6 +703,202 @@
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[(set_attr "type" "alu")
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(set_attr "length" "12")])
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; 64-bit LSHIFTRT with a constant shift count can be expanded into
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; more efficient code sequence than a variable register shift.
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;
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; 1. For shift >= 32:
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; dst_lo = (src_hi >> (shift - 32))
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; dst_hi = 0
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;
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; 2. For shift==1 there is no need for a temporary:
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; dst_lo = (src_lo >> 1)
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; if (src_hi & 1)
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; dst_lo |= (1 << 31)
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; dst_hi = (src_hi >> 1)
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;
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; 3. For shift < 32:
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; dst_lo = (src_lo >> shift)
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; tmp = (src_hi << (32 - shift)
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; dst_lo |= tmp
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; dst_hi = (src_hi >> shift)
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;
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; 4. For shift in a register:
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; Fall back to calling libgcc.
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(define_expand "lshrdi3"
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[(set (match_operand:DI 0 "register_operand")
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(lshiftrt:DI
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(match_operand:DI 1 "register_operand")
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(match_operand:QI 2 "const_int_operand")))]
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""
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{
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gcc_assert (CONST_INT_P (operands[2]));
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const int nshifts = INTVAL (operands[2]);
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rtx dst_lo = simplify_gen_subreg (SImode, operands[0], DImode, 0);
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rtx dst_hi = simplify_gen_subreg (SImode, operands[0], DImode, 4);
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rtx src_lo = simplify_gen_subreg (SImode, operands[1], DImode, 0);
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rtx src_hi = simplify_gen_subreg (SImode, operands[1], DImode, 4);
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if (nshifts >= 32)
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{
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emit_insn (gen_rtx_SET (dst_lo,
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gen_rtx_LSHIFTRT (SImode,
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src_hi,
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GEN_INT (nshifts - 32))));
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emit_insn (gen_rtx_SET (dst_hi, const0_rtx));
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DONE;
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}
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gcc_assert (can_create_pseudo_p ());
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/* The expansions which follow are safe only if DST_LO and SRC_HI
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do not overlap. If they do, then fix by using a temporary register.
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Overlapping of DST_HI and SRC_LO is safe because by the time DST_HI
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is set, SRC_LO is no longer live. */
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if (reg_overlap_mentioned_p (dst_lo, src_hi))
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{
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rtx new_src_hi = gen_reg_rtx (SImode);
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emit_move_insn (new_src_hi, src_hi);
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src_hi = new_src_hi;
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}
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if (nshifts == 1)
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{
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rtx_code_label *skip_hiset_label;
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rtx j;
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emit_insn (gen_rtx_SET (dst_lo,
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gen_rtx_LSHIFTRT (SImode, src_lo, const1_rtx)));
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/* The code generated by `genemit' would create a LABEL_REF. */
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skip_hiset_label = gen_label_rtx ();
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j = emit_jump_insn (gen_cbranch_qbbx_const (EQ,
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SImode,
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src_hi,
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GEN_INT (0),
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skip_hiset_label));
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JUMP_LABEL (j) = skip_hiset_label;
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LABEL_NUSES (skip_hiset_label)++;
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emit_insn (gen_iorsi3 (dst_lo, dst_lo, GEN_INT (1 << 31)));
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emit_label (skip_hiset_label);
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emit_insn (gen_rtx_SET (dst_hi,
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gen_rtx_LSHIFTRT (SImode, src_hi, const1_rtx)));
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DONE;
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}
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if (nshifts < 32)
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{
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rtx tmpval = gen_reg_rtx (SImode);
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emit_insn (gen_rtx_SET (dst_lo,
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gen_rtx_LSHIFTRT (SImode,
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src_lo,
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GEN_INT (nshifts))));
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emit_insn (gen_rtx_SET (tmpval,
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gen_rtx_ASHIFT (SImode,
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src_hi,
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GEN_INT (32 - nshifts))));
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emit_insn (gen_iorsi3 (dst_lo, dst_lo, tmpval));
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emit_insn (gen_rtx_SET (dst_hi,
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gen_rtx_LSHIFTRT (SImode,
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src_hi,
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GEN_INT (nshifts))));
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DONE;
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}
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gcc_unreachable ();
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})
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; 64-bit ASHIFT with a constant shift count can be expanded into
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; more efficient code sequence than the libgcc call required by
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; a variable shift in a register.
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(define_expand "ashldi3"
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[(set (match_operand:DI 0 "register_operand")
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(ashift:DI
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(match_operand:DI 1 "register_operand")
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(match_operand:QI 2 "const_int_operand")))]
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""
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{
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gcc_assert (CONST_INT_P (operands[2]));
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const int nshifts = INTVAL (operands[2]);
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rtx dst_lo = simplify_gen_subreg (SImode, operands[0], DImode, 0);
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rtx dst_hi = simplify_gen_subreg (SImode, operands[0], DImode, 4);
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rtx src_lo = simplify_gen_subreg (SImode, operands[1], DImode, 0);
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rtx src_hi = simplify_gen_subreg (SImode, operands[1], DImode, 4);
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if (nshifts >= 32)
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{
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emit_insn (gen_rtx_SET (dst_hi,
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gen_rtx_ASHIFT (SImode,
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src_lo,
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GEN_INT (nshifts - 32))));
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emit_insn (gen_rtx_SET (dst_lo, const0_rtx));
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DONE;
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}
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gcc_assert (can_create_pseudo_p ());
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/* The expansions which follow are safe only if DST_HI and SRC_LO
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do not overlap. If they do, then fix by using a temporary register.
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Overlapping of DST_LO and SRC_HI is safe because by the time DST_LO
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is set, SRC_HI is no longer live. */
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if (reg_overlap_mentioned_p (dst_hi, src_lo))
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{
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rtx new_src_lo = gen_reg_rtx (SImode);
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emit_move_insn (new_src_lo, src_lo);
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src_lo = new_src_lo;
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}
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if (nshifts == 1)
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{
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rtx_code_label *skip_hiset_label;
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rtx j;
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emit_insn (gen_rtx_SET (dst_hi,
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gen_rtx_ASHIFT (SImode, src_hi, const1_rtx)));
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skip_hiset_label = gen_label_rtx ();
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j = emit_jump_insn (gen_cbranch_qbbx_const (EQ,
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SImode,
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src_lo,
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GEN_INT (31),
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skip_hiset_label));
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JUMP_LABEL (j) = skip_hiset_label;
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LABEL_NUSES (skip_hiset_label)++;
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emit_insn (gen_iorsi3 (dst_hi, dst_hi, GEN_INT (1 << 0)));
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emit_label (skip_hiset_label);
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emit_insn (gen_rtx_SET (dst_lo,
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gen_rtx_ASHIFT (SImode, src_lo, const1_rtx)));
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DONE;
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}
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if (nshifts < 32)
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{
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rtx tmpval = gen_reg_rtx (SImode);
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emit_insn (gen_rtx_SET (dst_hi,
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gen_rtx_ASHIFT (SImode,
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src_hi,
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GEN_INT (nshifts))));
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emit_insn (gen_rtx_SET (tmpval,
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gen_rtx_LSHIFTRT (SImode,
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src_lo,
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GEN_INT (32 - nshifts))));
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emit_insn (gen_iorsi3 (dst_hi, dst_hi, tmpval));
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emit_insn (gen_rtx_SET (dst_lo,
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gen_rtx_ASHIFT (SImode,
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src_lo,
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GEN_INT (nshifts))));
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DONE;
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}
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gcc_unreachable ();
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})
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;; Include ALU patterns with zero-extension of operands. That's where
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;; the real insns are defined.
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53
gcc/testsuite/gcc.target/pru/ashiftdi-1.c
Normal file
53
gcc/testsuite/gcc.target/pru/ashiftdi-1.c
Normal file
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@ -0,0 +1,53 @@
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/* Functional test for DI left shift. */
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/* { dg-do run } */
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/* { dg-options "-pedantic-errors" } */
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#include <stddef.h>
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#include <stdint.h>
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extern void abort (void);
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uint64_t __attribute__((noinline)) ashift_1 (uint64_t a)
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{
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return a << 1;
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}
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uint64_t __attribute__((noinline)) ashift_10 (uint64_t a)
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{
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return a << 10;
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}
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uint64_t __attribute__((noinline)) ashift_32 (uint64_t a)
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{
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return a << 32;
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}
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uint64_t __attribute__((noinline)) ashift_36 (uint64_t a)
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{
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return a << 36;
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}
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int
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main (int argc, char** argv)
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{
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if (ashift_1 (0xaaaa5555aaaa5555ull) != 0x5554aaab5554aaaaull)
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abort();
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if (ashift_10 (0xaaaa5555aaaa5555ull) != 0xa95556aaa9555400ull)
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abort();
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if (ashift_32 (0xaaaa5555aaaa5555ull) != 0xaaaa555500000000ull)
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abort();
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if (ashift_36 (0xaaaa5555aaaa5555ull) != 0xaaa5555000000000ull)
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abort();
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if (ashift_1 (0x1234567822334455ull) != 0x2468acf0446688aaull)
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abort();
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if (ashift_10 (0x1234567822334455ull) != 0xd159e088cd115400ull)
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abort();
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if (ashift_32 (0x1234567822334455ull) != 0x2233445500000000ull)
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abort();
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if (ashift_36 (0x1234567822334455ull) != 0x2334455000000000ull)
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abort();
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return 0;
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}
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53
gcc/testsuite/gcc.target/pru/lshiftrtdi-1.c
Normal file
53
gcc/testsuite/gcc.target/pru/lshiftrtdi-1.c
Normal file
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@ -0,0 +1,53 @@
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/* Functional test for DI right shift. */
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/* { dg-do run } */
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/* { dg-options "-pedantic-errors" } */
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#include <stddef.h>
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#include <stdint.h>
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extern void abort (void);
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uint64_t __attribute__((noinline)) lshift_1 (uint64_t a)
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{
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return a >> 1;
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}
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uint64_t __attribute__((noinline)) lshift_10 (uint64_t a)
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{
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return a >> 10;
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}
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uint64_t __attribute__((noinline)) lshift_32 (uint64_t a)
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{
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return a >> 32;
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}
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uint64_t __attribute__((noinline)) lshift_36 (uint64_t a)
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{
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return a >> 36;
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}
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int
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main (int argc, char** argv)
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{
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if (lshift_1 (0xaaaa5555aaaa5555ull) != 0x55552aaad5552aaaull)
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abort();
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if (lshift_10 (0xaaaa5555aaaa5555ull) != 0x002aaa95556aaa95ull)
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abort();
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if (lshift_32 (0xaaaa5555aaaa5555ull) != 0x00000000aaaa5555ull)
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abort();
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if (lshift_36 (0xaaaa5555aaaa5555ull) != 0x000000000aaaa555ull)
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abort();
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if (lshift_1 (0x1234567822334455ull) != 0x091a2b3c1119a22aull)
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abort();
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if (lshift_10 (0x1234567822334455ull) != 0x00048d159e088cd1ull)
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abort();
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if (lshift_32 (0x1234567822334455ull) != 0x0000000012345678ull)
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abort();
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if (lshift_36 (0x1234567822334455ull) != 0x0000000001234567ull)
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abort();
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return 0;
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}
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