amdgcn: Fix VGPR max count
The metadata for RDNA3 kernels allocates VGPRs in blocks of 12, which means the maximum usable number of registers is 252. This patch prevents the compiler from exceeding this artifical limit. gcc/ChangeLog: * config/gcn/gcn.cc (gcn_conditional_register_usage): Fix registers remaining after maximum allocation using TARGET_VGPR_GRANULARITY.
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@ -2493,6 +2493,13 @@ gcn_secondary_reload (bool in_p, rtx x, reg_class_t rclass,
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static void
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gcn_conditional_register_usage (void)
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{
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/* Some architectures have a register allocation granularity that does not
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permit use of the full register count. */
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for (int i = 256 - (256 % TARGET_VGPR_GRANULARITY);
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i < 256;
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i++)
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fixed_regs[VGPR_REGNO (i)] = call_used_regs[VGPR_REGNO (i)] = 1;
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if (!cfun || !cfun->machine)
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return;
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