amdgcn: Fix VGPR max count

The metadata for RDNA3 kernels allocates VGPRs in blocks of 12, which means the
maximum usable number of registers is 252.  This patch prevents the compiler
from exceeding this artifical limit.

gcc/ChangeLog:

	* config/gcn/gcn.cc (gcn_conditional_register_usage): Fix registers
	remaining after maximum allocation using TARGET_VGPR_GRANULARITY.
This commit is contained in:
Andrew Stubbs 2024-08-07 15:35:18 +00:00
parent 89d2f3fefb
commit 7153173319

View file

@ -2493,6 +2493,13 @@ gcn_secondary_reload (bool in_p, rtx x, reg_class_t rclass,
static void
gcn_conditional_register_usage (void)
{
/* Some architectures have a register allocation granularity that does not
permit use of the full register count. */
for (int i = 256 - (256 % TARGET_VGPR_GRANULARITY);
i < 256;
i++)
fixed_regs[VGPR_REGNO (i)] = call_used_regs[VGPR_REGNO (i)] = 1;
if (!cfun || !cfun->machine)
return;